Ece202 File.pdf

8/14/2019 Ece202 File.pdf

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Ece202

Design

Problem

4 Bit Odd CounterSubmitted To :-Ms.Kavita Dubey

Submitted By:-

Kulpreet Singh11104742


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Aim:- To design 4-bit asyncronous counter(odd)

Material Required:- IC 7476 , IC7408 ,LED ,IC555,Resistor & Capacitor

Theory:-

ResistorA resistor is a two-terminal electrical component that implements electrical

resistance as a circuit element.

The current through a resistor is in direct proportion to the voltage across the

resistor's terminals. This relationship is represented by Ohm's law:

I=V/R [I=Current||V=Voltage||R=Resistance]

CapacitanceCapacitance is the ability of a body to store an electrical charge. Anybody or

structure that is capable of being charged, either with static electricity or by an

electric current, exhibits capacitance. A common form of energy storage device

is a parallel-plate capacitor. In a parallel plate capacitor, capacitance is directly

proportional to the surface area of the conductor plates and inversely

proportional to the separation distance between the plates. If the charges on

the plates are +q and q, and V give the voltage between the plates, then the

capacitance C is given by

C=q/V


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Flip FlopA flip-flop is a circuit that has two stable states and can be used to store state

information. The circuit can be made to change state by signals applied to one

or more control inputs and will have one or two outputs. It is the basic storage

element in sequential logic.

There are four types of flip flop depending on the no of input they take and

type of output they gives.

i) JK Flip Flop- Its is also known as universal flip flop as all other flip

flops can be made by this.

ii) SR Flip Flop

iii) D Flip Flop

J K Q(t+1) Comment

0 0 Q No Change

0 1 0 Reset

1 0 1 Set

1 1 Q Toggle

S R Q(t+1

Commen

0 0 Q No

0 1 0 Reset

1 0 1 S1 1 - N

ot

D Q(t+1) Comment

0 0 Reset

1 1 Set


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iv) T Flip Flop

Logic GatesA logic gate is an idealized or physical device implementing a Boolean function,

that is, it performs a logical operation on one or more logic inputs and

produces a single logic output.

Basic Gates

i) And Gate ii) Or Gate iii) Not Gate

Other Gates

i) NOR Gate ii) XNOR Gate iii) NAND GateiV) XOR Gate

Truth Table of all the gates:-

INPUT OUTPUT

A B AND OR NOT NAND NOR XNOR XOR

Boolean

ExpressionA.B A+B A (A.B) (A+B) (A.B)+(A.B) (A.B)+(A.B)

Symbol

0 0 0 0 1 1 1 1 0

0 1 0 1 1 1 0 0 1

1 0 0 1 0 1 0 0 1

1 1 1 1 0 0 0 1 0

T Q(t+1) Comment

0 Q No Change

1 Q Toggle


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IC7476

It has two JK flip flop with the above pin diagram configuration.

The description of the pin diagram is as follow:-


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IC7408

It is having 4 and gate woth the above pin diagram configuration. Pin 7 is the

ground pin and pin 14 has positive supply.

The description of the pin diagram is as follow:-


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IC555

The IC555 is an integrated circuit (chip) used in

a variety of timer, pulse generation, and

oscillator applications. The 555 can be used to

provide time delays, as an oscillator, and as a

flip-flop element. Derivatives provide up to

four timing circuits in one package.Standard ic 555 circuit to generate the logic

clocks. The value of R1, R2 and C is choosenaccording to the required frequency of output.

Counter

In digital logic and computing, a counter is a device which stores (and

sometimes displays) the number of times a particular event or process has

occurred, often in relationship to a clock signal.

Types of counters:-

i) Asynchronous (Ripple) Counter- changing state bits are used as clocks to

subsequent state flip-flops


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4 Bit Asynchronous Counter

Output is taken at Q of every flip flop in theseries Q3 Q2 Q1 Q0.

High input is given to all the JK and a clock to

the first flip flop. All other flip flop will get

clock from the changing states of the

previous flip flop. When the clock is 0

this is the initial state of reset the output.

When first clock arrives the first flip flop gets toggled because both the inputs

are 1. As Q0 is 1 (i.e. Q0 is 0) then Q1 will remain unchanged but when Q0 is 0

the Q1 gets toggled and this goes

on till all the flip flops.

Timing diagram of 4 bit

counter

ii) Synchronous (Parallel) counter- All state bits change under control of a single

clock


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3 Bit Synchronous Counter

Output is taken at Q of every flip flop in the series Q2 Q1 Q0.

It is seen that from the circuit we notice that Q0 changes state at every clock

pulse. So the flip flop 0 is mode to toggle by putting J and K equal to 1. Q1 goes

to opposite state following each time Q0=1. When Q0=1 and positive edge of

the clock occurs flip flop 1 is in toggle mode and will change state. Other times

the Q0=0 the flip flop 1 is in the old mode and remains in the present state. Flip

flop 2 will go toggle state following each time Q0 and Q1 is equal to 1. This

condition is detected by the and gate that makes the JK input of flip flop 2 high.

When either Q0 or Q1 is 0 or the clock has the negative edge the flip flop 2 will

not change its state and it will remain in its present state.

Odd CounterOdd counter is which counts only for the odd numbers. Below is the circuit of

the 4 bit odd counter made by 4 bit asynchronous counter.


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Truth table

Input Output

BASE10 Q3 Q2 Q1 Q0 O3 O2 O1 O0 BASE10

0 0 0 0 0 0 0 0 0 0

1 0 0 0 1 0 0 0 1 1

2 0 0 1 0 0 0 0 0 0

3 0 0 1 1 0 0 1 1 3

0 0 1 0 0 0 0 0 0 0

1 5 1 0 1 0 1 0 1 5

0 0 1 1 0 0 0 0 0 0

Input Output

BASE10 Q3 Q2 Q1 Q0 O3 O2 O1 O0 BASE10

7 0 1 1 1 0 1 1 1 7

8 1 0 0 0 0 0 0 0 0

9 1 0 0 1 1 0 0 1 9

10 1 0 1 0 0 0 0 0 0

11 1 0 1 1 1 0 1 1 11

12 1 1 0 0 0 0 0 0 0

13 1 1 0 1 1 1 0 1 13

14 1 1 1 0 0 0 0 0 0

15 1 1 1 1 1 1 1 1 15

The above truth table clearly shows that the circuit will give the output only at odd numbers.

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Ece202 File.pdf