Artificial Neural Network Macro Model Of Vlsi Interconnect

International Journal of Science, Technology, Engineering and Management –A VTU Publication 2019; Vol: 1, Issue: 4, pp: 15 - 23 ISSN: 2582-4414(online)

Artificial Neural Network Macro Model Of Vlsi Interconnect Using Proper Orthogonal Decomposition

Nagaraj S. *a and Seshachalam D.b

abDepartment of ECE, BMS College of Engineering, Bengaluru, India

Abstract: The manual creation and support of suitable behavior models is a key issue in

nonlinear circuit modeling. Interconnect being a nonlinear circuit, changes its behavior with the frequency and input signal. To overcome the bottleneck of circuit level modeling of nonlinear behavior, in the present paper, Artificial Neural Network(ANN) macro reduced order model of Very Large Scale Integration (VLSI) interconnect using Proper Orthogonal Decomposition (POD) is proposed. Here the solution sets called snapshots of the nonlinear full order interconnect model are obtained at selected time interval. POD is applied on snapshot matrix to reduce the order of nonlinear interconnect model. Another arrangement of snapshots called linear snapshots are taken from linear interconnect model. ANN is trained using the linear snapshots as input and nonlinear output of POD as target. The above procedure is repeated for different inputs in case of forced systems and different parameters or initial conditions in case of autonomous systems. Finally, trained ANN output is verified with original system behavior for untrained inputs.

A R T I C L E H I S T O R Y

Received: 2019-06-20 Revised: 2019-07-21 Accepted: 2019-12-07

Keywords: Artificial Neural Network, Model Order Reduction, Proper Orthogonal Decomposition, Interconnect.

1. INTRODUCTION

Growing requirement for low power VLSI design with integration of digital and analog circuits has made the analysis of data signal more challenging. Hence study of structures called interconnects which connect circuit elements and carry data signals play important role in circuit analysis. Interconnects have found their importance at various levels of VLSI design, such as back planes, printed circuit boards, multichip modules, packaging structures and on chip. In the era of high speed applications, interconnect effects such as cross talk, reflection, distortion, signal delay and ringing are highlighted. In high speed system, the majority of signal degradation are due to the problems with interconnects [1-3].

Conventional circuit simulators such as SPICE,

cannot always address problems of high speed interconnects [4]. If effects of interconnects are neglected at design stage, then there are chances of failure in meeting the specification due to distortion in analog signal or inoperable digital circuit because of logic glitches

*NAGARAJ S. Department of Electronics and Communication Engg. BMS College of Engineering, Visvesvaraya Technological University, P.O. Box: 1908, Bengaluru-560019, Karnataka state, India; E-mail: [email protected]

. In high speed design, predicting these effects are

very much necessary to reduce the design cycle cost. Therefore, interconnect sub circuit needs to be considered with the full circuit design to retain the accuracy of simulation [4-6]. Circuits usually exhibit nonlinear behavior with variation in frequency and input signals [7]. Hence macro modelling of high-speed, on-chip, interconnect is prime requirement in VLSI design analysis. The Principal problem with the model is to satisfy the needs of numerous designers working on interconnects operating with different input signals, frequencies and system parameters. To contemplate the impact of frequency variation on the input- output feature and power loss in the interconnect, it is vital to examine the input signal harmonics with small step size [8]. Though usually linear elements are considered for interconnect analysis [9], practical interconnects are more conglomerated than most of the linear mathematical models [10].

The necessity of performing efficient system-level simulation and verification is fulfilled by the reduced order model which provides a convenient abstraction to the VLSI designer. This has encouraged the application of reduced order modeling to VLSI interconnects. In earlier stages, model order reduction (MOR) techniques were inculcated in linear interconnects and lumped interconnects for macromodeling [11-13]. Different MOR methods including

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16 IJSTEM, 2019, Vol. 1, No. 4, pp. 15-23 Nagaraj S. et al.

Lavgerre methods, passive reduced order interconnect modelling (PRIMA) method, Arnoldi method, Hankel norm and POD can be made use of to reduce the order of the system [14]. POD also called Karhunen-Loeve decomposition has been applied widely in nonlinear macro modeling [15-17]. Another approach being Balanced truncation [18] that exploits POD to approximate Grammians [19]. The limitation with this algorithm is the high evaluation cost for representing the efficient nonlinearity which may decrease the performance of the reduced model. Linear mathematical model hinders exposure to the challenges faced during order reduction of nonlinear interconnect modelling. This is due to the highly analogue nature of nonlinear dynamic systems. The dynamics of such interconnects span a wide range of time constants, as well as various magnitudes and frequencies over different orders [20]. POD serves as one of the reliable methods for MOR,

2.1 Interconnect Model described by Lumped circuit elements

At lower frequencies, the interconnect circuits could be displayed utilizing lumped or RC circuit models. RC circuit reactions are monotonic in nature. Not withstanding, so as to represent ringing in sign wave-shapes, RLC circuit models might be required. Generally lumped interconnect circuits removed from designs contain an enormous number of hubs.

I 2.2 Interconnect Model described by Distributed circuit

elements

The following state space model may be used to describe a nonlinear interconnect circuit as, v□t f vt But ,

considering efficiency in computational cost [21]. Many of the dynamical system problems with both linear and nonlinear behavior are being effectively tackled since 1990s with the application of POD [22]. Apart from physical and

vt CTvt , where vt RN is a state vector, f : RN RN

(1)

is a

mechanical problems POD’s implication can be found in macromodeling of nonlinear dynamic system [23]. Even

function of vector values, B input matrix of dimension N M , C is an output matrix of dimension

though POD reduces the order of models to a very high extent, the CPU cost remains significant. This occurs especially during its encounter with the nonlinear portion of

N K,u : R RM output signal.

input signal and y : R RK is the

the model [24]. However, ANN has been introduced for macromodeling of nonlinear dynamic systems [25-27], which serves well with static systems, yet produce erroneous results with respect to dynamic ones. For implementations pertaining to the later kind, robust training and complex ANN architectures must be defined [28].

To develop powerful macromodel, neural network is used with the help of POD in the training phase. ANN macromodel is developed due to its rationalization potentiality. ANN observes the pattern and learns the relationship of the output data with input, which are prepared in the pre-processing stage. It also learns even the pattern of the input data which is not a part of training input but resemble the training data. This feature is well utilized in ANN macromodels [29]. Data required to train ANN is constructed using POD - MOR, considering only the dominant characteristic of the nonlinear full model.

This paper is sorted out as follows: second section portrays issue related to modeling of VLSI interconnect, third section depicts POD-MOR, fourth section shows technique for previews for Artificial Neural Network. In fifth section, we propose performance index. Sixth one outlines the neural network implementation results of the model. Last one gives a general conclusion.

2. VLSI INTERCONNECT MODELS

Based on the requirement, many researchers and practitioners have designed different types of interconnect models. In general VLSI interconnect, can be modeled as Lumped and Distributed. Interconnect model is also described by Telegraph equation. In this paper, distributed model and model based on telegraph equation has been discussed.

The circuit has been examined by Chen et al [12] shown in Fig. 1, consists of a nonlinear diode represented by the

expression i xd e 40x 1. To maintain simplicity

resistance and capacitance are assumed to be unity. Input

it is fed to node 1 and the voltage measured at node 2 is

considered as output given by yt v2 t.

Fig 1. Nonlinear Interconnect circuit model

Interconnect Model described by Telegraph Equation

Infinitesimal piece of transmission line system is shown in Fig. 2 [32]. A capacitance and leakage current to the ground are assumed making the cable an imperfectly insulated one. Suppose x is the distance from end of the cable where the voltage is applied, v is the voltage at that distance at time t. Current passing at x in time t is represented as i. The voltage and current at x+∆x and at time t are represented as

v v and i i respectively. The transmission line, described by telegraph equation is discretized into infinitesimal sections of length ∆x.

Neural Network Model of VLSI Interconnect using Proper Orthogonal Decomposition IJSTEM, 2019, Vol. 1, No. 17

Problem formulation

t

i 1 i i 1

i i .

t t x

2

i | i i i

t2 i .

In this paper, we consider nonlinear telegraph equation [32] vxx vtt 2vt v2 e2 x 4t ex 2t , (9)

where x 0,2 and t 0,1under the initial conditions

vx,0 ex ,

Fig 2. Cross section of Interconnect Assuming unit length parameters of conductance

(G), inductance (L), capacitance (C), resistance (R) and applying Ohm's law across RLC, it results in,

v x,0 2ex , and boundary conditions

v0, t e2t ,

v2, t e22t .

Finite Difference Method

Let xi ix, vxi ,t xi t for

(10)

(11)

i 0,1, .... Nx 1and

vR iR, tn nt for n 0,1,...Nt ,

di xx

|x x vn1 2vn1 vn1 ,

vL L , 1 dt (2) i x 2

vn1 2vn vn1

C C C tt t t n t 2

Voltage at point P2 is equal to the sum of voltage at point P1

and voltage drop across ∆x, i vt |t t

n

vn1 vn1

t2

v(x,t) v(x dx,t) Ldx Rdx i Substituting (11) in (8) we get, t (3) n1 1 vn1 vn1

W(whrte)nxeaqnudatdioxnte(n3d)sptaortziaelrloy, ditifcfoenrevnetritastetod with respect to

vi 1 2 1 22

i1x2 i 1 x2

v i 1 1 n1 2 ix2nt

Ri L

. (4)

v e (13)

x t t 2 tv i i

Similarly, the same current that flows through point x and point x+∆x is equal to the leakage current passing to the ground. i i i Gdxv iCdx . (5)

e2ix 4nt 2 vn

V n1 vn 1 e 2t , vn 1,. .., vn 1 e2 2 t T , From equation (2), the current through the capacitor to the If 0 1 Nx 1 then ground is given by

v equation (13) can be transformed into the nonlinear polynomial equation given by

iC C t

. (6) V n1 AV n1 GV n1 B , (14)

Differentiating (5) and (6) w.r.t. x, t respectively and eliminating derivatives of v, we get

where 1 0 1

2i x2

2i LC t LG RCi RGi . (7) t

A

1 1 1

1 . . . ,

2 2 x2 t

2 . 1 Similarly, we 2avlso have v

t x 1

1 v

x 2

LC t2

LG RC

t

RG v . (8) 0 Nx 2 Nx 2

The above equations (7) and (8) are called one dimensional hyperbolic second order Telegraph equations.

2

n1

v dt. v , (12)

v


.

1

Nx

T

N

c0

y ,...., y R

v, 1 . c2 ma2 x 2 ,

B 1 1

2 . , L

t 2 t x2 .

Nx 1 Nx 2 Nx 2

where . represents the modulus. The optimum condition

vn1 0 reduces to 0 n 1 v vxv * y ydy x .

G 1

1

0 .

2 . .

(18)

t 2 t x 2 . The eigenvalues determine the energy that each eigen

n 1 function captures. The basis functions are the eigen

where

0 v Nx 2Nx 2

(15)

i

functions of the equation (18), whose kernel function is the autocorrelation function vxv *y Ax, y. The

2 n 1 t n1 2ix 4nt ix 2nt tensor product matrix replaces the autocorrection function ci 2 vi 2 vi e e ,t t Ax, y. 1 q

i 0,1,....Nx 1. A x, y

q i 1

T v x, ti v y, ti , (19)

3. PROPER ORTHOGONAL DECOMPOSITION(POD) where M is the spacial domain resolution and v x, t v x , t , v x , t ...v x , t are vector valued

i 1 i 2 i M i The dynamic circuit represented in expression (1)

has N state variables, making its order N=10. A q state lower functions. The solution of the eigen value problem defined by,

order approximation can be constructed (where q<<N), that can preserve the accuracy of the original model using MOR technique. POD is utilized for creating lower request estimate

A x y, eigenfunction i x can be determined.

(20)

illustrative of subspace in Hilbert space. It separates most positive arrangement of symmetrical preminse capacities from the snapshot ensemble . Here numerical

The eigenvalue problem in the expression (20) is M M in size and frequently computationally costly. Hence, the snapshot technique is utilized in reducing the problem from

1 nx M M to a significantly smaller q q sized problem

perception of a scalar capacity vx,ti in order is (where q<<M). considered where, N is the number of observations and i 0,1, .. N . The timely observations made for the evaluated solution are collectively called snapshots. The observations at different instances i are represented as ti. On application of POD onto snapshots, orthogonal basis functions independent of time, known as POD modes i x and orthogonal coefficients dependent on time, i x are

Snapshot Technique

The eigenvalue issue characterized by condition (20) is diminished to a lot littler measurement issue by the snapshot strategy. Since the data vectors vi and eigen functions i

span the same linear space, eigen functions can be spoken to as a direct blend of the information vectors

extracted such that the snapshots reconstruct as follows: q 2

V x, ti k ti k x i 1,. ...N , (16) i u jvk

j 1 i 1,.... , q. (21)

j 1

which is optimal enough to lead to the least square truncation error as

Substituting equation (20) into equation (21) yields eigen value problem, Pu u, V x,t N t x2

i 1,....N, (17) where ut u ....u t is the lth eigen vector equation (21) 1 q

m i k i k j 1

and P is a symmetric q q matrix defined by

q 1 v , v . Here v , v is the standard inner where is the mean for the total number of snapshot and ij q i j i j . 2

is the L norm, being the least value for any number of product, 2 v , v vx , t v x , t vx , t v x , t . basis functions ‘n’ over basis functions set satisfying n<<N. The peer status denoted by equation (17) is identified to detecting basis functions ‘ ’ which maximizes the normalized averaged projection of v onto given by,

i j 1 i 1 j N i N j

2

c


q

i i1

The eigen functions computed are normalized and recorded In a NARX neural network model appeared in Fig. as 1 2 .... q 0. The energy element of each 3. input u(t) and yield y(t) alongside set of tapped postpone

lines structure the information layer. eigen function is computed by,

E j q.

(22)

j

i

Appliciat1ion of singular value decomposition to the snapshot

ensemble Y y1,.....yus Rnns yields a set of left singular vectors U, which solves the nonlinear dynamic system such that, UWT Y, (23) where U Rnr denotes a left orthogonal singular basis vecto

r set,

is a dia

gonal m

atrix of singular values with Fig. 3: Internal architecture of NARX neural network

1 2... r 0 ,W s denotes a right n r

orthogonal singular basis vector set and r = rank(Y). Then the optimal solution of equation (23) is u k . The minimum L2 error for the approximated snapshots using POD basis is,

A two input layer nodes with ten-node hidden layer are utilized for the assessment with POD-ANN method. Training data is part as 500 for training and 200 for verification. Initial weights are random. To avoid local minima, every training process is replicated not less than 20

n

i i1

Yi j1

v j vj

2 N

j . 2 jk 1

times with initial weights. The model is trained on

of its quicker combination rate [32]. The hidden and the output layer of the above

While constructing the POD basis, choice of the snapshot ensemble plays a crucial role.

4. ARTIFICIAL NEURAL NETWORK MODEL

described NARX-ANN represented in Fig. 4 has been configured with hyperbolic tangent sigmoid and linear functions respectiveelxyase, x

Modeling and examination of a large number of the dynamic h1 x t , y t frameworks have been performed utilizing ANNs, just with

ex ex , (28)

vigorous training. For nonlinear dynamic system modeling, The nonlinear autoregressive with exogenous inputs (NARX) network is appropriated because of its amazing calculation capacity and prescient nature [31]. The paper proposes the utilization of POD-NARX for modeling VLSI interconnect. The NARXANN information comprises of one tapped postpone line for the info signal and another tapped defer line for the yield sign of the framework. The normal definition of the model having one yield for one information is given by

h2 xt , yt x, where, h1(.) and h2(.) stand for hidden and output layers respectively. No activation has been configured for input layers.

yt gut. Here, nonlinear function is represented as model can be depicted as:

g.(25)

and NARX

yt f yt 1,....yt X ,ut 1, .. ut Y, (26) Fig. 4: General Structure of ANN where X and Y are the most extreme slacks for info and yield separately. Here Y number of previous inputs and X number of previous outputs are used. If process associated time delay

is considered, then NARX can be depicted as,

yt f yt 1,....yt x,ut 1, ut y. (27)

This model is legitimately reached out to multi input- multi output problems. NARX model is implemented with single hidden layer feedforward neural network.

5. PERFORMANCE INDEX

Performance index of the model is quantified by mean squared error(MSE). The computation of MSE requires the full model output along with the ANN approximation. The error is obtained by calculating the difference between the above attributes. MSE is obtained by computing the mean of square of the difference error. MSE is also called risk function correlated with the full model solution. MSE is given as,

R


N

e . (30)

t

1 N ˆ 2 This section also discusses the performance of the presented (29) MSE yi yi .

i1

6. NUMERICAL RESULTS

This section discuses about computational results obtained by the use of POD-ANN MOR technique explained in section 3 and 4. Two interconnect models were validated. Nonlinear interconnect circuit [12, 30] and the telegraph equation [3].

Nonlinear interconnect circuit

Here the Nonlinear interconnect circuit is explained briefly. The circuit consists of linear passive components with unit capacitance and unit resistance, diode as nonlinear contribution, all expressed as elements with lumped parameters. The order of the original system N = 100 and reduced order POD-ANN model generated is of order q = 10. This system is given by

MOR as applied to nonlinear Telegraph equation.

Fig. 6: Examination of framework reaction figured with full nonlinear model, diminished request model utilizing POD and NARX neural system for input u(t) = 0.5 + cos(2πt/10)

x 2x1

□ 1

x2 1 e40x1 x2 ut, Fig. 7: Singular Values

x xi1 2xi xi1 e40xi 1 xi e 40 xi xi 1 ,2 i N 1, The intention of the present work is to ascertain whether the □ 1

x□ x N

N 1 xN 40xN 1 xN 1 reduction in model order can preserve accuracy of the full

order FD model. The following initial conditions as given by

For the current example, ANN has been trained with the following inputs:

is to generate

triangular wave. The full order solution is given in Fig. 5

equation (10) are assumed for the considered example,

vx,0 ex , v x,0 2ex. The boundary conditions which serve as input to the model are exponential functions of time, defined as v t e2t ,

Fig. 5 : Solution of nonlinear ciruit for different nodes v0 t e22t . (31)


100 recordings from each frequency have been considered for the snapshot ensemble. POD algorithm is applied on the snapshot ensemble. The resulting data is fed to ANN for training. The ANN was verified for input u(t) = 0.5 + cos(2πt/10). The results are shown in Fig. 6

Nonlinear Telegraph Equation


Nx1

To begin with, the eigen values with respect to the POD are obtained, which are shown in Fig. 7 in descending order, in order to investigate the performance of the MOR using ANN. Analytically solved exact solution, FDM and POD- ANN solution of 7th order for Telegraph equation is depicted in Fig. 8, Fig. 9 and Fig. 10 respectively.


Fig. 8: Exact solution of transmission line

Fig. 9: Full order solution from finite difference method

observed that the FDM solution v(x,t) closely matches with the exact solution. The same is observed from Fig. 12 throughout time t for x=2 [33].

Fig. 11: Plot of V(x, t) at t=1wrt x, x∈[0,2].

Fig. 12: Plot of V(x, t) at x=2 wrt t, t∈[0,1].

To quantify the model accuracy, we consider the mean square errors (MSE) (Table 1) of the Neural network with lower order and the full order FD model.

Table 1: PERFORMANCE OF POD AND NARX Neural network ON DIFFERENT MODELS

Model Method Mean Squared

Error (MSE)

Fig. 10: Neural network solution of transmission line

It is observed from figures that the POD-ANN solution closely matches with FDM and exact solution. It is noticed that the voltage develops exponentially with separation whenever case. While at a specific separation, there is an exponential rot in v(x,t). Fig. 11 demonstrates that the voltage v(x,t) has been drawn at a specific time t. It is

Nonlinear interconnect

Telegraph Equation

POD

NARXNN

POD

NARXNN

1.6994e−04

3.8038e−06

5.5542e−06

5.974e−06


CONCLUSION

A revamped algorithm for building macromodel of VLSI interconnect for variable force functions with variable frequency input and change in system parameters in time domain are proposed in this work. The presented model explores the advantages of linear model, POD and neural network. Immense model simulations validate the macromodel. Performance is substantiated by Mean Squared Error. It is also noted that, the model is not restricted to the training range but, also successfully extrapolates hence, making the work a novel one.

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Nagaraj S. received the B.E. degree in electrical engineering from University B.D.T. College of Engineering, Kuvempu University and M.Tech. degree in VLSI design and Embedded Systems from Visvesvaraya Technological

University (VTU), India. He has served as a teaching faculty for around 16 years in different engineering colleges. Currently he is a research scholar at BMS College of Engineering, VTU. His research interests include modeling and analysis of dynamic systems, reduced order modeling, embedded systems, artificial neural networks. He has presented and published papers in IEEE conferences and transactions.

Dr. Seshachalam. D has received B.E, M.E and Ph.D. degree from Bangalore University and Motilal Nehru National Institute of Technology, Allahabad, INDIA respectively. He is currently working as a professor in department of

Electronics and communication Engineering, BMS college of Engineering, Bangalore. His research areas include nonlinear control strategies in power electronics, System modeling, reduced order modeling applications in electrical engineering. He is also a member of IEEE. He has presented and published papers in IEEE conferences and transactions. He is also a reviewer for few IEEE sponsored conferences in India

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Artificial Neural Network Macro Model Of Vlsi Interconnect