THREE-DIMENSIONAL SIMULATION OF CARBON NANOTUBE, GRAPHENE AND SI-NANOWIRE BASED FIELD EFFECT TRANSISTORS

Presented ByExam Roll: 5126

Session-2011-2012Applied Physics, Electronics and

Communication Engineering

Objectives

A review on Nanodevices

Perform Simulation on different Nanodevices like Carbon Nanotube, Graphene and Nanowire based Field Effect Transistor to study their device characteristics.

To compare the results of simulation between these nanodevices.

OUTLINE Objective of this study Carbon Nanotube Schottky Barrier and Doped reservoir of CNT FET Parameters of CNT FET Graphene,Nanowire Results and Discussion Future Work Conclusion

Carbon Nanotube

Carbon nanotubes (CNTs) are allotropes of carbon with cylindrical Nanostructures.

Nanotubes are members of the fullerence structural family.

Their name is derived from their long, hollow structure with the walls formed by one-atom-thick sheets of carbon, called graphene.

These sheets are rolled at specific and discrete (“chiral") angles, and the combination of the rolling angle and radius decides the nanotube properties.

Schottky Barriers at the Nanotube- Metal Interface

Whenever materials of different work functions are connected together, there is a charge transfer and an equilibrium electric field. This field can bend theelectronic bands so that a barrier for the flow of electrons is created. Such abarrier is called a Schottky barrier .

Carbon Nanotubes FETs with infinite long doped carbon nanotube reservoirs CNT FETs, whose reservoirs are composed by semi-infinite doped carbon nanotubes. In order to mimic the positive charge due to the ionized donors, a positive fixed chargehas been imposed around the CNT so that the fraction of doping atoms on carbon atoms is about 10−3.

Structure parameter of Double Gate CNTFET with schottky contacts

Device Parameter of Double Gate CNTFET with schottky contacts

Structure of Double Gate Silicon Nanowire Transistor

Structure of Double Gate GNR FET with Schottky Contacts

Results and DiscussionBy Changing the dielectric Constant

Dielectric constant=3.9 Dielectric constant=4

Schottky Barriers Carbon Nanotubes FETs

Dielectric constant=4.2 Dielectric constant=4.4

Dielectric Constant=5 Dieletric Constant=5.1

I have done simulation by changing the dielectric constant from 4.00 to 5.1 and keeping the other parameters Constant.

Tox1(Top Oxide Thickness)=1.7nm,Tox2(Bottom Oxide Thickness)=50nm, S(Lateral spacing)=.6nm,L(Length Of The Channel)=15nm,N(Nanotube Chirality)=7,Source Potential=0V,Drain Potential=0.3V,Gate1 Bias=1.1V,Gate2=-1V,Volatge step=.1V and Final Volatge=1.1V.

From the graph , it is apparent that there is significant change in on/off ratio of the device while changing the dielectric constant .

There is significant change in the curve while dielectric constant of the material is held at 4.4.

Comments

Changing the Length of the Channel

I have done simulation by changing the dielectric constant from 4.00 to5.1 and keeping the other parameters :

Tox1(Top Oxide Thickness)=2nm,Tox2(Bottom Oxide Thickness)=2nm, S(Lateral spacing)=.6nm,N(Nanotube Chirality)=7,Source Potential=0V,Drain Potential=0.8V,Gate1 Bias=0.8V,Gate 2=0V,Volatge step=.1V and Final Volatge=.8V.

From the graph , it is apparent that there is significant change in on/off ratio of the device while changing the length of the channel .

From the table 1,it is apparent that ,on current of the device is decreasing with increasing length of the channel.

Comments

Graphene Nanoribbon with schottky contact

From the simulation of Graphene Nanoribbon with Schottky contact It is seen that Ion/Ioff ratio does not follow the ITRS roadmap [1]and it is comparatively smaller than CNTFET.

Double Gate Silicon Nanowire Transistor

.

From the simulation of Double Gate Silicon Nanowire Transistor, it is seen that it follows the International Roadmap for Semiconductors (ITRS) roadmap

Future Work

A wide range of simulation can be done by changing chirality, dielectric constant and also on the single gate and double gate of Graphne Nanoribbon using both Schottky contact and doped reservoir.

By doing this various effect like short channel effect, switching time, drain induced barrier lowering can be observed.

Also, due to time constraint read mode space approach cannot explored properly

. A wide range of simulation can also be done on Silicon Nanowire transistor to demonstrate the effect of subthreshold swing and drain induced barrie lowering

Conclusion

In this thesis work, an attempt has been made to simulate the performance of Field Effect Transistor with Nano structured channel medium. Realistic geometries of nano structures such as CNT, graphemeand Si nanowire have been used for this purpose.

Channel length, diaelectric material beneath the gate terminal and lateral spacing for CNT. For comparison, graphene and Si-Nanowire FET have been simulated too. On-off current has been calculated during the simulation for various gate voltages.

Single SWCNT (Single wall CNT) was considered in this analysis; therefore, high On/Off ratio was not achieved.

Due to the limitation of the simulator, multi-wall/ multiple number of CNT could not be used aschannel medium. However, higher On-Off ratio was realized for Si-Nanowire channel.