Ph.D Dissertation Defense Slides on Efficient VLSI Architectures for Image Enhancement Techniques

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This upload consists of Ph.D dissertation defense slides of the research topic "Efficient VLSI Architectures for Image Enhancement Techniques" of Visvesvaraya Technological University, Belgaum, Karnataka, India. For suggestions & comments mail me at : mchanumantharaju@gmail.com hanu2005@yahoo.com or contact me at : 9742290764

Text of Ph.D Dissertation Defense Slides on Efficient VLSI Architectures for Image Enhancement Techniques

  • 1.Introduction Motivation & Objectives Contributions Conclusions & Future Scope Ecient VLSI Architectures for Image Enhancement Techniques Ph. D Dissertation Defense M. C. Hanumantharaju - 1DS07MEN02 Research Scholar Dr. M. Ravishankar Research Advisor Department of Information Science and Engineering Dayananda Sagar College of Engineering, Bangalore-560078 March 7, 2014 M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 1/146

2. Introduction Motivation & Objectives Contributions Conclusions & Future Scope Ecient VLSI Architectures for Image Enhancement Techniques Ph. D Dissertation Defense M. C. Hanumantharaju - 1DS07MEN02 Research Scholar Dr. M. Ravishankar Research Advisor Department of Information Science and Engineering Dayananda Sagar College of Engineering, Bangalore-560078 March 7, 2014 M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 2/146 3. Introduction Motivation & Objectives Contributions Conclusions & Future Scope Outline 1 Introduction 2 Motivation & Objectives 3 Contributions AROF Architectures and Its FPGA Implementation Adaptive Color Image Enhancement using GMF Gaussian Image Enhancement: Algorithm & Architecture 4 Conclusions & Future Scope M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 3/146 4. Introduction Motivation & Objectives Contributions Conclusions & Future Scope Image Enhancement : An Introduction Image processing 2-D signal processing Improves characteristics, properties and parameters Image enhancement Key step in image processing Modies the attributes of an image Makes it appropriate for analysis, diagnosis, and display. Some of the image enhancement applications include Sharpening: improves car license plate number Contrast enhancement: medical image enhancement. Edge enhancement: enhances objects in aerial image. The realm of image enhancement wraps up Reconstruction & Restoration Filtering Segmentation Compression & Transmission M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 4/146 5. Introduction Motivation & Objectives Contributions Conclusions & Future Scope Image enhancement : An Example (a) Original Image (b) Enhanced Image M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 5/146 6. Introduction Motivation & Objectives Contributions Conclusions & Future Scope Challenges Image enhancement algorithms have numerous parame- ters to specify and that needs to be adjusted to obtain satisfactory results. Lack of integrated algorithms. Presently, image enhancement research demands better reconstruction of high quality images than possible with available researcher methods. Image enhancement algorithms depends on the input im- ages instead of adapting to its local features. Limited speed achieved in software implementation since image enhancement algorithms consists of large array of data. M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 6/146 7. Introduction Motivation & Objectives Contributions Conclusions & Future Scope Choice of Implementations General Purpose Processors (GPPs) Flexible. Technology limits the pro- cessing speed. Limited performance. Instruction sets are not suitable for fast processing of high resolution images. GPP instructions are se- quential and hence system throughput decreases. Digital Signal Processors (DSPs) Improvement over GPPs. Falls between GPPs and ASICs. Inadequate pipelining and parallel processing. Fixed architectures that limits the performance. Parallel operation is possi- ble with multiple DSPs. M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 7/146 8. Introduction Motivation & Objectives Contributions Conclusions & Future Scope Choice of Implementation Cont., Application Specic ICs (ASICs) Fast & ecient. Fixed circuit. Large time to market. High cost, except for large volume commercial appli- cations. No optimization. Field Programmable Gate Arrays (FPGAs) High throughput. Dynamically recong- urable. Massive pipelining and parallelism. Cost eective. Attractive choice for real- ization of DIP algorithms. Present Research Work uses FPGAs for Implementation M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 8/146 9. Introduction Motivation & Objectives Contributions Conclusions & Future Scope Motivation The motivation behind this work is to bring out the fea- tures in the image that are not clearly visible owing to dierent illumination conditions. Current market demands better reconstruction of high quality images than is possible with currently available research outputs. Limitations of image enhancement schemes: dicult to tune parameters, decit of integrated algorithms, lack of quantitative standard, dependence on inputs instead of adapting to local features. Software implementation : inadequate speed. Hardware implementation of image enhancement algo- rithm is in great demand for applications such as medical, forensic and surveillance etc. M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 9/146 10. Introduction Motivation & Objectives Contributions Conclusions & Future Scope Objectives Development of ecient VLSI architectures for image en- hancement algorithms. Design & simulate the algorithm using software approach (C or Matlab). Test the algorithm for images having dierent environ- mental conditions. Realize the algorithm using HDL (Verilog or VHDL). Verify both software & hardware implementation results. Evaluate the eciency of the algorithm using performance metrics such as PSNR, contrast, luminance, IEF and wavelet energy etc. Compare proposed approach with other existing methods. M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 10/146 11. Introduction Motivation & Objectives Contributions Conclusions & Future Scope Hardware Design Flow M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 11/146 12. Introduction Motivation & Objectives Contributions Conclusions & Future Scope AROF Architectures and Its FPGA Implementation Adaptive Color Image Enhancement using GMF Gaussian Image Enhancement: Algorithm & Architecture Adaptive Rank Order Filter (AROF) Non-linear lter. AROF is a powerful technique for denoising an image cor- rupted by salt & pepper noise or impulse noise. Impulse noise is often introduced into digital images dur- ing image acquisition or Interference during transmission. AROF not only adapts lter output but also window size : iterative algorithm. AROF window expands : All Pixels within the current window are noisy or median itself is noisy. M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 12/146 13. Introduction Motivation & Objectives Contributions Conclusions & Future Scope AROF Architectures and Its FPGA Implementation Adaptive Color Image Enhancement using GMF Gaussian Image Enhancement: Algorithm & Architecture Adaptive Rank Order Filter : Flow Chart M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 13/146 14. Introduction Motivation & Objectives Contributions Conclusions & Future Scope AROF Architectures and Its FPGA Implementation Adaptive Color Image Enhancement using GMF Gaussian Image Enhancement: Algorithm & Architecture Noisy Lena (90% Noise Level) and Restored Image Figure: First Image : Lena Image with High Noise Density (90% Salt & Pepper Noise) Second Image : Restored Lena Image using AROF. M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 14/146 15. Introduction Motivation & Objectives Contributions Conclusions & Future Scope AROF Architectures and Its FPGA Implementation Adaptive Color Image Enhancement using GMF Gaussian Image Enhancement: Algorithm & Architecture Related Work Andreadis et al.1 proposed FPGA implementation of real- time adaptive image impulse noise suppression. However, the system slows down for highly corrupted images. An ecient hardware implementation of weighted median lter using cumulative histogram proposed by Fahmy et al.2 reduces impulse noise satisfactorily. However, hard- ware complexity is high for smaller window size. 1 I. Andreadis, G. Louverdis, Real-time Adaptive Image Impulse Noise Sup- pression, IEEE Tran. on Instrumentation and Measurement, Vol. 53, Issue 3, pp. 798-806, 2004. 2 S. A Fahmy, P.Y.K. Cheung and W. Luk, Novel FPGA-based implementa- tion of median and weighted median lters for image processing, International Conference on Field Programmable Logic and Applications, pp. 142-147, 2005. M. C, Hanumantharaju, Ph.D Dissertation Defense on Development of VLSI Architectures for Image Enhancement Techniques: slide 15/146 16. Introduction Motivation & Objectives Contributions Conclusions & Future Scope AROF Architectures and Its FPGA Implementation Adaptive Color Image Enhancement using GMF Gaussian Image Enhancement: Algorithm & Architecture Related Work Cont.., Meena et al.3 proposed a optimized architectures for rank Order lter. However, optimizations are done for sorting network with out considering noise le