Sam PalermoAnalog & Mixed-Signal Center
Texas A&M University
ECEN620: Network TheoryBroadband Circuit Design
Fall 2014
Lecture 6: PLL Transient Behavior
Announcements, Agenda, & References
• HW1 is due today by 5PM
• PLL Tracking Response• Phase Detector Models• PLL Hold Range• PLL Acquisition
• Chapter 5 of Phaselock Techniques, F. Gardner, John Wiley & Sons, 2005.
• Chapter 4 of Phase-Locked Loops for Wireless Communications, D. Stephens, Kluwer, 2002.
2
Linear PLL Model
• If the phase input amplitude is small, then the linear model can be used to predict the transient response
( ) ( )( ) ( ) ( )
NsFKKs
s
NsGs
ssEVCOPDref
e
+=
+=
ΦΦ
=1
1
• Ideally, we want this to be zero• Phase error generally increases with
frequency due to this high-pass response
3
• Phase Step Response
( )( ) ( )
step decayingly exponentiaan is ResponseTransient
:ResponseTransient
step phase a with zero be shoulderror Phase
0limlim :Theorem Value Final theUsing
1
2
00
tK
DC
DCss
DCeKss
s
KsssssE
s
−−
→→
∆Φ=
+
∆Φ
=+∆Φ
=
∆Φ
L
First-Order PLL Tracking Response
( ) ( )N
KKKKs
s
NKKKs
ssEKsF VCOPDdBDC
dBVCOPD
13
311 , , ==
+=
+== ω
ω
4
• Frequency Offset (Step) Response
( )( ) ( )
( )
step risingly exponentiaan is ResponseTransient
1 :ResponseTransient
offsetfrequency again with loop the tonalproporitioinversely iserror phase The
limlim :Theorem Value Final theUsing
21
2
2
020
tK
DCDC
DCDCss
DCeKKs
ss
KKsssssE
s
−−
→→
−∆
=
+
∆
∆=
+∆
=
∆
ωω
ωωω
L
First-Order PLL Tracking Response
( ) ( )N
KKKKs
s
NKKKs
ssEKsF VCOPDdBDC
dBVCOPD
13
311 , , ==
+=
+== ω
ω
5
• Frequency Ramp Response
( )
( )
( )( ) ( )
( )1 :ResponseTransient
finite is ifinfinity togrow error will phase The
limlim :Theorem Value Final theUsing
2
rad/sec of rate aat ith timelinearly w changing isfrequency input that theAssume
231
3
2
030
2
2
−+Λ
=
+
Λ
∞⇒+Λ
=
Λ
Λ=
Λ
−−
→→
tKDC
DCDC
DC
DCss
ref
DCetKKKs
ss
K
KsssssE
s
tt
L
φ
First-Order PLL Tracking Response
( ) ( )N
KKKKs
s
NKKKs
ssEKsF VCOPDdBDC
dBVCOPD
13
311 , , ==
+=
+== ω
ω
6
( ) ( ) ( )NKKK
KsKs
ss
ssKK
NsssE
sssF VCOPD
DCDCDCnn
VCOPD
n
=
++
+
++
+
+=
++
+
=++
+= ,
1
1
2 ,
11
2121
22
2122
2
21
2
τττττ
ττωζω
ω
τττ
• Phase Step Response
( )( )
yourself thiscompute Try to
1
1
:ResponseTransient
step phase a with zero be shoulderror Phase
01
1
limlim :Theorem Value Final theUsing
2121
22
211
2121
22
21
2
00
++
+
++
+
+
∆Φ
=
+
+
+
++
+
+∆Φ=
∆Φ
−
→→
τττττ
ττ
τττττ
ττ
DCDC
DCDCss
KsKs
ss
s
KsKss
ssssE
s
L
Second-Order Type-1 PLL Tracking Response
7
( ) ( ) ( )NKKK
KsKs
ss
ssKK
NsssE
sssF VCOPD
DCDCDCnn
VCOPD
n
=
++
+
++
+
+=
++
+
=++
+= ,
1
1
2 ,
11
2121
22
2122
2
21
2
τττττ
ττωζω
ω
τττ
• Frequency Offset (Step) Response
( )( )
yourself thiscompute Try to
1
1
:ResponseTransient
offsetfrequency again with loop the tonalproporitioinversely iserror phase The
1
1
limlim :Theorem Value Final theUsing
2121
22
212
1
2121
222
21
2
020
++
+
++
+
+
∆
∆=
+
+
+
++
+
+∆=
∆
−
→→
τττττ
ττω
ω
τττττ
ττω
ω
DCDC
DCDCDCss
KsKs
ss
s
KKsKss
ssssE
s
L
Second-Order Type-1 PLL Tracking Response
8
( ) ( ) ( )NKKK
KsKs
ss
ssKK
NsssE
sssF VCOPD
DCDCDCnn
VCOPD
n
=
++
+
++
+
+=
++
+
=++
+= ,
1
1
2 ,
11
2121
22
2122
2
21
2
τττττ
ττωζω
ω
τττ
• Frequency Ramp Response
( )( )
yourself thiscompute Try to
1
1
:ResponseTransient
finite is ifinfinity togrow error will phase The
1
1
limlim :Theorem Value Final theUsing
2121
22
213
1
2121
223
21
2
030
++
+
++
+
+
Λ
∞⇒
+
+
+
++
+
+Λ=
Λ
−
→→
τττττ
ττ
τττττ
ττ
DCDC
DC
DCDCss
KsKs
ss
s
K
KsKss
ssssE
s
L
Second-Order Type-1 PLL Tracking Response
9
• Phase Step Response
( )( )
++
∆Φ
=
++
∆Φ=
∆Φ
−
→→
RCKKss
ss
RCKKsss
sssEs ss
2
21
2
3
00
:ResponseTransient
step phase a with zero be shoulderror Phase
0limlim :Theorem Value Final theUsing
L
Second-Order Type-2 PLL Tracking Response
( ) ( )N
RKKK
RCKKss
sss
ssEs
RCsR
sF VCOPD
nn
=++
=++
=
+
= ,2
,
1
2
2
22
2
ωζω
10
++
∆Φ−
RCKKss
ss 2
21 :ResponseTransient L
Second-Order Type-2 PLL Phase Step Response
KRCRCn
21
2==
ωζ
11
• Frequency Offset (Step) Response
( )( )
++
∆
=
++
∆=
∆
−
→→
RCKKss
ss
RCKKsss
sssEs ss
2
2
21
22
3
020
:ResponseTransient
PLL 2-Type a with zero togoeserror phase The
0limlim :Theorem Value Final theUsing
ω
ωω
L
Second-Order Type-2 PLL Tracking Response
( ) ( )N
RKKK
RCKKss
sss
ssEs
RCsR
sF VCOPD
nn
=++
=++
=
+
= ,2
,
1
2
2
22
2
ωζω
12
Second-Order Type-2 PLL Frequency Step Response
KRCRCn
21
2==
ωζ
++
∆−
RCKKss
ss 2
2
21 :ResponseTransient ω
L
13
• Frequency Ramp Response
( )( )
++
Λ
Λ=
++
Λ=
Λ
−
→→
RCKKss
ss
RCKKsss
sssEs n
ss
2
2
31
223
3
030
:ResponseTransient
lag phase dynamic a with rampfrequency acan track PLL 2-order type-secondA
limlim :Theorem Value Final theUsing
L
ω
Second-Order Type-2 PLL Tracking Response
( ) ( )N
RKKK
RCKKss
sss
ssEs
RCsR
sF VCOPD
nn
=++
=++
=
+
= ,2
,
1
2
2
22
2
ωζω
14
Second-Order Type-2 PLL Frequency Ramp Response
KRCRCn
21
2==
ωζ
++
Λ−
RCKKss
ss 2
2
31 :ResponseTransient L
15
Ideal Phase Detector
• An ideal phase detector has the same gain (slope) over a ±2π range
• This allows the linear PLL model to be used for all phase relationships
16
Real Phase Detectors
• Many phase detectors are nonlinear and do not display the same gain for a given phase relationship
• This implies that the PLL cannot be described by the linear model for large input phase deviations
17
PLL Frequency Step Response:Linear vs Behavioral Model
• Due to non-linearities in loop components (primarily the PD), a real PLL’s response can vary significantly from the linear model
18
PLL Hold Range (Sinusoidal PD)• A PLL Hold Range is the input frequency range over which the PLL can
maintain static lock
( )rad/sec :Range Hold
todconstraine isfrequency lock the,1 exceedcannot sine Since
sin
iserror phase thedetector, phase sinusoidal aWith
:2-TypeOrder -Second
:1-TypeOrder -Second
:Order-First
isError Phase State-Steady theModelLinear w/
1
DCH
DC
DCe
DC
VCOPDDC
VCOPDDC
DCe
K
K
K
K
NKKK
NKKKK
K
=∆
≤∆
∆=
∞=
=
=
∆=
ω
ω
ωφ
ωφ
• The hold range is finite for a type-1 PLL, and theoretically infinite for a type-2 PLL. However in practice it will be limited by another PLL block, such as the VCO tuning range.
19
First-Order PLL Phaselock Acquisition (Sinusoidal PD)
( )
( )
( )
orefref
o
ePD
cVCOo
t
K
tvK
KsF
ωωωω
ω
φ
ω
−=∆
+
==
and is phaseinput
thesuch that , fromdifferent frequency aat is signalinput theAssume
sin :OutputDetector Phase Sinusoidal
:Frequency ousInstantane VCO
1
PD sinusoidal a with PLLorder -first simple a Assuming
1
20
First-Order PLL Phaselock Acquisition (Sinusoidal PD)
( ) ( ) ( ) ( )( ) ( )
( ) ( )( ) ( )
( ) ( )( ) PDVCOee
out
t
oePDVCOorefoutrefe
out
t
oePDVCOoout
t
ocVCOoout
KKKtKdt
t
dKKt
dKKtdvKtt
=−∆=
−−−=−=
++=++=
∫
∫∫
wheresind
equation aldifferentinonlinear following theyields time w.r.t. thisatingDifferenti
0sin
iserror phase PLL The
0sin0
is phaseoutput PLL The
φωφ
φττφωωφφφ
φττφωφττωφ
21
First-Order PLL Hold Range (Sinusoidal PD)
( ) ( )( )
( )
K
K
Kdt
t
e
ee
≤∆
∆=
=−∆=
ω
ωφ
τφωφ
todconstraine isfrequency lock the,1 exceedcannot sine Since
sin
0sind
locked, is PLL theIf
( )rad/sec :Range Hold KH <∆ω
22
First-Order PLL Phaselock Acquisition (Sinusoidal PD)
( )ee
KKφωφ sin
Kby equation aldifferenti PLLorder -first thegNormalizin
−∆
=•
unstable are nulls slope-positive while
points,lock stable are nulls slope-Negative
0 wherenulls 2 are thereplot, plane-phase In the =dt
d eφ
• Every cycle (2π interval) contains a stable null, thus φecannot change by more than one cycle before locking
• There is no cycle slipping in the locking process• A cycle slip occurs when the phase error changes by more
than 2π without locking
Ke
•φ Error,Frequency Normalized
eφ Error, Phase
23
( )ee
KKφωφ sin−
∆=
•
0 Here =∆Kω
First-Order PLL Phaselock Acquisition Time (Sinusoidal PD)
( ) ( )( ) ( )
( ) ( )
( ) ( )
( )
tlysignifican increasecan andion approximatlinear thisfrom
deviate willresponse thelarge, is 0 if However,
0
response step phase modellinear theissolution eapproximat the
,sinsuch that small, is 0 and zero is If
0sin
solveformally toneed we time,acquistionphaselock thefind order toIn
e
Ktoute
eee
out
t
oePDVCOe
et
dKKtt
φ
φφ
φφφω
φττφωφ
−−=
≈∆
−−∆= ∫
24
( )ee
KKφωφ sin−
∆=
•
1.1 −=∆Kω
• If the frequency offset exceeds the PLL hold range, the phase error will oscillate asymmetrically as the PLL undergoes cycle slips
First-Order PLL Lock Failure (Sinusoidal PD)
First-Order PLL VCO Control Voltage
( )rad/sec :Range Hold KH <∆ω
25
Second-Order Type-2 PLL PhaselockAcquisition (Sinusoidal PD)
( )
( ) ( ) ( ) ( )( ) ( )( )
( ) ( ) ( ) ( )( ) ( )( ) ( )0sin1sin0
is phaseoutput PLL The
sin1sin1
as expressed becan domain - timein the responsefilter The
11
PD sinusoidal a with PLL 2-order type-second a Assuming
0 010 1
2
011
2
011
2
11
2
1
2
out
t t
e
t
ePDVCOoout
t
ocVCOoout
t
ePDePD
t
eec
dddKKtdvKtt
dKKdvtvtv
ssssF
φτττφτ
ττφττωφττωφ
ττφτ
τφττττ
τττ
τττ
ττ
+
++=++=
+=+=
+=+
=
∫ ∫∫∫
∫∫
26
Second-Order Type-2 PLL PhaselockAcquisition (Sinusoidal PD)
( ) ( )( ) ( )( ) ( )
( ) ( )
+−=
−
+−−=−=
•••
∫ ∫∫
eeePDVCOe
out
t t
e
t
ePDVCOorefoutrefe
KK
dddKKt
φτ
φφττφ
φτττφτ
ττφττωωφφφ
sin1cos
equation aldifferentinonlinear following theyields time w.r.t. twice thisatingDifferenti
0sin1sin
iserror phase PLL The
11
2
0 010 1
2
27
Second-Order Type-2 PLL PhaselockAcquisition (Sinusoidal PD)
( ) ( ) 0sincos2
following theyieldsequation aldifferentinonlinear theinto thisngSubstituti
4 ,
arefactor damping andfrequency natural thePLL, 2-TypeOrder -Second For this
2
1
22
1
2
=++
==
•••
eneene
VCOPDVCOPDn
KKKK
φωφφζωφ
ττζ
τω
• No closed form solution exists, and numerical techniques are required to solve
28
Second-Order Type-2 PLL PhaselockAcquisition (Sinusoidal PD)
( ) ( ) 0sincos2 2 =++•••
eneene φωφφζωφ
Acquisition with a phase error
time vs and •
ee φφee φφ vs :Plot Plane Phase
•
29
Second-Order PLL Phase Plane Plots (Sinusoidal PD)
( ) ( ) 0sincos2 2 =++•••
eneene φωφφζωφ
• An unstable singularity is called a Saddle Point
• A trajectory that terminates on a saddle point is called a “Separatrix”
• If a trajectory lies between the 2 separatrices, it will lock without cycle slipping
• If a trajectory lies outside the 2 separatrices, it will cycle slippling one or more times before locking (if at all)
30
Second-Order PLL Pull-Out Range and Lock Time (Sinusoidal PD)
( )
( )
( )
( )
(Hz) 41
2
,11 Assuming
(Hz)
bandwidth noise PLL theis Here,
10% than lesserror phasefor
2.44
as edapproximat becan timeacquistion PLL therange,out -pull than theless is stepfrequency a If
1.4 and 0.5between for
18.1
11
2
1
2
0
2
3
2
+=
+=+
=
=
∆+=+=
+≈∆
∫∞
ζζω
τττ
ττ
ω
ζ
ζωω
nL
L
L
Lnfreqphaseacq
nPO
B
ssssF
dffHB
B
Bfttt
• The Pull-Out Range is the maximum frequency step that can occur before the loop locks without cycle slipping
31
Second-Order PLL Locking Outside of the Pull-Out Range (Sinusoidal PD)
• Multiple cycle slips are observed before the loop locks
32
Next Time
• Phase Detector Circuits
33