Lab4: Preemptive Multitasking - Systems Software and …Overview 3 •Lab 4 is LONG. 3325 lines, 19756 words, and 134,143 chars! •Due: < 5 weeks from now (Apr 13)

Lab4: Preemptive MultitaskingMansour Alharthi

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Overview

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• Lab 4 is LONG.

Overview

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• Lab 4 is LONG. 3325 lines, 19756 words, and 134,143 chars!• Due: < 5 weeks from now (Apr 13)

Our OS (Up to Lab3)

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Our OS (Up to Lab3)

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EL0

EL1

EL2

EL3

Almost everything is here

User

Kernel

Hypervisor

Monitor

Our OS (Up to Lab3)

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EL0

EL1

EL2

EL3

Almost everything is here

Wait, when did we move to EL2 from EL3?

User

Kernel

Hypervisor

Monitor

Our OS (Up to Lab3)

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kern/src/init/init.s

Our OS (Up to Lab3)

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EL0

EL1

EL2

EL3

FAT

User

Kernel

Hypervisor

Monitor

Memory Allocator Shell

Our OS (after Lab4)

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EL0

EL1

EL2

EL3

User

Kernel

Hypervisor

Monitor

FATMemory Allocator

Shell IRQVirtual

Memory Management

Process Scheduler

P P P P P P

Exception Handler

Overview

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Phase 1: ARM Architecture (5 subphases).

Phase 2: It’s a Process (5 subphases).

Phase 3: Memory Management Unit (2 subphases).

Phase 4: Programs In The Disk (2 subphases).

Our OS – Before Lab 4

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EL0

EL1

EL2

EL3

Hardware

SD Card

DRAM

TimerFATMemory Allocator

Shell

Our OS – Lab4 Phase 1

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EL0

EL1

EL2

EL3

Hardware

SD Card

DRAM

1. Move to EL1 2. Configure ARM exception vector. Timer

FATMemory Allocator

ShellException Handler


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EL0

EL1

EL2

EL3

Hardware

SD Card

DRAM

Timer

P

1. Create incomplete process implementation

4. Implement sleep syscall handler.

PP

2. Configure IRQ with timer interrupts.

3. Create a process scheduler & process queue.

FATMemory Allocator

ShellException Handler

IRQProcess

Scheduler


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EL0

EL1

EL2

EL3

FATMemory Allocator

Shell

Hardware

SD Card

DRAM

Exception Handler

Timer

P

IRQProcess

Scheduler

Virtual Memory

Management

MMU

1. Switch processes to use virtual addresses.

3. Create MMU Page tables as per our design.

PP

2. Create VMM & enable MMU.


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EL0

EL1

EL2

EL3

FATMemory Allocator

Shell

Hardware

SD Card

DRAM

Exception Handler

Timer

IRQProcess

Scheduler

Virtual Memory

Management

MMU

P P P

1. Complete process implementation by loading programs from disk.

2. Implement more syscallhandlers & run user level programs from the disk.

Our OS – After Lab4

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EL0

EL1

EL2

EL3

FATMemory Allocator

Shell

Hardware

SD Card

DRAM

Exception Handler

Timer

IRQProcess

Scheduler

Virtual Memory

Management

MMU

P P PP P

Initialize:

Flow of our process scheduler (context switching)

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Exception Handler

Timer

IRQProcess

Scheduler

Flow of our process scheduler (context switching)

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P1HANDLER

init/vectors.s

context_save

init/vectors.s

Switch to EL1handle_exception()

traps.rs

switch()

process/scheduler.rs

Inside the scheduler:1. Save P1 trap frame2. Push P1 to end of Q3. Find the next Ready (P2) 4. Set trap frame to P2

P2HANDLER

init/vectors.s

context_save

init/vectors.s

handle_exception()

traps.rs

Switch to EL0

Return

Call

context_restore

init/vectors.s

Fall through

Virtual Vs Physical Layout (Kernel View)

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Virtual Space Physical Space

0x0

0x4000_0000

IO

0x3F00_0000

memory_map() end

0x0

0x4000_0000

IO

All regions mapped duringkernel initialization

Allocated on demand usingAllocator

Virtual Vs Physical Layout (User View)

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Virtual Space Physical Space

0x0

0x4000_0000

IO

0x3F00_0000

memory_map() end

0xffff_ffff_c000_0000

0xffff_ffff_ffff_ffff

On demand page mapping and allocation using allocator

Q&A

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Documents

Lab4: Preemptive Multitasking - Systems Software and …Overview 3 •Lab 4 is LONG. 3325 lines, 19756 words, and 134,143 chars! •Due: < 5 weeks from now (Apr 13)