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ITRS Conference July 2007 , San Francisco, CA 12007 ITRS DRAFT DO NOT PUBLISH
ITRS Factory Integration (FI) UpdateMani Janakiram
July 2007
San Francisco, CA
FI Global Co-Chairs:Europe: Arieh GreenbergJapan: Shige Kobayashi, Michio HonmaKorea: C. S. Park, S. H. ParkTaiwan: Thomas ChenUS: Mani Janakiram
July 2007 Meeting Attendees: Daniel Babbs, Michio Honma, Melvin Jung, Al Chasey, Mani Janakiram, Tom Jefferson, Shige Kobayashi, Bill Miller, Mikio Otani, Mutaz Haddadin, Gopal Rao, Dave Eggleston, Kandi Collier, Makoto Yamamoto, Adrian Pike, Phil Naughton, Mahmoud Aghel, Takayuki Nishimura, Brad Van Eck, Eric Englhardt, Andreas Neuber, Rex Wright, Terry Francis, James Moyne, Bevan Wu
ITRS Conference July 2007 , San Francisco, CA 22007 ITRS DRAFT DO NOT PUBLISH
Agenda
1. Scope and Difficult Challenges
2. Technology Requirements & Potential Solutions
3. 2007 Updates Summary
4. Top FI Focus Areas Summary
5. Factory Integration Cross-Cut Issues
6. Summary
ITRS Conference July 2007 , San Francisco, CA 32007 ITRS DRAFT DO NOT PUBLISH
Factory Integration Scope and Drivers
WaferMfg
ChipMfg
ProductMfg
Dis
trib
uti
on
• FEOL• BEOL
• Probe/Test• Singulation
• Packaging• Test
Si SubstrateMfg
ReticleMfg
Increasing cost &Cycle time implications
Factory is driven by Cost, Quality, Productivity, and SpeedReduce factory capital and operating costs per functionFaster delivery of new and volume products to the end customerEfficient/Effective volume/mix production, high reliability, & high equipment reuseEnable rapid process technology shrinks and wafer size changes
FactoryOperations
ProductionEquipment AMHS Factory Information
& Control Systems Facilities
UI
ITRS Conference July 2007 , San Francisco, CA 42007 ITRS DRAFT DO NOT PUBLISH
Key Technologies that will Impact Factory Design 2007 and future years were targeted to meet productivity and capture technology
requirements Key process & device technology intercepts that will impact the factory design are
Extreme Ultraviolet Litho (EUVL), New Device Structures, new materials, wafer size conversion & huge productivity improvements
Economic and business challenges are equal to our manufacturing and process technology challenges in scope and breadth to attain efficiency and effectiveness
Year 2007 2008 2009 2010
Technology trend (nm)
65 55 50 45
Wafer Size (mm) 300 300 300 300
Near Term Years
Long Term Years
Year 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020
Technology trend (nm) 40 35 32 28 25 22 20 18 16 14
Wafer Size (mm) 300 450 450 450 450 450 450 450 450 450
Next Wafer Size in Production?
Planning for 300’/450mm
EUVL in Production?New Device Structures?
ITRS Conference July 2007 , San Francisco, CA 52007 ITRS DRAFT DO NOT PUBLISH
FI Sub team –2007 UpdateSubteam 2007 Update & 2008 Plans
1 Factory Operations (FO)
Focus: 1) Reduce Lot Cycle times, 2) Improve Equipment Utilization, 3) Reduce Losses from High Mix
Updated the tables and included small lot metrics in the technology requirement table to reflect various biz cases. Team will start working on overall visualization and impact of 300’/450mm on Factory Operations. Predictive PM and adv visualization were some of the key potential solutions
2 Production Equipment (PE)
Focus: 1) NPW reduction, 2) Reliability Improvement, 3) Run rate (throughput) improvement 4) Equipment Intrinsic efficiency
Updated the tables and included equipment induced non value added time metrics in the technology requirement table. Team will work on 300’/450mm equipment needs and equip eng data contents. Mini-batch and SWP vs. Batch processing were some of the key potential solutions
3 Automated Material Handling Systems (AMHS)
Focus: 1) Increase throughput for Traditional and Unified Transport, 2) Reduce Average Delivery times, 3) Improve Reliability
Updated the tables and included survey results on Moves per Hour metrics in the technology requirement table. Team will work on various AMHS design solutions to accommodate high mix and 300’/450mm needs. Flexible lot size transport, capable of handling split and merge were some of the key potential solutions.
4 Factory Information & Control Systems (FICS)
Focus: 1) Increase Reliability, 2) Increase Factory Throughput,
3) Reduce or Maintain Mask Shop Cycle Time,
Updated the tables and included information on time synchronization and emerging challenges. Team will work on data quality issues and data transmission needs. Integrated FICS to facilitate data searches and information correlation on process and operational data was some of the key potential solutions.
5 Factory Facilities (FF)
Focus: 1) Reduce Costs 2) Utility 3) Footprint
Updated the tables and included energy conservation metrics in technology requirement table. Team will work on Green Fab definition and DFF needs in addition to finalizing potential solutions for equipment sleep mode.
ITRS Conference July 2007 , San Francisco, CA 62007 ITRS DRAFT DO NOT PUBLISH
2007 FI Focus Area Summary
Focus Areas Description
300’/450mm Transition 30% improvement in cost/cm2 and 50% cycle time reduction in days per mask layer is the goal. FI is mapping the ISMI and JEITA guidelines to each FI sub-teams areas of expertise from technology requirements and potential solutions perspective
Energy conservation/ Equipment Sleep Mode
Reduce facility operation cost by enabling facility demand based utilization model – including energy conservation
Airborne Molecular Contamination (AMC) needs
Fab AMC requirements have been defined but AMC at the equipment and FOUP level needs to be understood and defined
“Proactive Visual” manufacturing
Conquer the high mix, small lot, productivity losses and provide metrics for fab operations.
FI Cross-cut issues Addressed FI key issues with FEP (SWP vs. Batch), Litho (EUVL, APC), ESH (Green fab, Energy), YE (Temp & Humidity) and Metrology (Wafer map standards). Continue to work on 300’/450mm needs.
ITRS Conference July 2007 , San Francisco, CA 72007 ITRS DRAFT DO NOT PUBLISH
Next Generation 300’/450mm Guidelines
300mm プライム推進派JEITA Guidelines
Equipment maker Inputs
ISMI Guidelines
NG Factory Guidelines combined with ITRS TR & PS
ISMI Guideline AMHS Prod Eqp. FICS Facilities Operations25 wafer carrierFront opening carrierCarrier purging100% automated handlingReticle transportCommon reference platformBuffering exclusion zonePredictive MaintenanceParallel Maintenance and OperationSmart Idle ModeAdaptor PlateSetup Time / FWD eliminationSWP / mini-batchFlexible equipment CapacityContinuous Material ProcessingWafer level control during processingSingle, dedicated point of factory controlEquipment data for external monitoringMaterial Redirection (non unicassette) ops
Primary area(s) of relevanceSecondary area(s) of relevance
Factory Integration Sub-TeamsSOLUTIONS REQIURED - MAPPING
SourceXTime
DestXTimeSource STK
Wait TimeDest STKWait Time
Inter-BayXTimeSource Tool
Wait TimeDest ToolWait Time
Seasoningetc
Wafer by waferProcess
StartSpeed etcTool Tool
STK STK
Wafer PointOf View
2
6 45
3
ITRS FI will work on combined 300’/450mm guidelines to address FI challenges, technology requirements and potential solutions
2005 2006 2007 2008 2009 2010 2011 2012?
2005 2006 2007 2008 2009 2010 2011 2012
Carrier & lot-sizedetermination
Direct TransportStandards
Production EquipmentStandards
Factory Control System Standards
Interoperability Testing& Reliability Verification
450mm waferStandards
Courtesy: JEITA/ISMI
ITRS Conference July 2007 , San Francisco, CA 82007 ITRS DRAFT DO NOT PUBLISH
Energy conservation/ Equipment Sleep ModeReduce facility operation cost by enabling facility demand based utilization model – including energy conservation
Courtesy: Factory Facilities/Toshiba/SEAJ
0
2
4
6
8
10
12
14
16
22:00 23:00 0:00 1:00 2:00
電力
(kW
)
Standby Processing
Ele
ctr
ic p
ow
er
(kW
)
Time
Standby/processing=100%
Standby/processing=75%
0
10
20
30
40
50
60
70
80
0 10 20 30 40 50 60 70 80
Ave
rag
e ef
fect
ive
elec
tric
po
wer
du
rin
g s
tan
db
y (k
W)
Average effective electric power during processing (kW)
1:1 RATIO
• Align on Idle mode definition• Select tools for Sleep mode• Engage others to define solution
ITRS Conference July 2007 , San Francisco, CA 92007 ITRS DRAFT DO NOT PUBLISH
AMC Concepts and Requirements from FI perspective
WaferFOUP
Outgassing
Emissions
MonitoringCleaning
MonitoringCleaning
Tool/Mini-environment
Em
issions
Cleanroom(Outgassing)
Emissions
Inlet air
MonitoringCleaning
Recirc airhandling
Make-up airhandling
StockerOperatorsSegregationSpillagesExhaust
CF
CF
CF
CF…Chemical filtration
Wafer Environment Control such as Cleanroom, SMIF POD, FOUP, etc….not necessarily the cleanroom itself but wafer environment.
Number of particles (/m3) [B] ISO CL 2 ISO CL 2 ISO CL 2 ISO CL 2
Airborne Molecular Contaminants in gas phase (pptM)) [C] [H] [R]
Lithography—bases (as amine, amide, and NH3) 750 750 750 500
Gate—metals (as Cu, E=2×10–5
) [I] 0.15 0.1 0.1 0.07
Organics (molecular weight ≥ to C7H16) normalized to
hexadecane (C16H34) equivalent5000 4500 4000 3500
Salicidation contact—acids (as Cl–, E=1×10–5
) 100 100 100 10
Salicidation contact—bases (as NH3, E=1×10–6
) 1000 1000 1000 100
Dopants [E] 10 10 10 10
Airborne Molecular Contaminants, Surface Deposition Limits (for Si Witness Wafer, 24-hour Exposure to Closed FOUP, Pod, Mini-environment or Air)SMC (surface molecular condensable) organics on
wafers, ASTM 1982–99, ng/cm2 [O]
4 2 2 2
Front-end processes, bare Si, total dopants added to 24-
hour witness wafer, atoms/cm2 [E] [P]
2.00E+12 2.00E+12 2.00E+12 1.00E+12
Front-end processes, bare Si, total metals added to
witness wafer, atoms/cm2 [G] [Q]
2.00E+10 2.00E+10 2.00E+10 2.00E+10
Wafer
Wafer/Tool environment
Fabenvironment
FactoryIntegrationRoadmap
Yield Enhancement Roadmap
TechnologyRequirements
AMC limits are addressed in the YE TWG, and the WECC sub TWG
Fab environment requirements are being defined in the FI TWG
Equipment, AMHS and FOUP AMC monitoring & control
Courtesy: YE / WECC
ITRS Conference July 2007 , San Francisco, CA 102007 ITRS DRAFT DO NOT PUBLISH
Factory Visualization Metrics
Semiconductor FactorySemiconductor Factory
Step1
Tool 1
Common
Area A
Process
Group A
Product
Product
View
How well is it realized?How well is it realized?
BusinessType
ProductProduct
ProcessProcess
CapacityCapacity
QualityQuality
CostCost
DeliveryDelivery
Tool
View
ESHESH
LogicalWorld
PhysicalWorld
Factory OperationProducts/Process Resources
CompetitiveIn-Competitive Area
UnderstandingAssumptions
UnderstandingResults
Understanding Activity
Process
View
Key Indicators
GOAL: Provide measurable/actionable metrics for managing factory at various levels easily
Courtesy: STRJ
ITRS Conference July 2007 , San Francisco, CA 112007 ITRS DRAFT DO NOT PUBLISH
Enhance Visibility of Equipment Activity
FI is working on putting the equip eng data contents in ITRS tables Required for data contents meeting the equipment performance needs Required for enhanced equipment quality management and assurance Text on equip eng data contents included in 2007 FI text
SECS data port exist – raw data
Equip eng data content requested model based data + activity/event data (energy, B/A, Setup time, etc.)
5
10
15
20
25
5 10 15
20 25
Pro
cess
ing
Tim
e
# of Wafers in a Carrier (lot?)
by = ax + b
<1> Start<1> StartID ReadDockingDoor OpeningWafer Mapping
<1> Start<1> StartID ReadDockingDoor OpeningWafer Mapping
<2> Recipe Setting<2> Recipe SettingRecipe Down LoadVariable parameter Setting
<2> Recipe Setting<2> Recipe SettingRecipe Down LoadVariable parameter Setting
<3> Set-ups<3> Set-upsReticle SetttingIon Source Changing
<3> Set-ups<3> Set-upsReticle SetttingIon Source Changing
<4> Eqp Conditioning<4> Eqp ConditioningDummy Wafer SettingVacuumingHeatingSeasoning
<4> Eqp Conditioning<4> Eqp ConditioningDummy Wafer SettingVacuumingHeatingSeasoning
<5> Quality Conditioning<5> Quality ConditioningSend-AheadInspection Results WaitMonitor Setting
<5> Quality Conditioning<5> Quality ConditioningSend-AheadInspection Results WaitMonitor Setting
<6> Actual Process<6> Actual ProcessProcessingWafer Handling
<6> Actual Process<6> Actual ProcessProcessingWafer Handling
<7> End<7> EndDoor CloseUndocking
<7> End<7> EndDoor CloseUndocking
<8> Abnormal<8> AbnormalDetectionWafer RestoreTrouble Restore
<8> Abnormal<8> AbnormalDetectionWafer RestoreTrouble Restore
setup time contributors
Courtesy: STRJ
Impact of equip intrinsic cycle time loss defined by a model
ITRS Conference July 2007 , San Francisco, CA 122007 ITRS DRAFT DO NOT PUBLISH
FI Cross Cut Issues to be addressed
Crosscut Area Factory integration related key challenges
Front end Process (FEP)
SWP/Batch/Mini-batch for thermal processes (for 300’/450mm) – Continue to work on feasibility and potential solutions. WEE changed from 1.5mm to 2mm and target 1.5mm for later years (solutions unknown)
Litho EUVL (power, consumables, weight) impact on FI – Work with Litho to understand needs. Also, evaluate process control solutions to support tighter overlay and CD control.
ESH ESH/FI to identify which tools are ideal candidates for equipment sleep mode (may be phased implementation) and work with ESH on defining green fab.
Metrology Temperature & Humidity specs for Metrology tools will be included. Off-line/in-line/in-situ Metrology will be included in the 2007 chapter (Wafer metrology versus Sensors data).
Yield Enhancement
YE decided to include temperature and humidity metrics with FI referencing these tables. FI to work with YE on defining AMC needs at the equipment and FOUP level.
ITRS Conference July 2007 , San Francisco, CA 132007 ITRS DRAFT DO NOT PUBLISH
Wafer fab
Circuit architecture
Masks optimized based on design
intent
Layout with critical paths
0.1
1
10
800 1000 1200 1400 1600 1800
BIM, ACI CD 78.7 nm
PSM, ACI CD 83 nm
BIM, ACI CD 74.6 nm
Stati
c_ID
D @
Vdd
=1.55
V
Fmax 18:1 @ 1.48 V (MHz)
Packaged IC
Device models
Design rules
Statistical timing
optimization
Cache
010203040
0.150
0.154
0.158
0.162
0.166
0.170
0.174
0.178
0.182
Freq
uenc
y
Process variation distributions
Known contours of CD, topography or overlay error with mfg. process
Test data
Role of PCS/APC?
Designers
BIM PSM
Max
imum
ope
ratin
g fre
quen
cy
Static Idd
Organizational, corporate
cultural and geographical
barriers Wafer fab
Circuit architecture
Masks
Layout Test dataPackaged IC
Device models
Design rules
Designers
DFM
Present mode of operation for circuit design and fabrication
New mode of operation with design for manufacturing (DFM) practices
ITRS Litho Challenges/Needs
• Design for Mfg (DFM) needed for:•Immersion litho challenges•Double Patterning needs•EUVL challenges•Controlling LWR and LER increasingly important•Stringent overlay tolerances needed
Integration of design, modeling, lithographic resolution enhancement techniques and extensive metrology needed to maintain expected circuit performance
LWR = Line Width Roughness; LER = Line Edge Roughness
Source: Based on ITRS Litho TWG
ITRS Conference July 2007 , San Francisco, CA 142007 ITRS DRAFT DO NOT PUBLISH
Factory Integration Summary
All FI technology requirements tables and potential solutions tables updated Operations, Equipment, AMHS, FICS and Facilities
Identified key focus areas for FI Technology requirement and potential solutions for 300’/450mm Equipment sleep mode Intrinsic equipment losses and better visibility of data AMC solutions for equipment and FOUP
Working with other TWG on cross-cut issues With FEP, Litho, Metrology, Yield Enhancement and ESH EUVL, single wafer processing, IM, energy conservation, etc.
Business strategies, market demands, and process technology changes continue to make factories difficult to integrate
Work with other forums/WG to ensure synergy ISMI 450mm WG, STRJ, IMA, JEITA, SEMI, etc. Improve sub-team participation to obtain cross-synergy
ITRS Conference July 2007 , San Francisco, CA 152007 ITRS DRAFT DO NOT PUBLISH
Backup
ITRS Conference July 2007 , San Francisco, CA 162007 ITRS DRAFT DO NOT PUBLISH
Factory Operations Technology Requirements
Key Objectives: Speed & Flexibility1) Reduce mfg cycle times, 2) Improve Equipment Utilization, 3) Reduce Losses from High Mix
Solution exists Solution being developed Solution required
ITRS Conference July 2007 , San Francisco, CA 172007 ITRS DRAFT DO NOT PUBLISH
Production Equipment Technology Requirements
Key Objectives: 1) NPW reduction, 2) Reliability Improvement, 3) Run rate (throughput) improvement Productivity & Cost
Solution exists Solution being developed Solution required
ITRS Conference July 2007 , San Francisco, CA 182007 ITRS DRAFT DO NOT PUBLISH
Key Objectives: 1) Increase throughput for Traditional and Unified Transport, 2) Reduce Average Delivery times, 3) Improve Reliability
Material Handling Technology Requirements
Solution exists Solution being developed Solution required
ITRS Conference July 2007 , San Francisco, CA 192007 ITRS DRAFT DO NOT PUBLISH
FICS Technology Requirements
Key Objectives: 1) Increase Reliability, 2) Increase Factory Throughput,3) Reduce or Maintain Mask Shop Cycle Time, 4) Reduce Costs
Solution exists Solution being developed Solution required
ITRS Conference July 2007 , San Francisco, CA 202007 ITRS DRAFT DO NOT PUBLISH
Facilities Technology Requirements
Key Objectives: 1) Factory Extendibility, 2) AMC,3) Rapid Install/Qualification, 4) Reduce Costs
Solution exists Solution being developed Solution required