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정 범 종정 범 종 Embedded System Lab. Abstract Cache management(e.g., LRU) policies can lead to poor performance and fairness when the multiple cores compete for the limited LLC capacity Different memory access patterns can cause cache contention in different ways propose a new cache management approach that combines dynamic insertion and promotion policies benefits of cache partitioning, adaptive insertion, and capacity stealing all with a single mechanism
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Embedded System Lab.
Embedded System Lab.
PIPP: Promotion/Insertion Pseudo-Parti-tioning of
Multi-Core Shared CachesYuejian Xie et al. ACM, 2009
정 범 종
Embedded System Lab.
Table of contents Abstract
Background
Reference paper
PIPP
Evaluation
Conclusion
Reference
정 범 종
Embedded System Lab.
Abstract Cache management(e.g., LRU) policies can lead to poor performance
and fairness when the multiple cores compete for the limited LLC ca-pacity
Different memory access patterns can cause cache contention in dif-ferent ways
propose a new cache management approach that combines dynamic insertion and promotion policies
benefits of cache partitioning, adaptive insertion, and capacity stealing all with a single mechanism
정 범 종
Embedded System Lab.
Background MRU, LRU, Promotion policies
Cache Partitioning Cache partitioning reduces worst-case execution time for critical tasks,
thereby enhancing CPU utilization, especially for multicore applications
Page coloring, UCP
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Embedded System Lab.
Reference paper Capacity management
M. K. Qureshi and Y. N. Patt. Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches (UCP)
Dead-Time management M. K. Qureshi, A. Jaleel, Y. N. Patt, S. C. S. Jr., and J. Emer. Adaptive In-
sertion Policies for High-Performance Caching. (DIP)
A. Jaleel, W. Hasenplaugh, M. Qureshi, J. Sebot, S. S. Jr.,and J. Emer. Adaptive Insertion Policies for Managing Shared Caches. (TADIP)
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PIPP Basic PIPP
make use of UCP’s utility monitors to compute the target partitions
Dynamic promotion Dynamic Insertion steal
Stream-Sensitive PIPP
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Evaluation Performance impact of the different cache management techniques
for the weighted IPC speedup (Cooperative Cache Partitioning for Chip Multiprocessors)
PIPP consistently outperforms unmanaged LRU by a large margin (19.0% on the harmonic mean), and also outperforms both UCP and TADIP (10.6% and 10.1%, respectively)
Similar results hold for the quad-core case where PIPP is 21.9% better than LRU, 12.1% better than UCP and 17.5% better than TADIP
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Conclusion In this work, we have introduced a single unified technique that can
provide the benefits of capacity management, adaptive insertion and inter-core capacity stealing
This work opens several future directions for research
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Embedded System Lab.
Q & A
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Embedded System Lab.
Backup slide
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Embedded System Lab.
Evaluation
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Embedded System Lab.
Evaluation
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Embedded System Lab.
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Embedded System Lab.
