Design of an LC-VCO with One Octave Tuning Range

April 12-13, 2003SSoCC

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Design of an LC-VCO with Design of an LC-VCO with One Octave Tuning RangeOne Octave Tuning Range

Andreas Kämpe and Håkan Olsson

Radio Electronics-LECS/IMIT Royal Institute of Technology (KTH)


2

Introduction

VCO research has largely focused on reducing phase noise, not tuning range.

Multi standard transceivers requires wideband VCOs with low phase noise

Goal: Designing a VCO with one octave tuning range while maintaining a low phase noise and low power consumption.


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VCO topologies

LC tank+ Low phase-noise.+ Low power consumption - Large chip area- Tuning range (limited by CMAX/CMIN).

Delay elementRing, transmission line, and relaxation oscillators + Small chip area- High phase noise and realativly high power consumption.


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VCO ArchitectureVCO Architecture

Complementary structure (N & P) MOS =>larger amplitude and symetric rise/fall time =>

Reduced power / phase noise


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LC-tank and wide tuning rangeLC-tank and wide tuning range

One octave tuning range => Requires a Capacitance tuning of 2 octaves.

- Tuning capacitor Cmax / Cmin > 4 (paracitcs: CP) - Low voltage and large Cmax/Cmin => High varactor sensitivity (VCO gain) => sensitive to noise on the control line.

)(2

1

max

min

pCCLf

)(2

1

min

max

pCCLf

44min

max

min

max

p

p

CC

CC

f

f


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Discrete tuningDiscrete tuning

Bandswitching

The switched capacitors are used as band selectors (coarse tuning)Channel selection is performed digitally.+ Increased tuning range+ Reduces the varactor gain => phase noise reduction.

CMOS technology offers excellent switches.


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Switch limitations (MOSFET)Switch limitations (MOSFET)

Low capacitive load Large tuning range

Minimum loss Low power consumption


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Trade-offTrade-off

Loss or capacitive load.

Minimum capacitive load = reduce Cgs /Cgd =narrow transistor with minimum gate length.

Minimum loss = reduce Rds-on = wide transistor with minimum gate length.


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CTRL+CTRL-

Switch OptimisationSwitch Optimisation

• NMOS transistors (higher transconductance).• Drain / source are AC coupled (band sw cap) and biased via resistors => maximizes (Vgs-Vt)

=> Reduced Rds-on


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Switch OnSwitch On

0 V1.8 V

1.8

V

+

-

Switch on: Vgs = 1.8 V => Minimum RDS


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Switch OffSwitch Off

Switch off: Vgs = -1.8 V => 20%

reduction in capacitance compared to having Drain and Source biased at 0 V.

1.8 V 0 V

1.8

V

+

-


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Capacitor array

W

4W

2W 2C

C

4C4C

2C

C

B0

B1

B2

4R

2R

R

4R

2R

R

3bits binary weighted Capacitor array.


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VaractorVaractorCntrl+

Cntrl-

• Accumulation-mode mos varactors => Less steep voltage to capacitance transfer.

• 4 varactors are conected anti parallell => Differential operation and control => Common mode rejection


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InductorInductor

+ Differential inductor (increased coupling).+ 3 metal layers (M6, M5, M4) are stacked on top of each other => reduces the series resistance. => increased Q

- Increased capacitive load (Lower metal layers are closer to the substrate).


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Inductor simulationsInductor simulations

1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.81.0 3.0

10

11

12

13

14

9

15

3.65E-9

3.70E-9

3.75E-9

3.60E-9

3.80E-9

Frequency (GHz)

Q

indu

ctan

ce (H

)

Q

Inductance

Optimized and designed with ASITIC and ADS.


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Inductor modelInductor model

• Lumped model of a transmission line.

MUTIND


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Inductor-model simulationsInductor-model simulations

Lumped model error ”Real(S)”.

1.4 1.6 1.8 2.0 2.2 2.41.2 2.6

-0.2

-0.1

0.0

0.1

0.2

-0.3

0.3

Frequency (GHz)

s11error s12error s21errors22error(%) Real(S)


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Inductor-model simulationsInductor-model simulations

Lumped model error ”Imag(S)”.

1.4 1.6 1.8 2.0 2.2 2.41.2 2.6

-0.2

-0.1

0.0

0.1

0.2

-0.3

0.3

Frequency (GHz)

s12errors11error s21errors22error(%) Imag(S)


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Amplitude Variations

The oscillation amplitude varies considerably across the wide tuning range

ooo

s

otailo

s

oTTsTTtailo

VR

LIV

R

LQQRRRIV

practiceIn !! 4

:Thus

. where, and 4

22

2

Requires an adjustable negative resistance =>

Achieved by controlling the biasing current.

DOX

m

IL

WC

g

2

1


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VCOVCO

I2I1I0

Varactor

VDD

The band selection also controlles the biasing current. => Constant oscillation amplitude over the entire tuning range.


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Tuning rangeTuning range

Large tunability 1.2 GHz – 2.6 GHz.

Fre

quen

cy

Differential control voltage (V)-2.0 -1.0 0.0 1.0

2.5

2.4

2.3

2.2

2.1

2.0

1.9

1.8

1.7

1.6

1.5

1.4

1.3

1.2

2.6

2.7

(GHz)000 001 010 011 100 101 110 111

2.0


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VCO’sVCO’s

VCO Tech[um]

Tuning range

[%]

FOM[dBc/Hz]

“A 5.9 GHz Voltage-Controlled Ring Oscillator in 0.18 μm CMOS”, IEEE J. Solid-State Circuits 39, pp. 230- 233, Jan 2004.

0.25 18 -183

“A 1.8 GHz higly-tunable low phase-noise CMOS VCO”. Custom Integrated Circuits Conference, 2000. CICC. Proceedings of the IEEE 2000, pp. 585-588. 21-24 May 2000.

0.25 28 -183

”New wideband/dualband CMOS LC voltage-controlled oscillator”. Circuits, Devices and Systems, VOl 150. Proceedings of the IEEE 2003, pp. 453-

459 6 Oct 2003.

0.25 98 -158.3*

“A 15-mW Fully Integrated I/Q Synthesizer for Bluetooth in 0.18 μm CMOS”, IEEE J. Solid-State Circuits 38, pp. 1155 - 1162, July 2003.

0.18 16 -174.5*

“Design of Wide-Band CMOS VCO for Multiband Wireless LAN Applications”, IEEE J. Solid-State Circuits 38, pp. 1333 - 1342, August 2003.

0.13 SOI

58.7 -186.6

This 0.18 74 -190

* Quadrature VCO

mWPf

fSFOM VCOSSB /

2

0


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ConclusionsConclusions

• It is possible for a VCO to have a large tuning range combined with a low phase noise and low power consumption. This design has a very good performance expressed in FOM (-190 dBc/Hz/mW) and superior if the wide tuning range is taken in account.

• Large chip Area, due to many capacitors and a large inductor. If the oscillator was designed to be operated at a higer frequency, the Chip area could be decreced (smaller LC tank) The down side is an increaced loss in the switches (capacitor array).


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Complementary or NMOS-only 1Complementary or NMOS-only 1

ID(n + p) = ID(n-only)

Equal gm: gm(n + p) = gm(n-only)

DOX

m

ILW

C

g

2

1

onlynnnnpp WWW


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Complementary or NMOS-only 2Complementary or NMOS-only 2

Symetric rise/fall time: nnp

nP WWW 3

onlynp WW

4

3

onlynonlynLOAD WKC )(

onlynn WW 4

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onlynonlynonlynnppnLOAD WKWWKWWKC )4

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Documents

Design of an LC-VCO with One Octave Tuning Range