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  • A VLSI Analog Computer / Math Co-processor

    for a Digital Computer

    Glenn Edward Russell Cowan

    Submitted in partial fulfillment of the

    requirements for the degree

    of Doctor of Philosophy

    in the Graduate School of Arts and Sciences

    COLUMBIA UNIVERSITY

    2005

  • c2005

    Glenn Edward Russell Cowan

    All Rights Reserved

  • Abstract

    A VLSI Analog Computer / Math Co-processor

    for a Digital Computer

    Glenn Edward Russell Cowan

    This dissertation investigates the utility of a programmable VLSI analog com-

    puter for the solution of differential equations. To investigate the capability of analog

    computing in a modern context, a large VLSI circuit (100 mm2) was designed and

    fabricated in a standard mixed-signal CMOS technology. It contains 416 analog

    functional blocks, switches for their interconnection, and circuitry for the systems

    program and control. This chip is controlled and programmed by a PC via a data

    acquisition card. This arrangement has been used to solve differential equations with

    acceptable accuracy, as much as 400x faster than a modern workstation.

    The utility of a VLSI analog computer has been demonstrated by solving sto-

    chastic differential equations, partial differential equations, and ordinary differential

    equations (ODEs). Additionally, techniques for using the digital computer to refine

    the solution from the analog computer are presented. Solutions from the analog com-

    puter have been used to accelerate a digital computers solution of the periodic steady

  • state of an ODE by more than an order of magnitude.

    An analysis has been done showing that the analog computer dissipates 0.02

    % to 1 % of the energy of a digital general purpose microprocessor and about 2 %

    to 20 % of the energy of a digital signal processor, when solving the same differential

    equation.

  • Contents

    List of Figures vi

    List of Tables xii

    Acknowledgments xiv

    Chapter 1 Introduction 1

    1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

    1.2 History of Analog Computation . . . . . . . . . . . . . . . . . . . . . 3

    1.3 Overview of this Thesis . . . . . . . . . . . . . . . . . . . . . . . . . . 5

    Chapter 2 Review of Digital and Analog Computer Techniques 6

    2.1 Digital Computation . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

    2.1.1 Solving Differential Equations on a Digital Computer . . . . . 6

    2.1.2 Strengths and Weaknesses of the Digital Approach . . . . . . 11

    2.2 Analog Computation . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

    2.2.1 Solving Differential Equations on an Analog Computer . . . . 13

    2.2.2 Strengths and Weaknesses of the Analog Approach . . . . . . 22

    i

  • Chapter 3 Design of the VLSI Circuit 26

    3.1 Chip Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

    3.1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

    3.2 Process Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

    3.3 Block Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

    3.3.1 Elements Common to Most Circuits . . . . . . . . . . . . . . . 31

    3.3.2 Integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

    3.3.3 VGA / 2-Input Multipliers . . . . . . . . . . . . . . . . . . . . 67

    3.3.4 Fanout Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

    3.3.5 Exponential . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

    3.3.6 Logarithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

    3.3.7 Programmable Nonlinear Functions . . . . . . . . . . . . . . . 80

    3.3.8 Switches and Memory . . . . . . . . . . . . . . . . . . . . . . 85

    3.4 Chip Architecture in More Detail . . . . . . . . . . . . . . . . . . . . 87

    3.4.1 Interconnection of Blocks . . . . . . . . . . . . . . . . . . . . . 87

    3.4.2 Functional Block Memory . . . . . . . . . . . . . . . . . . . . 94

    3.4.3 Simulation Control . . . . . . . . . . . . . . . . . . . . . . . . 94

    Chapter 4 Analog Computation Environment 100

    4.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

    4.2 Implemented Environment . . . . . . . . . . . . . . . . . . . . . . . . 101

    4.2.1 Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

    ii

  • Chapter 5 Circuit Measurements 107

    5.1 Integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

    5.1.1 Measurement Set-up . . . . . . . . . . . . . . . . . . . . . . . 107

    5.1.2 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

    5.2 VGA/2-Input Multipliers Blocks Measured in VGA Mode . . . . . . . 119

    5.2.1 Measurement Set-Up and Definitions of Reported Quantities . 119

    5.2.2 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

    5.3 VGA/2-Input Multiplier Blocks Measured in Multiplier Mode . . . . 124

    5.3.1 Measurement Set-up and Definitions of Reported Quantities . 124

    5.3.2 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

    5.4 Fanout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

    5.4.1 Measurement Set-up and Definitions of Reported Quantities . 128

    5.4.2 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

    5.5 Exponential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132

    5.6 Logarithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

    5.7 Programmable Nonlinear Blocks . . . . . . . . . . . . . . . . . . . . . 139

    5.8 Switches and Memory . . . . . . . . . . . . . . . . . . . . . . . . . . 146

    5.9 Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147

    Chapter 6 Using the Analog Computer to Obtain Fast, Approximate

    Solutions 148

    iii

  • 6.1 Solving Partial Differential Equations on the Analog Computer Using

    the Method of Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

    6.1.1 One-Dimensional Linear Diffusion Equation . . . . . . . . . . 149

    6.2 Solving Stochastic Differential Equations (SDEs) on the Analog Com-

    puter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165

    6.2.1 Motivation for this Problem Area . . . . . . . . . . . . . . . . 165

    6.2.2 First Order Nonlinear SDEs: Particle in a Potential Well . . . 167

    6.2.3 Heat Equation with Random Diffusivity . . . . . . . . . . . . 173

    Chapter 7 Using the Analog Computers Solution to Accelerate a Dig-

    ital Computers Algorithms 182

    7.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182

    7.2 Newton-Raphson Based Periodic Steady-State Solvers . . . . . . . . . 183

    Chapter 8 Performance Comparison Between Analog and Digital Tech-

    niques 188

    8.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188

    8.2 Energy Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189

    8.2.1 Example: First-Order Particle in a Well . . . . . . . . . . . . 192

    8.2.2 Example: Stochastic Heat Equation . . . . . . . . . . . . . . . 193

    8.2.3 Fixed Point Versus Floating Point . . . . . . . . . . . . . . . . 194

    8.2.4 Power Overhead From Data Conversion . . . . . . . . . . . . . 195

    8.2.5 Comments on Sample Problems . . . . . . . . . . . . . . . . . 195

    iv

  • 8.3 Computation Speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196

    Chapter 9 Suggestions for Future Work 197

    9.1 Circuit Enhancements . . . . . . . . . . . . . . . . . . . . . . . . . . 197

    9.2 System Modifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 198

    9.3 Future Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199

    Appendix A Summary of Programming Data for the Analog Com-

    puter 200

    A.1 Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200

    A.1.1 Integrators Programming Data . . . . . . . . . . . . . . . . . 200

    A.1.2 VGA / 2-Input Multipliers Programming Data . . . . . . . . 201

    A.1.3 Fanout Blocks Programming Data . . . . . . . . . . . . . . . 201

    A.1.4 Exponential Blocks Programming Data . . . . . . . . . . . . 201

    A.1.5 Programmable Nonlinear Blocks Programming Data . . . . . 202

    A.2 Programming Summary for Interblock Conncections . . . . . . . . . . 203

    A.2.1 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206

    v

  • List of Figures

    1.1 Analog computation environment. . . . . . . . . . . . . . . . . . . . . 2

    2.1 Realization of a first-order, LTI ordinary differential equation. . . . . 14

    2.2 Realization of a first-order, LTI ordinary differential equation. The

    integrator has an input offset. . . . . . . . . . . . . . . . . . . . . . . 17

    3.1 Architecture of the VLSI analog computer with expanded view of one

    Macroblock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

    3.2 Architecture of one Macroblock within the analog computer. . . . . . 29

    3.3 Architecture of the VLSI analog computer showing top-level connections. 30

    3.4 Block diagram of the integrator. . . . . . . . . . . . . . . . . . . . . . 33

    3.5 Integrator Core. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

    3.6 Simple system for noise analysis. . . . . . . . . . . . . . . . . . . . . . 43

    3.7 Input variable gain curren