Status of CMS CSC upgrade in LS1 Present CSC Status ME 4/2 project ME 1/1 project 5/20/2015 Petr Levchenko NEC 2013, Varna 1

Status of CMS CSC upgrade in LS1

Present CSC Status

ME 4/2 project

ME 1/1 project

04/18/23 Petr Levchenko NEC 2013, Varna 1

CSC Upgrade

04/18/23 2Petr Levchenko NEC 2013, Varna


Total weight : 12,500 tOverall diameter : 15 mOverall length : 21.6 mMagnetic field : 4 Tesla

6 layer multi-wire proportional chambers

Cathode Strip Chambers

Resistive Plate Chambers

MUONENDCAPS

http://cmsdoc.cern.ch/cms/TRIDAS/html/CollisionSide.html

Main goals of CSC Upgrade

Build , install and commossion72 ME4/2 chambers to complete the 4th station. For the moment YE3 disk uncompleted due to missing outer (1.2<η<1.8) ME4/2

Remove, refurbish, reinstall and commission 72 ME1/1 chambers (1.6<||<2.4)

Introduce into the DAQ optical readout electronics and increase number of readout channels (SLink)

Largely extent the LV and HV systems


5

Schedule driven by YE+4 disk construction with all other activities requiring crane in the shadow (ME1/1 PP)

Present Status (Sep 04-Oct 11)

04/18/23 Petr Levchenko NEC 2013, Varna

Recent CMS View


pa

ne

l s

tora

ge

Incoming parts

5m

Loadingarea20

m

Gas

Panel cleaning/gluing

Str

ip g

luin

g

25m

hand soldering Kit preparation

10m

10mL

on

g t

erm

gas

&

HVElectronics

assemblyFast site testing

10m 10m15m 15m

7m

6m

7mPacking

Chamber storage

area6m

C

ham

ber

rac

k

clean Lab 1 clean Lab 2 platform

• Incoming parts

• Kit preparation

• Panel bar gluing

• Wire wiring, gluing, soldering (Lab 1)

• Electrical components hand soldering

• Chamber assembly & test (Lab 2)

• Long term gas, HV tests

• Electronics assembly & Fast site test

• Final inspection packing, storing

Chamber production workflow


04/18/23Petr Levchenko NEC 2013, Varna 8

FR4 bar bonding

wire winding wire soldering

Wire pitch and tension HV testing

chamber testing chamber integration

components soldering

chamber assembly

chamber installation

ME4/2 schedule (original plan)

Production schedule A production rate of 1 chamber/week (7 working days) is our target

By February/March 2013 we hope to have built 31 chambers (5 already

on YE+3 disk, 2 more ready and 6 in the workflow at b904). The additional 36 chambers will be ready by March of 2014.

Note: plan to re-use on-chamber electronics from ME1/1 Our aim is to complete the project on time for installation during LS1,

assuming schedule for LS1 will not slip (starting on Nov 17).

1st endcap 2nd endcap


Achieved chamber production 1st

endcap (30 chambers)

10

Xm

as

brea

k

assuming a rate of 3.3 CSC/month

DONE

!

Not considering time for chamber long term HV training (8 weeks), electronics integration (2 days) and final testing (3-4 days)


Chamber production chart 2nd endcap (36 chambers)

11

Rate = 4 CSC/month

ME4/2 chamber factory status: 89% of chambers now assembled


ME4/2 Electronics Update

CSC

CFEBCFEBCFEB CFEB

ALCT1 of 24

CFEB

1 of 2

LVDBLV Distribution Board

FED Crate in USC551 of 5

1 of 5

Anode Front-end Board

Cathode Front-end Board

Anode LCT Board

MPC

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

CCBC

ONTROLLER

Peripheral Crate on iron disk

Slow Control

Trigger-Timing-Control

Muon Sector ReceiverLev-1 Trigger

Trig Motherboard

DAQ Motherboard

Clock Control Board DDU Board

Readout Data

RAT aux card (behind)

System Layout04/18/23 12Petr Levchenko NEC 2013, Varna

CSC ME4/2 project final remarks

The ME4/2 on-chamber and DAQ electronics partially come from the ME1/1 system after refurbishment

All board stay unchanged except (UCLA- J. Hauser) ALCT mezzanine boards Small Spartan-6 FPGA cards

Radiation tested, 100% compatible firmware, passes STEP testing Originally for ME4/2 only, but low cost replace on ME1/1 as well

LV system enriched by four Maraton power supplies and LV delivery system (Junction Box) partially recuperated from ME1/1 system

HV system now is the paste copy of station 2.3 with power capacity to supply 72 chambers

Spartan-6 vs Virtex-E features:•10x logic•2x speed•Low power ~same•SEU mitigation options•TMB-compatible


ME1/1 Refurbishment and Testing of Boards

All ME-1/1 Chambers have been removed from the Muon Endcap and taken to the SX5 area at the CMS Center

17 chambers have been refurbished and two have been installed on +YE1 disk

The old electronics already used for the ME-4/2 system

Each refurbished chamber undergoes STEP tests with upgraded readout electronics

14

ME-1/1

ME1/1 SX5 area


LTT

Many new items Electronics designs are fully

validated DCFEB, ALCT S6, LVDB7,

LVMB7 and PPIB production is complete

>300 of 550 cathode boards (DCFEB) received at CERN

Off-chamber electronics OTMB are in production ODMB design is finished, awaiting

a Production Readiness Review

ME1/1 electronics


ME-1/1 On-Chamber Electronics Upgrade_1

Remove triple-strip-ganging in ME1/1a region (57 CFEB) Suppress low-pT mis-measured muons Reduces ambiguities due to combinatorics

ALCT ALCT(S6): Anode readout board FPGA Virtex E Spartan 6 New, faster FPGA to handle rates

Low Voltage Distribution Board to supply low voltage to on-chamber electronics and Low Voltage Mezzanine Board is the interface between the LVDB and the readout board ODMB, which we use for monitoring and control

CSC

CFEBCFEBCFEB

CFEB

ALCT1 of 24

CFEB

LVDB

Anode Front-end Board

Cathode Front-end Board

Anode LCT Board

UpgradedCurrent


ME-1/1 On-Chamber Electronics Upgrade_2

CLK,L1A,JTAG...TMB Path copperData Path copper

Virtex I

Trig brd2brd

Comparator ASIC

6 Wilkinson ADCs

Switch Capacitor ASIC

Buckeye Amp/shaperASIC

Coupling/Protection

Cathode Front End Boards Digital Cathode Front End Boards (All OSU design – S.Durkin, B. Bylsma)•Virtex 1 Virtex 6•Replace the current analog CFEB with SCA and 16:1 multiplexing ADC by digital design with flash ADC for each channel and digital pipeline storage•Optical Data and Trigger Path CLK,L1A,JTAG...

TMB Path opticalData Path optical

Virtex 6

Trig brd2brd

Comparator ASIC

Flash ADCs

Fully Diff Amps

Buckeye Amp/shaperASIC

Coupling/Protection

CFEB DCFEB


Low Voltage Distribution Board (LVDB7)

RDMS design (V.Y. Karjavin) Reviewed in February Fabrication and assembly in Russia

PCB fabrication complete Assembly and test have been completed

72 production boards + spares currently at CERN

Terminal block Fixation of LV cable


Low Voltage Mezzanine (Monitor) Board (LVMB7)

UC Davis design (Ray Gerhard)

Performs same functions as previous LVMB but with increased number of channels

interface between ODMB and LVDB boards

Control and monitoring of LVDB power channels

Underwent mini (internal) PRR in May

One FET replaced for rad hardness

Buffer added for temperature monitoring

All PCB’s have been fabricated

36 assembled production boards at CERN

Production LVMB7 with skew clear cable

19 Petr Levchenko NEC 2013, Varna04/18/23

Patch Panel Interconnect Board (PPIB)

PPIB: active interface board in patch panel to take 2 skew clear cables from OTMB and distribute signals to 7 DCFEBs

Designed by Mike Matveev (Rice)

Prototype arrived in April; production completed and all board delivered to CERN

Uses existing skew clear cables to connect to ODMB

Uses new cables to connect PPIB to DCFEBs

2 skew clear cables to ODMB

7 new cables to DCFEBs


ME-1/1 Readout Electronics Upgrade

Optical Trigger Mother Board (OTMB). UCLA – J. Hauser

Replaced Mezzanine card. TAMU – J Gilmor

Virtex 6 FPGA enhances our capabilities

memory & speed for improved trigger logic

Use 7 multi-gigabit serial links for data from DCFEBs

New Base Board A new front panel to make room

for optical links Modification specifically targets

improvement in power distribution

Full backwards compatibility is maintained


ME-1/1 Readout Electronics Upgrade

Optical Data acquisition Mother Board (ODMB) UCSB, NE Optical Transceivers New Virtex-6 to handle the fiber optic data and optical

transmission for 7 DCFEBs


System Test of Endcap Peripheral Crate and Chamber Electronics (STEP Tests)

A comprehensive tests of the chambers which can help detect problems with connectivity, noise, and electronics firmware

Set of tests below are performed on all me-1/1 chambers being refurbished All CSC chambers installed on the muon endcap have undergone these tests

STEP testsSlow Control

Anode Front End Board Threshold and Analog Noise test

Anode Front End Board Noise test

Anode Front End Board Time-delay verification

Pipeline Depth test

Digital Cathode Front End Board Noise test

Digital Cathode Front End Board Connectivity test

Digital Cathode Front End Board DAQ-Path Calibration: Pulse Response and Cross Talks

Digital Cathode Front End Board DAQ-Path Calibration: Amplifier Gain

Digital Cathode Front End Board Comparator Thresholds and Analog Noise

Digital Cathode Front End Board Left/right Comparator Logic test

ALCT self-trigger on cosmic test

High-statistics cosmic test

Chamber gain map


Some items… ME1/1 electronics upgrade invoke deep changes in LV system LV system enriched by eight Maraton power supplies and LV delivery system (Junction Box) was

completely redesigned by S.Lusin and produced by Wisconsin and now in CERN In order to prove high reliability new CSC electronics special Low Voltage Test stand (LTT)has been built

in SX5 test area. It has capacity to run six chambers in the same time

* CSC DAQ hardware in USC- number of readout channels (SLink) increased from 8 to 36 to better cope with higher rates and new chambers- chamber grouping modified for better load balancing

* CSC computers- upgrading to more powerful server PCs for detector control and VME communication- new interface cards for VME communication

* CSC software- adapting to the new electronics on the innermost 72 chambers. configuration. control and monitoring (+DCS). data format- updating operating system to SLC 6 or 7 (based on Red Hat EL 6 or 7)- updating to latest CMS online software framework- expanding the scope of expert system- exploiting parallel processing- consolidating applications


Very intense in Oct-Nov for + side endcap: ME4/2 starts Oct. 7, want 24/7 operation for commissioning ME1/1 starts Oct. 17

Installation schedule


Summary

CSC Upgrade on it straight way, but still lot of work to do….

ME4/12 project is close to final stage.

ME1/1 refurbishing goes well.

In spite of some delay CSC installation going to happened soon


Documents

Status of CMS CSC upgrade in LS1 Present CSC Status ME 4/2 project ME 1/1 project 5/20/2015 Petr Levchenko NEC 2013, Varna 1