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Robust Timing Synchronization for Full Duplex Communications: Design and Implementation MinKeun Chung 1 , Liang Liu 1 , Ove Edfors 1 , Dong Ku Kim 2 , and Chan-Byoung Chae 3 1 Department of Electrical and Information Technology, Lund University, Sweden 2 School of Electrical and Electronic Engineering, Yonsei University, Korea 3 School of Integrated Technology, Yonsei University, Korea Email: fi[email protected] 1 , {dkkim, cbchae}@yonsei.ac.kr Abstract—This paper presents a robust timing synchronization method for full duplex orthogonal frequency division multiplexing (OFDM) systems based on Long Term Evolution (LTE). The proposed method contains two essential steps: 1) time alignment between the desired signal and self-interference 2) normalized synchronization peak (NSP) index switching. The time alignment is to make the difference in arrival times of the desired signal and the self-interference signal within cyclic prefix (CP) duration of an OFDM symbol, exploiting a time advance, thereby adopting low-complexity, frequency domain self-interference cancellation and decoding. In the second step, to improve the probability of successful time synchronization, a Zadoff-Chu sequence with a different root index is used for the primary synchronization signal at each node. To validate the proposed method with experimental evidence, we implement a full duplex physical layer (PHY) on an FPGA-based software-defined radio (SDR) platform. It is shown that our full duplex OFDM synchronizer is flexible and robust, in a real-world wireless channel, compared to existing synchronization method. Index Terms—Full duplex communications, timing synchronization, software-defined radio implementation. I. I NTRODUCTION Full duplex radio communications has emerged as an appeal- ing solution for significantly boosting throughput of individual users [1], [2]. In theory, it has the potential to double the throughput by simultaneous transmission and reception on the same frequency in a radio. Doubling throughput is of course an ideal achievement and even practically attaining full duplex communication within the same spectrum is challenging. Researchers have demonstrated [3]– [15] that the theoretical potential can be transformed into practical achievement. The core of the challenge is managing the interference which does not occur in conventional half duplex communications. In particular, the large difference in power between the transmitter’s echo, the so-called self-interference, and the desired signal from its partner is a major obstacle. As wireless signals attenuate quickly over distance, the unwanted self-interference from one’s own transmitting antenna is typically billions of times (100 dB+) stronger than the desired receive signal. As a consequence, the desired receive signal is, without intelligent interference management strategies, flooded with self-interference. Self-interference differs from general interference in that the original information of self-interference is known at the receiving position. Such knowledge is a significant benefit for the interference suppression. However, the tremendous amount of self-interference requires several phases of both analog and digital suppression. There has been considerable interest in finding practical self-interference cancellation solutions, making full duplex radio a reality. A key requirement to initiate full duplex communications between scheduled nodes is a synchronization protocol. Furthermore, a stable self-interference cancellation scheme, both in the analog and digital domains, requires a robust synchronization algorithm. Figure 1: Block diagram and hardware configuration of the full- duplex testbed architecture. Despite prior work on in-band full-duplex systems, publications describing design considerations and methodology regarding timing synchronization of full-duplex links are not yet available. Thus, the goal of the current research is twofold – to 1) present the design and implementation of a robust timing synchronization for full-duplex single-input single-output (SISO)/multiple-input multiple- output (MIMO) systems and 2) validate the feasibility of the proposed algorithm using software-defined radio (SDR) based platform with over-the-air wireless test. The remainder of this paper is structured as follows. Section II describes the full-duplex testbed design. Section III proposes a novel full-duplex time synchronization method. Section IV validates the proposed time synchronization method experimentally. Lastly, Section V summarizes the key takeaways from this work. II. FULL DUPLEX TESTBED OVERVIEW Before proposing the time-synchronization method, this section introduces the full-duplex testbed on which it is applied and eval- uated. The full-duplex prototype, shown in Fig. 1, have a two- node pair and each full-duplex node consists of two parts – the dual-polarized full-duplex front-end acting as analog interference canceler and the digital baseband physical layer (PHY) on an SDR platform. The digital baseband part adopts, for low computational complexity and Long Term Evolution (LTE) compatibility, a per- subcarrier digital cancellation architecture. More details on self- interference cancellation processing for full duplex SISO and MIMO configurations can be found in [13], [15]. The full-duplex PHY is implemented on two LabVIEW controlled main processing modules, a Xilinx Kintex 7 K410T FPGA in a 883 978-1-5090-5990-4/17/$31.00 ©2017 IEEE GlobalSIP 2017

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Robust Timing Synchronization for Full DuplexCommunications: Design and Implementation

MinKeun Chung1, Liang Liu1, Ove Edfors1, Dong Ku Kim2, and Chan-Byoung Chae31Department of Electrical and Information Technology, Lund University, Sweden

2School of Electrical and Electronic Engineering, Yonsei University, Korea3School of Integrated Technology, Yonsei University, Korea

Email: [email protected], {dkkim, cbchae}@yonsei.ac.kr

Abstract—This paper presents a robust timing synchronization methodfor full duplex orthogonal frequency division multiplexing (OFDM)systems based on Long Term Evolution (LTE). The proposed methodcontains two essential steps: 1) time alignment between the desired signaland self-interference 2) normalized synchronization peak (NSP) indexswitching. The time alignment is to make the difference in arrival timesof the desired signal and the self-interference signal within cyclic prefix(CP) duration of an OFDM symbol, exploiting a time advance, therebyadopting low-complexity, frequency domain self-interference cancellationand decoding. In the second step, to improve the probability of successfultime synchronization, a Zadoff-Chu sequence with a different root indexis used for the primary synchronization signal at each node. To validatethe proposed method with experimental evidence, we implement a fullduplex physical layer (PHY) on an FPGA-based software-defined radio(SDR) platform. It is shown that our full duplex OFDM synchronizer isflexible and robust, in a real-world wireless channel, compared to existingsynchronization method.

Index Terms—Full duplex communications, timing synchronization,software-defined radio implementation.

I. INTRODUCTION

Full duplex radio communications has emerged as an appeal-ing solution for significantly boosting throughput of individualusers [1], [2]. In theory, it has the potential to double the throughputby simultaneous transmission and reception on the same frequencyin a radio. Doubling throughput is of course an ideal achievementand even practically attaining full duplex communication within thesame spectrum is challenging. Researchers have demonstrated [3]–[15] that the theoretical potential can be transformed into practicalachievement. The core of the challenge is managing the interferencewhich does not occur in conventional half duplex communications.In particular, the large difference in power between the transmitter’secho, the so-called self-interference, and the desired signal from itspartner is a major obstacle. As wireless signals attenuate quickly overdistance, the unwanted self-interference from one’s own transmittingantenna is typically billions of times (100 dB+) stronger than thedesired receive signal. As a consequence, the desired receive signal is,without intelligent interference management strategies, flooded withself-interference. Self-interference differs from general interferencein that the original information of self-interference is known atthe receiving position. Such knowledge is a significant benefit forthe interference suppression. However, the tremendous amount ofself-interference requires several phases of both analog and digitalsuppression. There has been considerable interest in finding practicalself-interference cancellation solutions, making full duplex radio areality.

A key requirement to initiate full duplex communications betweenscheduled nodes is a synchronization protocol. Furthermore, a stableself-interference cancellation scheme, both in the analog and digitaldomains, requires a robust synchronization algorithm.

Figure 1: Block diagram and hardware configuration of the full-duplex testbed architecture.

Despite prior work on in-band full-duplex systems, publicationsdescribing design considerations and methodology regarding timingsynchronization of full-duplex links are not yet available. Thus,the goal of the current research is twofold – to 1) present thedesign and implementation of a robust timing synchronization forfull-duplex single-input single-output (SISO)/multiple-input multiple-output (MIMO) systems and 2) validate the feasibility of the proposedalgorithm using software-defined radio (SDR) based platform withover-the-air wireless test.

The remainder of this paper is structured as follows. Section IIdescribes the full-duplex testbed design. Section III proposes anovel full-duplex time synchronization method. Section IV validatesthe proposed time synchronization method experimentally. Lastly,Section V summarizes the key takeaways from this work.

II. FULL DUPLEX TESTBED OVERVIEW

Before proposing the time-synchronization method, this sectionintroduces the full-duplex testbed on which it is applied and eval-uated. The full-duplex prototype, shown in Fig. 1, have a two-node pair and each full-duplex node consists of two parts – thedual-polarized full-duplex front-end acting as analog interferencecanceler and the digital baseband physical layer (PHY) on an SDRplatform. The digital baseband part adopts, for low computationalcomplexity and Long Term Evolution (LTE) compatibility, a per-subcarrier digital cancellation architecture. More details on self-interference cancellation processing for full duplex SISO and MIMOconfigurations can be found in [13], [15].

The full-duplex PHY is implemented on two LabVIEW controlledmain processing modules, a Xilinx Kintex 7 K410T FPGA in a

883978-1-5090-5990-4/17/$31.00 ©2017 IEEE GlobalSIP 2017

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Table I: Parameters for the full duplex OFDM prototype.

Parameters ValuesCarrier Frequency 2.52 GHz

Maximum Transmit Power 23 dBmMinimum Transmit Power 7 dBm

Sampling Frequency 30.72 MS/sSubcarrier Spacing 15 kHz

Bandwidth 20 MHzFFT Size 2048

CP Length 512 (Extended CP in LTE)Number of Data Subcarriers 1200 (Per OFDM symbol)

NI PXIe-7975 FlexRIO FPGA module [16] and a NI PXIe-8135real-time (RT) controller [17]. The RT controller is connected withFPGA modules through a NI PXIe-1082 chassis [18] offering ref-erence clock sharing and data aggregation. The FPGA module isconnected to an NI 5791R baseband transceiver. The NI 5791R base-band transceiver features dual 130 MS/s analog-to-digital converters(ADCs) with 14-bit accuracy, and dual 130 MS/s digital-to-analogconverters (DACs) with 16-bit accuracy [19]. The maximum powerlevel (23 dBm) of a small cell base station or cellular user could notbe supported by the NI 5791. We thus used an additional, off-the-shelf, wideband amplifier (ZVA-183W+ [20]) for the measurement.

Table I summarizes the parameters of the introduced LTE-like or-thogonal frequency-division multiplexing (OFDM)-based full-duplexprototype system.

III. PROPOSED TIME SYNCHRONIZATION METHOD

A. Time Alignment

To illustrate the basic principles behind our approach for full-duplex OFDM synchronization, this subsection describes the LTEuplink time-alignment procedure. Time alignment of uplink trans-missions is achieved by applying a timing advance, relative to thereceived downlink timing, at the user equipment (UE) transmitter. Themain role is to counteract differences in propagation delays betweenUEs. If the uplink transmission timing is synchronized within thelength of the uplink CP, the uplink signals from multiple users canbe handled by the base station without inter-symbol interference orintra-cell interference [21].

Like LTE uplink time-alignment, the timing advance procedurecan also be used to align arrival times between desired and self-interference signals in a full-duplex transceiver. If the difference, be-tween the arrival times of these signals, is within a cyclic prefix (CP)duration, low-complex subcarrier-wise self-interference cancellationcan be effectively adopted.

B. Normalized Synchronization Peak Index Switching

We modify the frame structure of the LTE downlink with a frameduration of 10 ms [21]. As illustrated in Fig. 2-(a) and (b), each slotincludes 6 OFDM symbols with 512 sample CP lengths (extendedmode in LTE). The primary synchronization symbol (PSS) is situatedin the last OFDM symbol of the first slot of each half frame and istransmitted by the first transmit (Tx) antenna of each full duplex node.The PSS is modulated on subcarrier index k, around the DC-carrier,by a length-62 Zadoff-Chu sequence given as,

Pi[k] =

e−j π

Npu(i)k(k+1)

if − 31 ≤ k ≤ −1

e−j π

Npu(i)(k+1)(k+2)

if 1 ≤ k ≤ 31

, (1)

where u(i) is an element among the root indices defined in LTEstandard, and Np is the sequence length for the PSS. Exploiting

the characteristic, where Zadoff-Chu sequences with different rootindices are orthogonal to each other, we apply root indices u(1) = 25and u(2) = 29 to detect time offset of both self-interference andthe desired signal at each full duplex receiver. Further, using theknowledge regarding the two kinds of time offset information, wepropose an algorithm to enhance the synchronization probabilitybetween full duplex nodes.

Since the PSS is allocated near the DC-carrier, a low-pass filteringof the baseband OFDM symbol helps to separate and extract PSSsubcarriers from data. The low-pass filtering is operated to the signalreceived at the first receive (Rx) antenna of each node.

Let Ns and Nd denote the number of Tx antennas at a full -duplexnode and its communication partner, respectively. The filtered signalis

yf [n] =

Ns∑i=1

Nf−1∑`=0

yS,i[n− `]f [`]︸ ︷︷ ︸self−interference part

+

Nd∑j=1

Nf−1∑`=0

yD,j [n− `]f [`]︸ ︷︷ ︸desired signal part

(2)

where f [`] represents an impulse response of finite length Nf

for ` ∈ {0, 1, ..., Nf − 1}. yS,i[n] represents the received signalfrom own transmitter’s ith antenna to the first Rx antenna fori ∈ {1, 2, ..., Ns}; yD,j [n] represents the received signal from thepartner’s jth Tx antenna to the first Rx antenna for j ∈ {1, 2, ..., Nd}.Each node has ideal Zadoff-Chu sequences for two kinds of rootindices. One is a synchronization code for desired signal and theother is for self-interference, given as,

p(i)[n] =

Np/2∑k=−Np/2

Pi[k]ej 2πN

kn (3)

which is an N -point inverse discrete Fourier transform (IDFT) of aZadoff-Chu sequence, having root index u(i), as defined in (1). Inorder to detect the starting point of the reference OFDM symbol, wefind the index of the maximum value of the cross-correlation withp(i)[n], i.e., the Zadoff-Chu sequence with root index u(i). Low-passfiltering yf [n] gives

κ(i)[d] =

∣∣∣∣∣N−1∑n=0

yf [n+ d]p(i)∗[n]

∣∣∣∣∣ (4)

and

τ̂ (i) = argmaxd

κ(i)[d] (5)

where (·)∗ denotes complex conjugation and d represents lag betweenthe two sequences.

Let us define a parameter for the ratio between the peak andaverage values of the cross-correlation in (4). We call this thenormalized synchronization peak (NSP) value:

α(i) =κ(i)[τ̂ (i)]

1Nc

∑Ncd=0 κ

(i)[d](6)

where Nc denotes the number of samples in the timing estimate.To decide the timing synchronization, we use a threshold value

αth based on the conventional LTE system. In other words, asuccessful timing synchronization event with respect to root indexu(i) happens when the NSP value α(i) is larger than αth. The successsynchronization probability with respect to root index u(i) can beexpressed as

Pu(i)

s = P(α(i) > αth) (7)

884

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(c)

(a)

(b)

Figure 2: Generic frame structure for full duplex OFDM system based on LTE. (a) full duplex SISO mode (b) full duplex MIMO mode (c)Comparison of NSP peak values depending on the distance or channel quality between a full duplex link.

Table II: Proposed synchronization algorithm for full duplex.

Step Algorithm

Step 1 Operate low-pass filtering using the received signal at the first Rx antennaStep 2 Calculate cross correlation κ(1)[d] and κ(2)[d]Step 3 Calculate α(1) and α(2) such that τ̂ (1) = argmaxd κ

(1)[d] and τ̂ (2) = argmaxd κ(2)[d]

Step 4 Test Feasibility condition α(1) > αth or α(2) > αth. If this condition is satisfied, go to Step 5. Otherwise, go to Step 2.

Step 5 Update τ (1), τ (2) such that

τ (1) = τ̂ (1), τ (2) = τ̂ (2), if α(1) > αth and α(2) > αth

τ (1) = τ̂ (1), τ (2) = τ̂ (1), if α(1) > αth and α(2) ≤ αth

τ (1) = τ̂ (2), τ (2) = τ̂ (2), if α(1) ≤ αth and α(2) > αth

.

By the aforementioned time-alignment procedure, one might arguethat it is possible to achieve accurate enough timing synchronizationusing either of the NSP index information for the desired signal andthe self-interference. However, as the desired and self-interferencesignals affect each other as strong interference, the condition ofα(1) > αth and α(2) > αth cannot be satisfied with high probability.For example, in the case where full duplex nodes are close to one an-other, the desired signal – relatively stronger than the self-interferenceat its own node due to analog cancellation – degrades the NSPcorresponding to the self-interference synchronization. In contrast,in the case where the two nodes are far apart, self-interference ateach node – stronger than the desired signal – drops the NSP valuefor synchronization of the desired signal.

To solve this problem, we propose a novel method to improvethe probability of successful synchronization in a full duplex linkand show implementation results in Section IV. The basic idea isto adaptively use different NSP indices (e.g., for desired signal andfor the self-interference) for synchronization depending on analogself-interference cancellation level and channel conditions.

As the possible cases from the feasibility condition test result foreach NSP value, it updates the NSP indices for synchronization ofthe desired signal and the self-interference. The update method of theNSP index is as follows.

1) Case of α(1) > αth and α(2) > αth: When the degradationlevel of the desired signal by path loss is on the order of the analogself-interference cancellation level, then both NSP values generatedfrom the own radio and its full duplex partner are likely to satisfy

each feasibility condition. Therefore, it updates each calculated NSPindex,

τ (1) = τ̂ (1) and τ (2) = τ̂ (2) (8)

where τ (1) and τ (2) represent the updated NSP index for the desiredsignal and for the self-interference, respectively.

2) Case of α(1) > αth and α(2) ≤ αth: The residual self-interference gets through the ADC. When this signal is much weakerthan that of the desired signal, sent from its partner in close proximity,we should only exploit the NSP index by PSS sent from the partner.This enables us to synchronize self-interference as well as the desiredsignal, according to,

τ (1) = τ̂ (1) and τ (2) = τ̂ (1) (9)

3) Case of α(1) ≤ αth and α(2) > αth: When the channelcondition between a full duplex link is of poor quality, the PSS sentfrom own transceiver is more useful at detecting the NSP index thanis the PSS sent from its partner. In this case, the desired signal andself-interference is synchronized based on the NSP index by self-interference, according to,

τ (1) = τ̂ (2) and τ (2) = τ̂ (2) (10)

Table II summarizes the proposed NSP-switching algorithm forsynchronization between full duplex nodes.

885

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Figure 3: Physical setup of our prototypes in an indoor testbed.

IV. EXPERIMENTAL EVALUATION

In this section, we provide experimental results of our full-duplexOFDM synchronizer when implemented on the testbed described inSection II. The timing synchronization performance is characterizedfor different quality of the link between nodes. Let us first introduceour measurement campaign and experimental scenario.

A. Experiment Scenario

For the performance evaluation, the measurement campaign wasconducted in various locations of the Veritas Hall Building C atYonsei University, shown in Fig. 3. The link quality (LQ) betweennodes was evaluated on the half-duplex mode of our testbed. Weconsider the signal model on the half-duplex mode at time index nas follows,

y[n] = H[n]x[n] + z[n] (11)

where H[n] ∈ CNs×Nd denotes the channel matrix between twonodes. x[n] ∈ CNd×1 the Tx symbol vector and z[n] ∈ CNs×1 theRx side noise vector. Given this, we define the LQ,

LQ =E[∥∥H[n]x[n]

∥∥2F

]σ2

z=

E[∥∥y[n]− z[n]

∥∥2F

]σ2

z(12)

where σ2z is the variance of z[n]. Assuming that the noise at the

receiver is additive white Gaussian noise (AWGN), we have anapproximated expression of LQ as,

LQ 'E[∥∥y[n]

∥∥2F

]− σ2

z

σ2z

(13)

Before the measurement of LQ, we first calculated the average noisevariance value of z[n] during 20 slots (3,072,000 samples) usingour testbed, with the transmitter off. Then applying that result, weperformed the measurement campaign.

Our testbed tried the initial access of full duplex link at thelocation, having a LQ value. The success probability of full-duplextime synchronization for the LQ is defined as Ps = NSuccess/NTrial,where NSuccess and NTrial are the number of synchronization success

Figure 4: Success probability performance of full duplex timingsynchronization according to different NSP index selection methodsand Tx power values, i.e., PT ∈ {7, 23} of full duplex radio.

and access trial, respectively. We were thus able to achieve the LQand its performance value mapping for a real-world indoor network.

B. Synchronization Success Probability

Figure 4 shows the success probability performance of full-duplextime synchronization when the different NSP index selection strate-gies are used. For the performance measurement, we consider two Txpower values (dBm), PT ∈ {7, 23}. As noted above, when the LQis low, there is higher synchronization success probability exploitingthe PSS sent from one’s own transceiver. When the LQ is good, thePSS of the desired signal is more helpful. As shown in Fig. 4, weobserve this trend in the case where PT = 7 dBm. Our testbed usesthe crossing point for NSP switching when the LQ is approximately12 dB. As a result, the proposed method enables a synchronizationsuccess probability over 90 % in the LQ range between 4 and 34 dB.Also when the Tx power is 23 dBm, we achieve good synchronizationsuccess probability. But one remarkable point is the crossing pointfor NSP switching; this is located within a comparatively high LQregion. This means that, despite two full duplex nodes being in closeproximity, they should still select the NSP index by the PSS of self-interference. This occurs because of residual self-interference. Sincethe Tx power of a full duplex node is too high, in the case whereits power exceeds the self-interference cancellation capability of fullduplex radio, the crossing point appears in a higher LQ region bythe amount of the residual interference.

V. CONCLUSIONS

We presented a new timing synchronization method for full-duplexcommunication systems, using the desired and self-interference sig-nals of each user. As proof-of-concept, by implementing the pro-posed method on our full-duplex SISO/MIMO link prototype, weexperimentally verified that the NSP index switching achieved highprobability of timing synchronization success. We believe our initialtest results provide worthwhile insights for the development of a moreviable full-duplex radio.

ACKNOWLEDGMENT

This work was supported by Institute for Information & Com-munications Technology Promotion(IITP) grant funded by the Koreagovernment(MSIT) (2015-0-00300, Multiple Access Technique withUltra-Low Latency and High Efficiency for Tactile Internet Servicesin IoT Environments).

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