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Robust OFDM Synchronization
Bryan Hehn
John Hoffmann
Jim Schroeder
Harris Corporation
Government Communication Systems
Melbourne, FL 32902-0037
Abstract
A previous paper [5] presented techniques that
allow compatibility with the existing 802.11a
standard, and also provide a robust mode for
protected communications. We demonstrated the
advantages of remapping subcarriers over each
symbol interval combined with applying a Fast
Hadamard Transformation (FHT) prior to the
application of an Inverse Fast Fourier
Transform (IFFT) to create the time domain
OFDM waveform. The FHT operator reduced
the average power spectral density. This
technique, combined with Frequency Hopped
(FH) subcarriers utilized the entire time-
frequency space available within an OFDM
system to improve the robustness to interference
and reduce the signal detection probability.
The 802.11a synchronization process is
susceptible to jamming. We simulate an
alternative synchronization pattern [1] to reduce
the Packet Error Rate (PER) in the presence of
jamming. Simulation results will be used to
demonstrate the advantages of this
synchronization method as compared to
conventional 802.11a OFDM.
I. Introduction
Orthogonal Frequency Division Multiplexing
(OFDM) is of interest for many wireless systems
due to its robustness to multipath delay and its
potentially high data rate transmission capability.
Unfortunately, OFDM systems are more
sensitive to synchronization errors than single
carrier systems. A number of approaches have
been proposed for estimating the time and
frequency offset [1-4].
For this paper we are interested in 802.11a
synchronization. Since the 802.11a
synchronization process is susceptible to
Jamming, we propose an alternative
synchronization pattern to reduce the Packet
Error Rate (PER) in the presence of jamming.
Simulation results will be used to demonstrate
the advantages of this synchronization method as
compared to conventional OFDM.
II. 802.11a Synchronization Review
The preamble field that is used for
synchronization in the IEEE 802.11a standard
consists of 10 short symbols and 2 long symbols
as defined in Fig. II-1.
Fig. II-1 IEEE 802.11a Preamble
Synchronization Definition
The short symbol, S, modulated onto 52
subcarriers (12 non-zero subcarriers), is given by
+++
+−−−−
+−−−−
+−−+
=−
0,0,
1,0,0,0,1,0,0,0,1,0,0,0,
1,0,0,0,1,0,0,0,1,0,0,0
,0,0,0,0
,
1,0,0,0,1,0,0,0,1,0,0,0,
1,0,0,0,1,0,0,0,1,0,0
6/1326,26
j
jjj
jj
j
jjj
jj
S
An IFFT creates the time domain signal as
defined by
∑=
−=
∆=
2/
2/
2)()(
Nk
Nk
Ftkjk eStwtr
π
with a .8 µsec period (3.2 µsec / 4) repeated 10
times for a total short symbol period of 8 µsec.
A long training symbol is generated by
modulating 53 subcarriers using the sequence
Transformed into the time domain via
∑=
−=
−∆=
2/
2/
)(2)()(
Nk
Nk
TtFkj
kGeLtwtr
π
where TG is the guard interval of length 1.6 µsec.
The total long symbol time is then 1.6 + 2(3.2) =
8 µsec.
III. Synchronization Simulation Results
Short Code – 802.11a
The short code is relatively robust against
jamming, especially if a simple frequency
domain notch filter is applied. The frequency
domain notch filter performed much better than
applying an LMS algorithm as no convergence
time is required. We illustrate used of the LMS
algorithm in simulations using symbol domain
long code sequences.
The Autocorrelation Function (ACF) of the
802.11a time domain short code is shown in Fig.
III-1.
Fig. III-1. Autocorrelation Function of Time
Domain Short Code
The next plot, Fig. III-2., shows the Power
Spectral Density (PSD) of the short code with
four 12 dB sinusoidal jammers added plus 10 dB
AWGN.
Fig III-2. Short Sync PSD (Top), Short Sync +
Four 12 dB Jammers + 10 dB AWGN (Bottom)
In Fig. III-3. and Fig III-4. we plot time domain
waveform ACFs before and after frequency
domain notch filtering to show the potential
improvement in jammer resistance.
Fig III-3. Short Sync Jammed ACF
Fig III-4. Time Domain ACF of Notch Filtered
Short Sync
A comparison of Fig. III-1., the original time
domain ACF with Fig. III-4. the notch filtered
time domain ACF shows that the interference
has been effectively eliminated. Of course there
is more to the story than short sync
autocorrelation.
Short Code – Proprietary
The next step towards a realistic simulation is to
use the detection algorithm that is implemented
in the hardware prototype. In Fig III-5. we plot
the detection peak with no interference. This
preamble design is a modified version of the
IEEE 802.11a as given in [41].
Fig. III-5. Preamble Short Code Detection (Minn
Pattern) Without Interference
In Fig. III-6. we show the preamble short code
detection result with f our 12 dB Jammers Notch
Filtered.
Fig. III-6. Preamble Short Code (Minn Pattern)
Detection With Four 12 dB Jammers Notch
Filtered
Short Code – CAZAC
So called “Constant Amplitude Zero
Autocorrelation” (CAZAC) sequences were
originally developed in the early 1060s [78] for
use in radar system. Subsequently they have
been studied for use in communications
waveform design [77]. CAZAC sequences have
found use in other Harris modem projects so we
developed a simple simulation to test their
jammer resistance.
In Fig. III-7. we plot the ACF of the time domain
short sync preamble without jammer interference
Fig. III-8. and Fig. III-9. we show the ACF in the
presence of 4 X 12 dB jammers before and after
notch filtering to demonstrate the improvements
obtained by filtering.
Fig. III-7. Time Domain ACF of CAZAC
Sequence
Fig. III-8. Time Domain ACF of CAZAC
Sequence With 4 X 12 dB Jammers
Fig. III-9. Time Domain ACF of CAZAC
Sequence With 4 X 12 dB Jammers and Notch
Filter Applied
Long Code – 802.11a
Test Case - LMS:
• J/S = 12 dB CW Jammer
• SNR = 10 dB AWGN
• Code: T1 T2 at 106 bits in length
• Input and reference aligned for LMS
algorithm
• NOTE: Unsynchronized LMS still
converged, but with loss of correlation
peak amplitude
• Results for perfect synchronization in
Fig. VI-10., VI-11., and VI-12.
Fig. III-10 Symbol Domain T1 T2 Long Code
Autocorrelation Function
Fig. III-11. Symbol Domain T1 T2 Long Code
Cross Correlation of Code plus Jammer plus
WGN with Stored Reference
Fig. III-12. Symbol Domain T1 T2 Long Code
Cross Correlation of Code plus Jammer plus
AWGN with Stored Reference after LMS
Filtering (Perfect Code Alignment Input to LMS
Algorithm)
Test Case - FFT:
• J/S = 4 X 12 dB CW Jammers
• SNR = 10 dB AWGN
• Code: T1 T2 at 106 bits in length
• Input and reference aligned for FFT
Notch Filter algorithm
• Results for perfect synchronization in
Fig. VI-13., VI-14., and VI-15.
Fig. III-13. Long Code Time Domain ACF
Fig. III-14. Long Code Time Domain ACF With
4 X 12 dB Jammers + 10 dB AWGN
Fig. III-15. Long Code Time Domain ACF With
4 X 12 dB Jammers + 10 dB AWGN, Notch
Filter Applied
IV. Packet Error Rate Simulations
Introduction
Tactical radios commonly use a standard 802.11a
waveform that is susceptible to narrowband
interference and frequency offset errors. This
paper discusses the current baseline performance
under interference conditions and some methods
from the open literature that can be used to
improve the performance. Both Matlab
simulations and lab measurements are shown.
To understand any improvements that may be
made the current implementation's baseline error
rates were simulated. The Eb/No and the jammer
to signal levels' were simulated. Throughout
much of this memo the Eb/No = 10dB case will
be used as a reference level.
Baseline Bit Error and Packet Detect rate vs
Eb/No
The plots below show the bit error rate and
packet detection rate Vs energy per bit to noise
ratio (Eb/No). The bit error rate is calculated by
comparing the known transmitted bits to the
decoded bits. The packet error rate indicates the
percent of packets that had 1 or more bit errors.
The simulation parameters are BPSK, ½ rate
code, 200 packets of 1,000 bytes each, 0 Hz
frequency offset, perfect timing.
Figure IV-1. Baseline Implementation Bit Error
Rate with ideal packet timing and frequency
offset calculation.
Note that the 11dB Eb/No level error rate was
about 10% packet error rate. This is the error
rate that all algorithm changes will reference and
will be shown on most BER plots.
Baseline Bit Error and Packet Detect rate Vs JSR
The plots in Figure IV-2 show the bit error rate
and packet detection rate Vs jammer to noise
ratio (JSR). In some cases a frequency offset
was applied to the transmitted packet. The bit
error rate is calculated by comparing the known
transmitted bits to the decoded bits. The packet
error rate indicates the percent of packets that
had 1 or more bit errors.
Figure IV-2 Baseline Implementation Error Rate
Vs JSR with ideal packet timing and frequency
offset.
Figure IV-3 Baseline Implementation Bit Error
Rate and Packet Detect Rate Vs JSR, Freq
Offset=500 kHz, non-ideal timing detector &
non-ideal frequency offset compensation
The above plots show that packets are never
detected reliably. A contributing factor to packet
detect rate is false detects. If a false detect
occurs before the actual packet then the packet is
declared lost and the packet detect rate for that
iteration is set to 1. The current implementation
is especially sensitive to very low signal levels
during the silence period. Also, the low level
jammers produce a lot of false detects.
Walsh Transform
This section shows the error rates when the
Walsh transform is turned on. The ideal packet
timing is given to the simulations so the effect of
the packet synchronization is eliminated.
The results are compared with the Walsh Off
simulations.
Figure IV-4 Baseline Implementation Bit Error
Rate with ideal packet timing and non-ideal
frequency offset calculation.
Figure IV-4 shows that the Walsh transform has
about a 1dB implementation loss. There may
need to be further analysis to determine why the
Walsh suffers from this implementation loss.
The magnitude of the Walsh transform shows
when a jammer is added. The figures below
show the error Vs JSR plots.
Figure IV-5 Error Rates vs JSR, ideal packet
timing and non-ideal frequency offset
(foff=0Hz) calculation at 15dB Eb/No.
The figures above show a 15dB improvement in
PER by using the Walsh in a jamming
environment.
Enhanced Short Sync
The previous plots assumed perfect timing
synchronization. However, the first and possible
most important process is packet detection. If a
packet is not even detected then there can be no
hope of recovering any bits or letting the
transmitter know that the link is noisy. Various
proprietary enhancements to the current short
sync detection process were made but none
showed and significant improvement over the
current method. It was determined that to
improve the packet detection under jamming
conditions a new short sync would need to be
designed. Reference [1] shows a simple change
to the current, 802.11, short sync. The method,
called "Minn", throughout this memo was
implemented and simulated.
Figure IV-6 shows the modification of the
current short sync pattern.
Figure IV-6 Diagram showing the construction
of the Minn L=8 short sync
The Minn short sync simply inverts or not group
of 16 samples in some pattern. On the receive
side there will be a longer correlation but there
will be a single peak that indicates the end of the
short sync.
The Minn pattern can be L=8 or L=4 where L is
the number of groups of 16 samples. L=8
showed the most improvement in detection rate
but it does increase the receive processing
complexity. Although the L=8 receive
processing complexity is more than the L=4 or
the current short sync received it should still be
able to fit in the current FPGA resources. The
Minn L=8 is thus chosen as the best candidate.
It might be possible to increase the L to 10 (or
more) to further improve packet detection.
However, it is desirable to keep the current short
sync time of 160 samples. Also the first two
groups of 16 samples are used for AGC settling
and diversity switching so these samples may be
unreliable.
The exact pattern used for the Minn short sync
was found by a computer search that looked for
the pattern yielding the highest peak to average
signal after the packet detector. All of the 2^8
patterns were iterated through and run through
the actual packet detection algorithm and the
highest peak to average waveform was found.
Also, a desirable feature of the correlation
pattern is if there is another peak in the
waveform it should be to the right of the highest
peak. With this peak is found the receiver could
then wait some number of samples to see if a
larger peak may be found.
Figure IV-7 shows some candidate
synchronization patterns and the chosen pattern
(55) for Minn L=8.
Figure IV-7 Some candidate Minn L=8 sync
patterns.
Figure IV-7 shows the packet detection
waveform for five different patterns. The pattern
number indicates the pattern converted to
decimal if the -1's mapped to 0. For instance
pattern number 0 is [-1 -1 -1 -1 -1 -1 -1 -1] and
pattern 255 would be [1 1 1 1 1 1 1 1].
Pattern 121 was used initially because it does
have the best peak to average. However, pattern
55 is now used because the second and third
highest peaks are closer to the main peak. This
feature makes the receiver a bit easier. The
reason is of the algorithm finds a peak it must
wait N samples to see if there is a larger peak.
With pattern 55 N could be made smaller than
with pattern 121. Pattern 121 may be used in
some simulation however this does not change
any relevant findings. During actual packet
detection implementation other pattern may be
tested to determine the optimal under real-world
environments.
The figures below show the error rates Vs JSR
with the Minn L=8 short sync and modified
packet detector.
Current Short Sync, 160 samples, 16 samples repeated 10 times
(16x10)
1
6
1
6
1
6
1
6
1
6
1
6
1
6
1
6
1
6
1
6
Minn L=8 Short Sync, 160 samples (16x10)
1 1 -1 1 1 1 1 -1 1 -1
X
=
8 groups of 16 samples
Figure IV-8 BER & packet detect rate vs JSR
using the Minn, L=8 short sync, freq offset=500
kHz, non-ideal timing detector and non-ideal
frequency offset comp
Figure IV-8 shows that the packets are reliably
detected up to JSR of -5dB. This is a significant
improvement over the original short sync where
packets were not reliably detected below -15 dB
JSR. The plot original short sync (from Figure
IV-3) and the Minn L=8 short sync packet
detections plots are shown below for
comparison.
Figure IV-9 Original Short Sync (left plot) and
Minn L=8 short sync packet detection error rate
vs JSR plots
This short sync has the added benefit of
improved packet detection even under AWGN
only conditions. See Figure IV-10.
Figure IV-10 Packet detect error rate vs Eb/No
with original short sync and Minn L=8 short
sync. Minn L=8 shows ~8dB improvement
V. Conclusions
We simulated two short sync code preamble
options: (i) Existing IEEE 802.11a Standard, (ii)
Modified IEEE 802.11a Standard and use of a
FHT for frequency spreading. Our PER and BER
simulations demonstrated that the selected
preamble design, a modified version as given in
reference [1] of the IEEE 802.11a standard
preamble, is robust to jamming and
computationally efficient. Additionally, we
quantified the performance improved that
resulted from using an FHT.
VI. References
1. H. Minn, V. K. Bhargava, and K. B.
Letaief, "A robust timing and frequency
synchronization for OFDM systems,"
IEEE Transactions on Wireless
Communications, vol. 2, no. 4, pp. 822-
839, 2003.
2. F. Tufvesson and M. Faulkner, “Time and
Frequency Synchronization for OFDM
using PN-Sequence Preambles,” IEEE
VTC 1999.
3. A. Kebo, I. Konstantinidia, J. J. Benedetto,
M. R. Dellomo and J. M. Sieracki,
“Ambiguity and sidelobe behavior of
CAZAC coded waveforms,” pp. 99 –
103, Radar 2007.
4. R. L. Frank and S. A. Zadoff, “Phase shift
pulse codes with good periodic
correlation properties,” IRE Trans. Info.
Theory, Vol. 8, No. 6, pp. 381 – 382,
1962.
5. C. Moffatt and J. Schroeder, “Protected
OFDM Waveform for Tactical
Networks,” Defense Applications of
Signal Processing Workshop,” Kauai,
HI, September 27 – 30, 2009.
6. D. C. Chu, “Polyphase codes with good
periodic correlation properties,” IEEE
Transactions on Information Theory,
Vol. 18, pp. 531 – 532, 1972.
7.M. J. Medley, “Interference Mitigation in
Spread Spectrum Systems Using Lapped
Transforms,” AFRL-IF-RS-TR-2002-96,
May 2002.
8. A. Coulson, “Bit Error Rate Performance
of OFDM in Narrowband Interference
with Excision Filtering,” IEEE Trans. On
Wireless Comm., pp 2484-2492, Vol. 5,
No. 9, September 2006.
9. S. C. Tyler, “The Design of a Frequency
Domain Interference Excision Processor
Using Field Programmable Gate Arrays,”
AFRL-IF-RS-TR-2005-24 In-House
Report, AFRL / ID, Rome, NY, January
2005.
10.Lowdermilk, R.W., and harris, f.j.,
“Design and Performance of Fading
Insensitive Orthogonal Frequency
Division Multiplexing (OFDM) Using
Polyphase Filtering Techniques,”
Asilomar’96, Pacific Grove, Calif., 3-6
November 1996.
11. C. Williams, S. McLaughlin and M.A.
Beach, “Robust Timing Synchronisation
in Multipath Channels,” EURASIP
Journal of Wireless Communications and
Networking, Volume 2008, Issue 4,
Article No. 7, January 2008.
12. J.-J. van de Beek, M. Sandell, and P. O.
Borjesson, "ML estimation of time and
frequency offset in OFDM systems,"
IEEE Transactions on Signal Processing,
vol. 45, no. 7, pp. 1800-1805, 1997.
13. C. Williams, M. A. Beach, and S.
McLaughlin, "Robust OFDM timing
synchronisation," Electronics Letters,
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