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Radar and EW Sub-Systems Saurabh Sinha Friday, 22 August 2014. Departement Elektriese, Elektroniese & Rekenaar-Ingenieurswese Department of Electrical, Electronic & Computer Engineering Kgoro ya Merero ya Mohlagase, Elektroniki & Bointšinere bja Khomphutha. - PowerPoint PPT Presentation
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Radar and EW Radar and EW
Sub-Systems Sub-Systems
Saurabh SinhaSaurabh SinhaSaturday 22 April 2023
Departement Elektriese, Elektroniese & Rekenaar-IngenieursweseDepartment of Electrical, Electronic & Computer EngineeringKgoro ya Merero ya Mohlagase, Elektroniki & Bointšinere bja Khomphutha
Carl and Emily Fuchs Institute for Microelectronics
CEFIMFounded in 1981 after receiving a grant from
Carl and Emily Fuchs(1972 to 1981 Institute for Microstructures)
Director: Prof. Monuko du PlessisSenior Lecturer: Dr Saurabh SinhaLecturers: Mr Johan Schoeman
Mr Jannes Venter
Researcher: Mr Alfons Bogalecki
Project manager: Mr Gerrie Mostert
Postgraduatestudents(PhD and MEng): 15
CEFIMCarl and Emily Fuchs Institute for
Microelectronics
Postgraduate Courses
EIN 732 Introduction to Research Prof. JAG Malherbe
EME 732 Analogue Electronic DesignProf. M. du Plessis
EDG 780 Digital Electronic Design
Dr S Sinha
Mr PJ Venter
Mr J Schoeman
DPSS, CSIREMK 732 Communication Electronics
Prof. M. du Plessis
EEY 890 Dissertation (MSc / MEng)
EIN 990 Thesis (PhD / PhD (Eng))
Focus Areas & International Research Partners
CMOS / Si device manufacture Georgia Tech, Atlanta, USA
RF MEMS and mm wave IC’s IMT, Bucharest, Romania Dresden University of Technology, Dresden, Germany University of Electronic Sciences and Technology, China
MEMS simulation and manufacture IMTEK, University of Freiburg, Germany
Facilities
IC characterization equipment (RF lab)
Optical characterisation of sources and detectors
Semiconductor processing facility
Components of Electronic Warfare
A [CMP] Wafer
Europractice (Belgium)MOSIS (USA)CMP (France)
AMS AMI
TSMCUMCIHPIBM
CSMCOMMIC
STIC FOUNDRIES
Prototyping○ IC Foundries
CEFIM
Research Methodology
Integrated-Circuit Level Modelling
ReceivedSignal
RecoveredData
RecoveredData
gclreal1
gclimg1
VCO
Voltage-ControlledOscillator=inphse1
VCO
Voltage-ControlledOscillator1- quad1
tanh
TrigonometricFunction1
tanh
TrigonometricFunction
1e10
den(s)
Transfer Fcn
PulseGenerator1
PulseGenerator
Product9
Product8
Product7
Product6
Product5
Product11
Product10
1s
Integrator1
1s
Integrator
-K-
Gain2
-K-
Gain1
-K-
Gain
-1
Constant3
Add5
Add3
Add1
Despreading Demodulation Bit Recovery
Phase Detector
Mathematical/Ideal Modelling
Revise Model
Apply Findings
TANNER EDA
MATLAB
Research Tools
• Tanner EDA (~<2009)• Mentor Graphics (>2008)
– IC Flow– Euro 50/group_licence
• Cadence (~>2008)– AMS, Virtuoso, etc
• ADS (>2008)
Europractice (Belgium)CMP (France)MOSIS (USA)
mname drain gate source bulk model [1=L] [w=W] [ad=Ad] [pd=Pd] [as=As] [ps=Ps] [nrd=Nrd] [nrs=Nrs] [rdc=Rdc] [rsc=Rsc] [rsh=Rsh] [geo=Geo] [M=m] [tables=T]
3rd Party IP Blocks
System-Level Modelling○ System-Level Tools
& DRC
Conceptual Design
SIMULINK
First-principlesCommunications ToolboxSignal Processing Toolbox
University of Pretoria○ Short Courses
• Tanner Course (with P.J. Venter)– Product Registered– Events in 2007 & 2008– Phase-out: 2009
• RF IC Design Course (with M. du Plessis)– Product Registered
• OrCAD Layout Plus Course (with S. Esterhuyse)– Product Registered
Future:
• Mentor Graphics (IC Flow & EldoRF) Course• mm-Wave Radio Design Course (with D. Foty)
University of Pretoria○ Contract Research / Research Studies
• Grintek Ewation– 1 Project (2 years)
• A 5 - 8 GHz SiGe CMOS Voltage Controlled Oscillator with Reduced Phase Noise
• Defence, Peace, Safety & Security (DPSS), CSIR– Armscor (Origin: DoD) – 3 Projects (2 years each)
• A 5 GHz Voltage Controlled Oscillator (VCO) with 360° Variable Phase Outputs
• Reducing Jitter in High-Speed Serial Links• A Linear SiGe BiCMOS LNA for Wide Band
Receivers
A 5 – 8 GHz SiGe CMOS Voltage ControlledOscillator (VCO) with Reduced Phase Noise (1)
Principal requirements: High quality (Q) factor Low 1/f active noise component
Phase noise determined by: Q-factor of the resonator Q-factor of the varactor diode Active device use for the oscillating transistor Power supply noise External tuning voltage supply noise
L1 L2
VDD
VTUNE
C1 C2D1 D2
T1 T2
IBIAS
Cp vs
+
-
A 5 – 8 GHz SiGe CMOS VCO with Reduced Phase Noise (2)
Parameter Typical Value Units
Frequency Range 4.0 – 8.0 GHz
Power Output 5 dBm
SSB Phase Noise @ 100 KHz Offset
-100 dBc/Hz
SSB Phase Noise @ 10 KHz Offset
-75 dBc/Hz
Supply Current (Vcc +5V) 75 (max) mA
Tune Port Leakge Current (Vtune +15V)
10 (max) µA
Frequency Drift Rate 0.8 MHz/oC
Student: T.A.K. OppermanSubmitted dissertation (Nov. 2008)
LEDGER Programme
A 5 GHz Voltage Controlled Oscillator (VCO) with 360° Variable Phase Outputs (1)
A 5 GHz VCOwith 360° Variable Phase Outputs (2)
• This beam formation capability of antenna arrays is achieved by tuning the phase and amplitude of the transmitting signal, individually for each antenna element. (Note that no mechanical movement is required!)
A beam-forming back end and corresponding antenna pattern (Gueorguiev et al., A CMOS transmitter for 802.11a WLAN with beam forming capability, Circuits and Systems 2005)
0 0.5 1 1.5 2 2.5 34.2
4.4
4.6
4.8
5
5.2
5.4x 10
9
Vtune (V)
Out
put F
requ
ency
(H
z)
Tuning characteristic of the VCO
Simulation Results – Design spec. 1: VCO
• Simulation results show that this design specification has been achieved.
Out
put F
requ
ency
(G
Hz)
A 5 GHz VCO with 360° Variable Phase Outputs (3)
Circuit Realization – Design spec. 2 and 3: Phase shifter
• Gilbert Mixer used as a Variable Gain Amplifier (VGA).• The current of the mixers are combined to obtain the vector sum.• The differential architecture of the Mixer requires the transistors used
as current sources to be closely matched.
Vcontrol-
Vcontrol+
Isum- Isum+
Vosc-
Vosc+
Gilbert Mixer
Gilbert Mixer
Vector Sum
90°
VGA
VGA
+
In-phase
Quadrature
Vcontrol_I
Vcontrol_Q
+ -
+ -
A 5 GHz VCO with 360° Variable Phase Outputs (4)
Simulation Results – Design spec. 2 and 3: Phase shifter
• The quadrature amplitude was held constant while the in-phase voltage amplitude was swept.
• The phase shift was then measured.
A 5 GHz VCO with 360° Variable Phase Outputs (5)
A 5 GHz VCO with 360° Variable Phase Outputs (6)
0
12
U 2
012
U 3
012
U 4
0
12
U 5
0
R 11 0 k
R 21 0 k
R 31 0 k
R 41 0 k
0
0
0
0
T2Z 0 = 5 0
12
U 6
0
12
U 7
0
0
0
12
U 8
0
12
U 9
0
R 51 0 k
R 61 0 k
R 71 0 k
R 81 0 k
0
0
0
0
123456789
J 2
C O N 9
T4Z 0 = 5 0
0
0
T3Z 0 = 5 0
0
0
1 23 45 67 8
J 4
J U M P E R 4
T6
Z 0 = 5 0
0
0
0
T8
Z 0 = 5 0
0
T7
Z 0 = 5 0
SW1
0
0
T5
Z 0 = 5 0
V C C
0
0
V C C
V C C
SW2
V C C
V C C
V C C
V C C
V C C
V C C
1 23 4
J P 1
J U M P E R 2
1 2
J 3
J U M P E R 1
GN
D1
Ph
aseA
2IC
ont
rolA
3Q
Co
ntr
olA
4IC
ont
rolB
5P
has
eB6
QC
on
trol
B7
90d
eg8
270
deg
9G
ND
10
VD
D2
11
180
deg
12
V t u n e 21 3
0 d e g1 4
C M 11 5
C M 21 6
V D D 41 7
I o +1 8
I o -1 9
V 1 +2 0
V 1 -2 1
G N D2 2
V 2 +2 3
V 2 -2 4
V1
QA
25
Ph
Se
lA0
26
Ph
Se
lA1
27
Ph
Se
lA2
28
Ph
Se
lA3
29
V1
IA3
0
V1
QB
31
Ph
Se
lB0
32
Ph
Se
lB1
33
Ph
Se
lB2
34
Ph
Se
lB3
35
V1
IB3
6
V D D 33 7V B ia s3 8G N D3 9Q C o n t ro lC4 0
P h a s e C4 2
I C o n t ro lC4 1
Q C o n t ro lD4 3I C o n t ro lD4 4P h a s e D4 5V D D 14 6V t u n e 14 7V C o n t ro l-4 8
QFN48
U 1 0Q V C O
1 23 4
J P 2
J U M P E R 2
1 23 4
J P 3
J U M P E R 2
T1Z 0 = 5 0
1 23 4
J P 4
J U M P E R 2
C 21 n
V C C
0
12
J 6C O N 2
0
0
1
2
C O 5S M A
0
C 14 . 7 u
1
2
C O 6S M A
0
1
2
C O 7S M A
12345678
J 1
C O N 8
1
2
C O 8S M A
1
2
C O 4S M A
12
J 5
P C O N
1
2
C O 3S M A
V C C
1
2
C O 2S M A
0
1
2
C O 1S M A
0
A 5 GHz VCOwith 360° Variable Phase Outputs (7)
A 5 GHz VCO with 360° Variable Phase Outputs (8)
A 5 GHz VCOwith 360° Variable Phase Outputs (9)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16-350
-300
-250
-200
-150
-100
-50
0
Preset
Pha
se s
hift
( d
egre
es )
Measured phase shiftExpected phase shift
A 5 GHz VCO with 360° Variable Phase Outputs (10)
• High bandwidth
• Standards: – Sonet OC-192 (10 Gb/s)– USB 2.0 (480 Mb/s)– IEEE 802.3 (1 Gb/s)– IEEE 1394b (3.2 Gb/s)
• Component interconnects– RocketIO (2.5 Gb/s)– PCI-Express (2.5 Gb/s)
Data retiming
SerialiserPre-
emphasisEqualisation
Clock and data
recovery
De-serialiser
N d
ata
line
s
N d
ata
line
s
Transmitter ReceiverMedia
Reducing Jitter in High-Speed Serial Links
FIR PE Channel +
Desired signal
Tra
nsm
itted
si
gnal
Adaptive algorithm
Coefficient update
A Linear SiGe BiCMOS LNA for Wide Band Receivers
Technology Bandwidth (GHz) Gain (dB) NF (dB) S11 (dB) Power
(mW)
SiGe BiCMOS 3 – 10 20 2.5 – 4.5 < -10 30
0.18 μmCMOS 3 – 10 13 – 16 3.1 – 6 < -8 11.9
GaAs HBT 1 – 10 22.5 3 – 3.6 < -10 55
mm-Wave Spectrum
mm-Wave Radio Design (1)
Chip 1: RF SiGe HBT, IF CMOS; Chip 2 – Baseband analog & digital (all CMOS)
mm-Wave Radio Design (2)
mm-Wave Radio Design (3)
Publications (Focus area: RF IC)
Publications 2006 2007 2008 Total
Conferences 3 6 4 13
Journals 4 0 1 5
Posters 0 0 0 4
*Growth in postgraduate students*PDIs
Future Waves
Undergraduate:• EW-Series of final year projects
– Emphasis on design
Postgraduate:• EW IC sub-systems
– Research techniques design methods– Prototyping and verification
Questions and Feedback
Saurabh SinhaCarl & Emily Fuchs Institute for Microelectronics (CEFIM) 2-11
Dept. of Electrical, Electronic & Computer Engineering (www.ee.up.ac.za)
University of Pretoria (www.up.ac.za) Tel: (012) 420-2950 Cell: (082) 777-6893
E-mail: [email protected] | Web: http://cefim.ee.up.ac.za
Hmm…I see….
IC Design