Reducing jitter utilising adaptive pre-emphasis FIR filter for high speed serial links Marius Goosen Supervisor: Prof. Saurabh Sinha Microelectronics &

Reducing jitter utilising Reducing jitter utilising adaptive pre-emphasis FIR adaptive pre-emphasis FIR filter for high speed serial linksfilter for high speed serial links

Marius GoosenMarius Goosen

Supervisor: Prof. Saurabh SinhaSupervisor: Prof. Saurabh Sinha

Microelectronics & Electronics Group

Friday 21 April 2023

Departement Elektriese, Elektroniese & Rekenaar-IngenieursweseDepartment of Electrical, Electronic & Computer EngineeringKgoro ya Merero ya Mohlagase, Elektroniki & Bointšinere bja Khomphutha


Agenda

• Background• High speed serial links on copper channels• Frequency dependant distortion• Deterministic jitter• Adaptive pre-emphasis• Pilot signaling and peak detection• Simulation results• Experimental results• Conclusion

2

Background

• M-data lines combined into a high speed serial data line• Less skew between lines• Higher bandwidth capability• Lower pin count and cost of implementation


Scramble

Scramble

8B/10B

8B/10B

MultiplexerPre-emphasis

Driver

EqualiserSampler &

DemultiplexerClock / Data

Recovery

D+

D-

D+

D-

m

mm

m

m

Transmitter

Receiver

Encoder

Decoder

3


High speed serial links

Reference Data rate Technology Pre-emphasis

[1] 1 Gb/s CMOS None

[2] 5 Gb/s CMOS 3-tap

[3] 10 Gb/s CMOS 5-tap

[4] 10 Gb/s BiCMOS None

[1] C.Y. Yang and Y. Lee, “A 0.18 μm CMOS 1 Gb/s serial link transceiver by using PWM and PAM techniques”, IEEE International Symp. on Circuits and systems, Vol. 2, pp. 1150-1153, Kobe, 23-26 May 2005.

[2] C.H. Lin, C.H. Wang and S.J. Jou, “5 Gbps serial link transmitter with pre-emphasis”, IEEE Proc. of the 2003 Asia South Pacific design automation conf., Kitakyushu, pp. 795-800, 21-24 Jan. 2003.

[3] M. Li, T. Kwasniewski, S. Wang and Y. Tao, “A 10 Gb/s transmitter with multi-tap FIR pre-emphasis in 0.18μm CMOS technology”, IEEE Proc. of the 2005 Asia South Pacific design automation conf., Shanghai, pp 679-682, 18-21 Jan. 2005.

[4] D.J. Friedman, M. Meghelli, B.D. Parker, J. Yang, H.A Ainspan, A.V. Rylyakov, Y.H. Kwark, M.B. Ritter, L. Shan, S.J. Zier, M. Soma and M. Soyuer, “SiGe BiCMOS integrated circuits for high speed serial communication links”, IBM J. Res. & Dev., Vol 47, No 2/3, Mar. 2003.

4

Frequency dependant distortion: Package parasitics

• Introduces frequency dependant devices

5


Cpad_sub CPCBpad_GP

LBondwire

Inductance a problem:• Thicker bond wires• Use multiple bond wires• Use tape bonding≈ 45-50 fF

≈ 1 nH/mm

Frequency dependant distortion: Copper backplane channel ●

• Copper channel loss:

• Conductor loss due to skin effect:

• Where Rskin represents a frequency dependent resistor attenuating the signal:

• Loss due to dielectric:


dctot

f

Rskin

tan

1

1

r

r

eff

effd c

f

6

wZ

R

o

skinc 686.8

Frequency dependant distortion: Copper backplane channel ● ●

7

108

109

1010

1011

0

5

10

15

20

25

Frequency [Hz]

Lo

ss [d

B/m

]

Conductor lossDielectric lossTotal loss



Frequency dependant distortion: Channel response

• Loss of 50 dB @ 10 GHz• Severe frequency dependent distortion

8

0.2 0.4 0.6 0.8 1.00.0 1.2

0.01

0.02

0.03

0.00

0.04

Time [ns]

Vol

tage

[V]


Deterministic jitter

• Deterministic jitter:– Duty cycle distortion– Data dependent jitter

• DDJ caused by this frequency dependent distortion• DDJ causes uncertainty in pulse edges

9

222

1)(

Dt

DttfDJ

Unit interval

Ideal sampling instant

Error

region

Pre-emphasis and implementation


10

ITAP0ITAP1 ITAPN

Adaptive pre-emphasis

11


• Conventional pre-emphasis– Externally adjustably filter taps– Fixed filter taps

• Adaptive pre-emphasis– Automatically finds optimal filter taps– Does not require a characterised channel

Requires characterised channel

Pilot signaling and peak detection ●

12


Initialise h(n) to maximum

Error < 0

Update h(n) by decreasing with

LSB

Transmit pilot signal P(n)

Peak detection at receiver

Error calculation

YesNo

Reset all filter taps

n +1

0 1 2 3 4 5

P(0)

0 1 2 3 4 5

P(1)

0 1 2 3 4 5

P(2)

0 1 2 3 4 5

P(3)

Pilot signaling and peak detection ● ●

• Representing the channel and FIR filter as impulse response

• For the first pilot signal:

• For the second pilot signal:

13


N

kkCHN kncnI

0

N

kkFIR knhnI

0

],,,[ 30201000 chchchchny

2113201012100110000 ,,, cchcchcchcchchcchchny

Design and implementation overview

14

TX RX

D-

D+Data in

CLK in


FIR pre-emphasis

driver

Pilot signal generator

Control logic

CML multiplexer

CML DFF CML XOR

6-bit current mode DAC

Filter tapNo. 1

7-bit counter

Control logic

50 Ω termination

Differential amplifier

Comparator

Pulse generators

7 μA / 0.35 mV

ROMParallel

load shift register

3-bit counter

CMOS control logic

CML multiplexer

Mathematical simulation results ●

15


Mathematical simulation results ● ●

16


0 2 4 6 8 10 12 140

0.5

1Ideal data transmitted

Vol

tage

[V

]

0 2 4 6 8 10 12 140

0.02

0.04Data received without pre-emphasis

Vol

tage

[V

]

0 2 4 6 8 10 12 140

0.05

0.1Data received with pre-emphasis

Vol

tage

[V

]

Bit no.

Mathematical simulation results ● ● ●

17


1 2 3

4 5 6


Circuit simulation results ●

18

1 2

3 4

5 6


Circuit simulation results ● ●

19

0 20 40 60 80 100 1200

1

2

(a)

Vol

tage

(V

)

0 20 40 60 80 100 1200

1

2

(b)

Vol

tage

(V

)

0 20 40 60 80 100 1200

1

2

(c)

Vol

tage

(V

)

0 20 40 60 80 100 1200

1

2

(d)

Vol

tage

(V

)

0 20 40 60 80 100 120

1.5

2

(e)Time (ns)

Vol

tage

(V

)


Experimental results ●

20

1000 μm x 670 μm

340 μm x 160 μm

Approximately 1600 transistors

Area = 0.725mm2

4 mm

4 mm

Experimental results ● ●

21


TX

RX

OUT+

OUT-

Shift IN

Shift OUT

ADJ OUT

EOC IN

CLK

DATA

ADJ OUT

IN- IN+

2 Biasin

g pad

s4 B

iasing p

ads

11 cm

11.5 cm

Experimental results ● ● ●

• Transmitter– Working with a single filter tap– 14 % smaller swing– Unable to move to other states

• Receiver– Pulses generated from TX signals– Correct pulse width – too low amplitude to switch CMOS logic

22


ADJ SFT240 250 260 270 280 290 3000

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

Time [ns]V

olta

ge (

V)

ADJUST

SHIFT__IN

Experimental results ● ● ● ●

• Pulse generation circuit depends on an RC time constant– Used in a feedback loop– R determines:

• Charge rate• Discharge rate

– R Biased PMOS transistor• Achieve constant charge and discharge rate• Too slow, hence CMOS output buffer not properly switched.• Corner analysis

23


Experimental results ● ● ● ●

• Static power dissipation– Transmitter

• Power dissipation = 36 mW– Calculated ≈ 32.5 mW (with one active filter tap)

– Receiver• Power dissipation = 19.8 mW

– Calculated ≈ 18 mW

24


Speed Swing Filter taps Power

Simulated 5 Gb/s 300 mV 6 < 70 mW

10 Gb/s 200mV 6 < 70 mW

Conclusion

• Possible “easy” solution for bandwidth problems– One button high speed serial link

• Speed tests still need to be performed• Pulse generation circuit should be redesigned

– Produce higher integrity signal

• 2 international IEEE conference articles– M.E. Goosen, S. Sinha, A. Müller and M. du Plessis, “A low switching time transmitter for high

speed adaptive pre-emphasis serial links,” Proc. of IEEE CAS 2009, pp. 481-484, Sinaia, 12-14 Oct. 2009.

– M.E. Goosen and S. Sinha, “Analysis of Adaptive FIR Filter Pre-emphasis for High Speed Serial Links,” Proceedings: IEEE Africon 2009, 23-26 Sept. 2009, Nairobi, Kenya.

• 1 local conference article– M.E. Goosen and S. Sinha, “Adaptive FIR filter pre-emphasis for high speed serial links,” Proc.

of the South African conf. on semi and superconductor technology (SACSST), Stellenbosch, pp. 37-42, 8-9 April 2009.

• International Journal paper submission

25


Feedback/questions

Marius Goosen

Carl & Emily Fuchs Institute for Microelectronics

Dept. Electrical, Electronic & Computer Engineering

University of Pretoria

Pretoria 0002

Tel: +27-(12)-420-2177

E-mail: [email protected]

26

Acknowledgement

The authors would like to thank ARMSCOR, the Armaments Corporation of South Africa Ltd, (Act 51 of 2003) for sponsoring this study.

Documents

Reducing jitter utilising adaptive pre-emphasis FIR filter for high speed serial links Marius Goosen Supervisor: Prof. Saurabh Sinha Microelectronics &