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Paul CoxApplication Engineer – MathWorksPaul.cox@mathworks.fr

Multi-target Code Generationto Optimized Hardware Resources

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Agenda

Multi-target Code Generation

– Overview

– Capabilities

– Workflows

– Standards

– Summary

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ChallengeDevelop and deliver an automotive transmission

management system in six weeks

SolutionUse Model-Based Design to model, implement, test, and

deploy the management system on a PLC

Results Development time cut by 40%

Specification and implementation errors eliminated

PLC design reused on a microprocessor

An Iveco heavy-duty vehicle.

Iveco Develops a Shift Range Inhibitor System

for Mechanical 9- and 16-Speed Transmissions

in Six Weeks

“Our system engineers work directly with

our software engineers on the Simulink

model. This speeds development because

there is no misinterpretation of requirements.

When we’re confident that the model is right,

we save even more time by generating code

from it, with no implementation errors.”

Demetrio Cortese

Iveco

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Model-Based Design for C, HDL, or PLC

FLIR Systems, USA and Sweden

Thermal Imaging FPGA

Honeywell Aerospace, USA

Certified Flight Control

Processor

Philips Healthcare, Netherlands

RF Power FPGA

Baker Hughes, Germany

Oil and Gas Drill Processor

Alstom Grid, UK

HDVC Power DSP

Festo AG, Germany

Robotic PLC

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Model-Based Co-Design for C and HDL

Systems

Software Hardware

Motor Control

Doppler

Radar

FIL

HIL

PILPIL: Processor-in-loop

FIL: FPGA-in-loop

HIL: Hardware-in-loop

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Systems

Software Hardware

Model-Based Co-Design for C and HDL

Analog HardwareFIL

HIL

PIL

“Instead of waiting up to two years for an ASIC

implementation, we can produce an A-sample that

incorporates about 80% of the final product’s

functionality in a few months. The A-sample enables

us to work with the customer early in development to

refine the sensor’s functionality and evaluate the

code size, partitioning of modules, and

hardware requirements.

Martin Hein

Hella

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What Kind of Insights Do We Want to Get?

Model-Based Design Explained

How do I size the motors?

Can I get desired performance?

Does my system work if component

values change?

Multi-target Production Code Generation

How do I size the processing hardware?

Can I get desired execution speed?

Does the system work if component

cores change (e.g., PLC to DSP)?

“After implementing the PLC version with Simulink PLC Coder, we

reused the model, with few modifications, and generated the

microprocessor code using Embedded Coder. We switched from a

structured text implementation to C, just by changing the code

generation product we used.”

Demetrio Cortese

Iveco

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Agenda

Multi-target Production Code Generation

– Overview

– Capabilities

– Workflows

– Standards

– Summary

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Modeling for code generation: Three methods

Simulink

Simulink

Stateflow MATLAB

Function Block

Block Oriented For Systems Design

Textual for Concise Numerics

State Machines for Event-based Logic

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Code Generation: Five languages

Model

Code

• C

• C++

• VHDL

• Verilog

• Structured

Text

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Hardware Support: Any device

All coders with MATLAB or

Simulink generate portable code

so support any device for

algorithm code generation

Coder support packages with

Simulink offer device-specific

system executable generation

– ARM … C2000 … Zynq … STM32

Hardware vendors offer their own

support packages

– Freescale, Infineon, Microchip,

Renesas, TI, STMicroelectronics, ...

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C/C++ Coders

MATLAB Coder - Code from MATLAB

– Portable code for numerical algorithms

– Desktop applications (standalone, library)

Simulink Coder - Code from Simulink

– Rapid prototyping and HIL test

– Real-time machines (Simulink Real-Time)

Embedded Coder – Production optimized code

– Embedded prototyping and production

– MCU and DSP (fixed and float)

– SIL and PIL test

– Certification and standards

C/C++

Ge

ne

rate

MATLAB and SimulinkAlgorithm and System

Design

Ve

rify

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HDL Coder

HDL Coder

VHDL and Verilog

ASIC and FPGA

Xilinx and Altera

– Zynq and SoC

HDL Verifier

HDL co-simulation

– ModelSim/QuestaSim, Incisive

FPGA in-the-loop (FIL)

– Xilinx, Altera

SystemC TLM generation

SystemVerilog DPI component generation

MCU DSP FPGA ASIC

C/C++ VHDL/Verilog

Ge

ne

rate

MATLAB and SimulinkAlgorithm and System Design

Ve

rify

Ge

ne

rate

Ve

rify

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PLC Coder

Simulink PLC Coder

Structured text

PLC and PAC

Target-independent

- IEC 61131

Target-specific

– Rockwell

– Siemens

– B&R

– …

MCU DSP FPGA ASIC

C/C++ VHDL / Verilog

Ge

ne

rate

Simulink and StateflowAlgorithm and System Design

Ve

rify

Ge

ne

rate

Ve

rify

PLC PAC

Stuctured Text

Ge

ne

rate

Ve

rify

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Agenda

Multi-target Production Code Generation

– Overview

– Capabilities

– Workflows

– Standards

– Summary

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Embedded System Development Process with Model-Based Design

System Requirements

System Design

Software Design

Coding

Software

Integration

Hardware/Software

Integration

System Integration

and Calibration

Sim

RP

OTRP SIL

PIL

HIL

Sim: Simulation

RP: Rapid Prototyping

OTRP: On-Target Rapid Prototyping

PCG: Production Code Generation

PCG

SIL: Software-in-the-Loop Testing

PIL: Processor-in-the-Loop Testing

HIL: Hardware-in-the-Loop Testing

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Simulation

Model-Based Design Explained

How do I size the motors?

Does my system work if component values change?

What if …

Algorithm Process

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Prototyping

Does algorithm

perform well on

actual device

with true

latencies?

Harness

Code

Algorithm Process

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Algorithm

Production Code Generation

Is the code

optimized?

Code

Process

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Algorithm

Non-Real-Time

Synchronizati

on at Each Time Step

Component Testing and ProfilingAlgorithm verification via SIL, PIL, FIL

Does code

behave like

model and

optimize

resources?

Process

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410,7

185,5

16,8 14,1

Run Format: [ANSI or Ne10], [gcc no opt or gcc -02], ARM 1Ghz Cortex A8

Embedded Coder -

ANSI-C

Embedded Coder -

NEON Optimized

Exe

cu

tio

n T

ime

GCC –O0 GCC -O2 GCC –O0 GCC -O2

Results for ARM Cortex-A

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Agenda

Multi-target Production Code Generation

– Overview

– Capabilities

– Workflows

– Standards

– Summary

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Coding Standards

MISRA-C STARC HDL

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>>certkitiec

IEC/ISO Certification Kit

>>qualkitdo

DO Qualification Kit

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Model-Based Design – Certification Examples

TRW Germany

Electronic parking brake control system

Honeywell Aerospace USA

Flight Control Systems

Weinmann Medical Germany

Transport ventilator

Alstom France

Train Control Systems

Alstom Grid UK

HDVC Power Systems

DO-178 (Level A)

EN 50128IEC 62304 IEC 61508

ISO 26262

Airbus Helicopters

Certified flight software

ARP4754 & DO-178

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Model-Based Design – ROI Examples

TRW Germany

Electronic parking brake control system

Honeywell Aerospace USA

Flight Control Systems

Weinmann Medical Germany

Transport ventilator

Alstom France

Train Control Systems

Alstom Grid UK

HDVC Power Systems

Design time cut by 60%

Development time

cut by 50%

Development

accelerated by 50% Systems implemented in one week

Test case development time

reduced from days to hours

Airbus Helicopters

Certified flight software

Software testing time

cut by two-thirds

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Agenda

Multi-target Production Code Generation

– Overview

– Capabilities

– Workflows

– Standards

– Summary

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Multi-Target Production Code Generation Summary

Code generation is expanding rapidly including projects using C, VHDL, & ST

– DSP for Audio and Communications

– FPGAs for SDR and Image

– PLCs for Robotics and Industrial Control

– HW/SW Co-design for Vision and ADAS

Code generation offers many benefits, beyond code

– Rapid prototyping and real-time testing

– Certification and standards support

– and…

Optimizing Hardware Resources

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Q&A session