AD-AIO 97 MASSACHUTTS INST OF TECH LEXINGTON LINCOLN LAD P/S 9/5LARSE-SIGNAI. CHARACTEOIZATIOM, AMPLIFIER DESIGN, AND PERFORIANC-EC(ui0CC &I C 0 KNOLUN P195281S0-C-OoS2

UNCLASS IE TR-US6ESO-TR- 1-9 L

END

ESD-TR41-26

Technical Report 586

'-

C.D. Berglund

Large-Signal Characterization,Amplifier Design, and Performance ... .-

of K-Band GaAs MESFETSA

11 December 1981

Prepared for the Department of the Air Force

under Electronic Systems Division Contract F19628-80-C-0002 by

Lincoln LaboratoryMASSACHUSETTS INSTITUTE OF TECHNOLOGY

a LEXINGTON, MASSACHUSETTS

(3

Approved for public release; distribution unlimited.

. .! + -

.. ,.'.

7-

The work epoed in this document was peuformed at LIncoln Laboratory, a centerfor enarch operated by Masachusetts Institue of Technology, with the support ofde Deprme of the Air Force under Coutract F196304.C4 .

This repo may be reproduced to sat iy needs of US. Government agencies.

The views and conclusions contained in this document ae those of the contractor andduould not be interpreted as necessarily representing the official policies, eitherexpreed or implied, of the United States Government.

The Public Affairs Office has reviewed this report, and it isreleasable to the National Technical Information Service,where it will be available to the general public, includingforeign nationals.

This technical report has been reviewed and is approved for publication.

FOR THE COMMANDER

Raymond L Loiselle, Lt.Col., USAFChief, ESD Lincoln Laboratory Project Office

"LV

Non-Lincoln Recipients

PLEASE DO NOT RETURNPermission is given to destroy this documentwhen it is no longer needed.

.

MASSACHUSETTS INSTITUTE OF TECHNOLOG\v

LINCOLN LABORATORY

LARGE-SIGNAL CHARACTERIZATION, AMPLIFIER DESIGN,AND PERFORMANCE OF K-BAND GaAs MESFETS

C.D. BERGLUND

Group 63

TECHNICAL REPORT 586

11 DECEMBER 1981

Approved for public release; distribution unlimited.

*1I 1\ ! INGION MASSACHUSETTS

ABSTRACT

Recent advances in Gallium Arsenide field-effect transistor technology

have extended the power amplification capabilities of FETs to the K-Band fre-

quency range. FETs with performance capability of 0.5 watt power output at

20 GHz have been developed.. Large-signal S-parameter characterizations of

these devices have been utilized in designing power amplifiers. Transistor

performance capability is discussed together with the performance of experi-

mental amplifier designs realized in a microstrip environment.

L/

I , • i

ti

S . ,.4

CONTENTS

Page

Abstract iii

I. INTRODUCTION 1

II. TRANSISTOR DEVELOPMENT 2

III. DEVICE CHARACTERIZATION AND CIRCUIT DESIGN PROCEDURE 6

IV. FET PERFORMANCE 35

V. AMPLIFIER DESIGN AND PERFORMANCE 39

VI. CONTINUING DEVELOPMENT 54

VII. CONCLUSION 58

APPENDIX A 59

APPENDIX B 60

Acknowledgements 61

* References 62

.1

T .

I

V;

A° __ _ __

I. INTRODUCTION

A program to develop K-Band field effect transistors for use in power

amplifier stages of an EHF satellite downlink transmitter has proeuced FETs

with 0.5 watt power output capability at 20 GHz. Successful utilization of

these FETs in power amplifiers is greatly enhanced by large signal characteri-

zations of the transistor. Consequently, techniques for characterizing K-Band

FETs and designing amplifier circuits have been developed (in parallel with

device development). This report describes a procedure for obtaining a large-

signal S-parameter description of the transistor including "The Two Signal

Method Of Measuring S-Parameters". An appropriate error-correction model is

implemented via computer-aided measurement and modeling to further improve the

accuracy of these characterizations. Amplifier design procedure is discussed

ia conjunction with transistor characterizations for amplifiers realized in a

microstrip environment. The performance of these FETs in the microstrip en-

vironment and in complete amplifier stages is reported.

L .n

Ii7t1

II. TRANSISTOR DEVELOPMENT

A K-Band field-effect transistor development program was awarded to

Microwave Semiconductor Corporation of Somerset, New Jersey in July 1979.

The goals of this program were as listed below.

TABLE I

PERFORMANCE SPECIFICATIONS FOR K-BAND 0.5 W FET

Performance At 21 GHz Goal Minimum

Power Output 1.0 watt 0.5 watt

Power Added Efficiency 20% 15%

Gain 5.0 dB 4.0 dB

Junction Temperature Rise

Corresponding To Above Performance < 1000 C

Deliverables 50 Transistors

Estimated Program Duration 9 Months

MSC's approach to meeting these requirements consisted essentially of

modifying an existing product, the MSC 88200 series Ku-Band transistor, to2extend its frequency of operation to 21 GHz . The Gallium Arsenide MESFET

which resulted from this modification is shown in Fig. 1A and lB. It employs

a flip-chip configuration, self-aligned gates, and uses plated sources to make3

ground connections . Sixteen gates with lengths of either 1.0 pm or 0.7 pm

provide a total gate width of 1200 pm. The transistor chip is mounted on a

metal base (chip-carrier) which includes alumina standoffs and leads to provide

ease of installation in circuitry. These devices typically exhibit a pinchoff

of z 7 volts, saturation current of : 350 mA, and very low thermal resistance

(< 15*C/W as measured by IR radiometric microscope) which makes them an excel-

lent candidate for high-reliability applications.

MSC met requirements in contract deliverables with nominal FET perfor-

mance in the vicinity of the specifications . FET performance is discussed in

2

Fig.~ ~ .A K-an 0. W Ga. . EFE pak.ge

3

Fig. IB. K-band 0.5 W GaAs NESFET chip.

4

L=7-

more detail later in this report. In addition, MSC has provided additional

K-Band FETs for purchase in a quantity similar to that of the contract

requirements. In conjunction with FET development, techniques for characterizing

transistors and designing amplifier circuitry have been developed at Lincoln

Laboratory. The development effort employing microstrip circuitry is reported

5here; alternative techniques are reported elsewhere.

i

III. DEVICE CHARACTERIZATION AND CIRCUIT DESIGN PROCEDURE

S-parameter characterization of the field-effect transistors is accomplished

with computer controlled network analyzer instrumentation. Complete two-port

error-correction capability of mea3ured data is provided by appropriate software

and measurement standards. The twelve-element error model which is utilized is

shown in Figs. 2A and B together with the appropriate defining equations. It

is essentially that described by Staecker, modified here to include leakage

6terms, and is similar to that reported by Rehnmark . Equations (1) through (16)

relate error parameters to the complex wave variables and power-flow variables

for the complete two-port error model. Error parameters E00 ElI , and EOI EIO

(or E3 3, E22 , and E2 3 E3 2 ) are obtained from a minimum of three reflection mea-

surements using a reference and offset shorts (S21 = S12 = 0). Transmission

measurement with S21 = S12 = 0 yields parameters E30 and E03 ; E44 and E32 (or

E55 and E 0) are determined from measurement of a through connection

($21 = S12 11 and S 1 $22 = 0). The reflected and transmitted signals

(XIR' XT, X 2R' X2T) for the device under test are then measured with respect

to the reference signal, and equations (13) through (16) are solved to obtain

the scattering parameters of the device under test.

Microstrip measurement standards and test-holders were designed to permit

calibration of the measurement system at the transistor terminals. The micro-

strip transmission medium was selected for use because of its physical compati-

bility with the FET "package". The microstrip environment is well-suited for

amplifier applications with its inherent small size, light weight, and ease of

production. Transistor characterizations in the microstrip holder provide

criteria for microstrip-amplifier design which avoid parasitics at the circuit-

transistor interface which may be introduced by test holders designed in other

mediums. The test-holder provides a 50-ohm environment in which to measure the

transistor S-parameters (Fig. 3). The FET is held in place by a mechanical fix-

ture which provides the flexibility of easy FET removal for testing in other

circuitry. The mechanical fixture (see Fig. 21) permits pressure to be applied

by an adjustable screw to an insulating bushing which presses the FET leads

6I I.

E30

I E A 1 S21 A 2 E2 20-4 0-0 0-i 1- -E0El Sllj S22 E4 4 X1 T

I RA1 4 S12 A3

(1 ) Al = E10 + Ell A4(2) A3 zE 4 4 A2(3) XI R E0 0 + E0 , A4

(4) XI E32 A 2 + E3 0

(5) A4 ~ S1 A +S 12 A3

Fig. 2A. Two-port error model.

7

11 - ---I - -- -. -

E22 SE 33

XT 2B1 E 2 3

E0 3

AE Bi - A3 8E(8) 8 E5 5 B (14) $11 - A1 82 A2 83(9) B E5 B 2 4 2A 1 2 A2 3

(10) B Eo1 82+ EO (13) s A2 1- A3 84

(11) B3 : E1B 3 + S 2 B1 A8. -AaA1 84 -A 2 83(1) B4 $21 B3 + S2 2 B1 (16) S22 - A1 81 _ A3 83

Fig. 2B. Two-port error model (continued).

I8

Fig. 3. Microstrip ts itr 5-h)

(Fig. IA) firmly on the microstrip circuit, and Independently secures the base

of the transistor to the circuit housing to provide both good electrical con-

tact and a good thermal path.

The reflection measurement standards are comprised of 50-ohm microstrip

transmission lines of various lengths (Fig. 4), each of which is terminated

in a short circuit. The transmission component consists of a 50-ohm micro-

strip throughline. The design criteria selected to establish accurate cali-

bration with offset shorts constrains the difference in electrical length

between the reference short and associated offset shorts to 90* < AO < 1800

from which the applicable frequency range is defined for a given set of short

circuits. The length of the reference short is identical to that of the input

and output 50 ohm circuits in the test holder. For calibration over multi-

octave bandwidths, the large number of offset shorts required may introduce

biases in the estimates of the error parameters 7 when all are used simultaneously.

For narrower bands of an octave or less the biasing effects are eliminated by

using just three offset shorts, the minimum number required to solve for the

error parameters. This combination of measurement standards and testholder

allows testholder contributions to the measurement to be accounted for in the

error-correction model.

Both the measurement standards and test-holders utilize .010 inch thick

fused-silica substrates solder-mounted on invar carriers. A metallization of

311 gold over IOOA of chrome is applied to the polished substrate. Special

coaxial to microstrip launchers (Fig. 5) were designed for this application

since commercially available launchers are not compatible with this circuit

implementation. The performance of two of these launchers mounted on a half-

ii'nch 50-ohm transmission line on a fused silica substrate is shown in Fig. 6.

The loss per launcher is determined to be approximately 0.5 dB over the fre-

quencv range of interest when the measurement is corrected for substrate loss.

Small signal S-parameter measurements of the transistor installed in the

50-ohm test-circuit are made over the frequency range of 2 - 22 GHz. Typical

measurements shown in Fig. 7 are used to calculate other performance parametersP

10

44C-

Fig. 4. Microstrip calibration standards: short circuited microstrip lines.

D I E L E T RII AI RL A U N C H E R "W E D G E "

AIR DICLOCTRICOR MICROSTRIPCRCT

OSM 2751-1201-00 TRANS ITI ONCONNECTOR

Fig. 5. Coaxial/microstrip launcher.

a,9 -

w* U)

19 20 21 22

FREQUENCY (GHz)

Fig. 6. Coaxial/microstrip launcher performance.

13

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of interest, including maximum available gain (MAG), maximum stable gain (MSG),

and Rollet's Stability factor (K) (see Appendix B). The transducer gain, maxi-

mum available gain, and maximum stable gain calculated from the small signal

S-parameter measurements of the 0.5 W GaAs MESFET are plotted in Fig. 8 for

the frequency range of 2-22 GHz and listed in Table II. The S-parameter mea-

surements made in the 50-ohm microstrip test-fixture in conjunction with the

microstrip calibration standards provide characterization at the "packaged

transistor" terminals; consequently, the calculated performance parameters

are those of the "packaged transistor" only. The reference plane for

S-parameters associated with the FET established by the reference microstrip

short results in typical lead lengths of two to three thousandths of an inch

included in the "packaged transistor", corresponding to the physical distance

between the circuit and the transistor required to accommodate the dimensional

tolerances associated with these components. Considerable scatter is noted in

the calculated gains shown in Fig. 8. This scatter is thought to be primarily

the result of parasitics associated with the FET packaging configuration,

since similar characterizations of "unpackaged" transistor chips have shown

much less scatter. Nevertheless, the visible trend indicates the presence of

positive available gain in the frequency range of interest, in addition to the

frequency-rolloff characteristic of this transistor. The small signal

S-parameters are also used to investigate the stability of the transistor,

particularly at low frequencies where the transistor gain is high.

While the small-signal S-parameters are useful for the design of linear

amplifiers, they are of less usefulness in designing power amplifiers. Power

amplifier design is greatly enhanced by appropriate large signal characteriza-

tions since the transistor typically exhibits non-linear behavior under large-

signal conditions. In addition, the large-signal operating conditions estab-

lished by conventional one signal measurement of S-parameters associated with

the transistor output (i.e., $22 or S1 2) do not correspond to actual amplifier

large-signal operating conditions since the signal conditions at the transistor

input are quite different when the transistor is excited from the output instead

of the input. Consequently, additional techniques are required to obtain a

valid large-signal S-parameter description of the transistor.

15

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2 0 6 12 18 24 30

FREQUENCY (GHz)

Fig. 8. Performance parameters calculated from

small-signal s-parameter measurements of K-band0.5 W FET.

18

A novel measurement technique for characterizing active two-port networks

has been reported by Mazumder and Van Der Puije 9 . This technique is referred

to as the two-signal method of measuring large-signal S-parameters. The

scattering-parameter description of a two-port network is shown in Fig. 9.

The complex wave variables are related to the scattering coefficients by Equa-

tions 20 and 21. These wave variables may be defined in terms of voltages and

currents as given in expressions (22) through (25) 10 . The quantities a 1 and

a2 are the independent variables, corresponding to the waves incident upon pcrt

I and port 2 respectively; b and b 2 are the dependent variables, corresponding

to the wave exiting these ports. The two-signal measurement method requires

excitation of both ports of the network simultaneously at identical frequency.

The notation adopted provides an adequate description for representing this

interaction (i.e., a I and a2 represent the two excitations).

The instrument configuration required to provide this measurement capabi-

lity is shown in -he Fig. 10. The signal from the synthesized signal source is

amplified by a traieling-wave-tube amplifier and split equally to provide the

two excitations required for testing. Each arm of the test configuration in-

cludes a variable attenuator to provide absolute and relative amplitude control

of each signal. Relative phase between the two signals is controlled by the

phase shifter. The couplers provide access to the wave quantities ti be mea-

sured, and circulators permit direct measurement of power while also iiolating

one arm of the test system from the other. A switching network permits selec-

tion of the desired quantities for measurement by the network analyzer. The

test system is controlled with an HP 9845B dcsktop computing system, which to-

gether with appropriate software and measurement standards provides complete

two-port error-correction of measured data as described earlier. Conventional

one-signal automated S-parameter measurements are made by replacing the power

splitter in this configuration by a programmable switch.

It is helpful to consider the interaction between the two signals incident

upon the two ports of the network by examining the equations describing the two-

port S-parameters.

19lL

- &g

_40 1 1

Vi Sll S2 2 V2B S2 B2

(20) 81 S11 A, + S12 A2

(21) B2=S21Al+ S22A2

(23) A2= I (v 2 +Z 0 i2 )

(24) BI 1 v-z

(25) B2: (V2 ZO '2~

Fig. 9. Scattering-parameter description fortwo-port network.

* 20

SYNTHESIZER 1147S

L{~DIVIDER

VARIABLE NETWORKVAA3L

SNIFER UNER TEST

Fig. 10. Test configuration for two-signal measurement.

21

(20) b= S11a1 + S1 2a2

(21) b2 = 21a1 + $22a 2

These equations may be rearranged to obtain four expressions relating ratios

of complex wave variables--that is, reflection and transmission coefficients--

to scattering coefficients (Sij).

(26) bl/a I = SII + Sl2(a2/a I )

(27) b /a2 = Sl1(aI/a2) + S12

(28) b2/a1 = $21 + S22 (a2/aI)

(29) b2/a 2 = S21(al/a 2 ) + $22

These ratios are the quantities which are measured, and since the independent

variables are known (a1 and a2 are set to the desired large signal amplitudes),

the S-parameters can be determined by allowing (a2/aI) to vary through 3600.

Furthermore, if 1all = Ja2 1 = constant, the extraction of S-parameter data issimplified.

The interaction between the two signals can be illustrated graphically as

shown in Fig. ii. Each of the ratios of complex wave variables is plotted in

its respective complex plane. The circular loci shown for each of the complex

ratios are generated by allowing I a2/a1 to vary through 3600. From equations

(26) through (29), each of these loci may be resolved into its respective

components. For example, the b 2/a2 ratio is resolved into S22 and S2 1 (a2/aI).

It should be noted that the large-signal S-parameters determined in this

fashion are valid only at the signal levels under which the measurement is

made; measurement at other signal conditions may yield a different set of

S-parameters. To distinguish between conventional S-parameters and the large-

signal parameters obtained by injection of two signals, a designation of11

P-parameters is assigned to the latter

A unique set of P-parameters is then determined for discrete power levels.

Characterization of the transistor is then accomplished at a power level cor-

responding to that desired in a particular amplifier design.

22

I M(61 /A) I M(B1 /A 2)

Sl2( A2/A1 )

S2

________ ___( 12_ RE(B 2 /A 2 )

~21RE (B2 /A,)

S2 2(A2/A) [Iia2w

Fig. 11. Reflection/transmission coefficients generated bytwo-signal measurements.

23

7 .

Extraction of the P-parameter information is illustrated in Fig. 12.

Coordinates (h,k) are assigned to C1 , the center of the locus; (XI, Y 1) is

assigned to P1 (the first measured b2/a 2 ratio in this example), and so on

to (Xn, Yn) for PN' For a circular locus an equation for the radius of the

circle at P1 can be written; in similar fashion an equation for the radius at

each PN can be written, yielding equation set (31).

(X - H)2 + (YI -K) = R 2'

(31) (X2 -H)2 + (Y2 -K)

2 -R 2

(XN - H)2 + (YN K )2 R 2

Expanding the terms in parentheses and rearranging yields equation set (32).

(H2 + K2 _ R2) + 2Xl1H + 2Y1K = X12 + Y12"

(32) -(H2 + K 2 - R) +

2X 2 H + 2Y 2K =

x 22 + Y 2

2

-(H 2 + K2 _ R2) + 2XNH +

2 YNK = XN2 + YN2

These equations are solved using the matrix notation of equation (33) from

which the desired P-parameter information is obtained.

2X1 2Y1 -i H X12 + Y12

2 2(33) 2X2 2Y2 -1 K X2 + Y2

2XN 2Y N -1 H 2+ X RI XYN 2 YN2

24

e. * .

IM( 82 /A2 ) p T' 112500--Nl

IRE(8 2 /A 2)

FOR I1A21 I1A, I CONSTANT, C -C (H,K)A p1 P1I (XI I y I

B2 /A 2 =S 2 1 - + S2 2 2 P 2 ( X2 1Y2 )(29) 2 30

M S2 1 + S22 0X

PN- PN(XN

Fig. 12. Notation for extraction of p-parameter information.

25

Let [A] 2X 2Y -1 [X] 'H

2X2 2Y2 -I K

2XN 2Y N -1 H2 + K - R2

[B] = 12 + Y12

X22 + Y22

2 + yN2

(34) [A] [XI = [B]

(35) [XI = ((ATI (A]) -1 (AT, (B]

(36) IP22 2

(37) 1 P22 = TAN-1 (K/H)

(38) IP21 I (H2 + K 2 ) - (H2 + K2 - R 2 ) - R

Other P-parameters are determined in a similar fashion to that described above.

* ,The two-signal measurement technique is ncOvel in the sense that no tuners are

* !required to obtain a large-signal description of the transistor. Fixed tuned

circuits are used which enhances the repeatability and accuracy of measurements.

The two-signal implementation can also provide additional measurement

flexibility. It can function essentially as an electronic tuner since both

amplitude and relative phase control of the signal injected at the output

port are provided by this configuration. As such it is a lossless tuner.

It is also capable of establishing output reflection-coefficients greater

* 26

than unity provided additional signal power is still available when the input

port of the network under test is driven at the desired signal level.

The procedure for obtaining a large-signal description of the transistor

is summarized in Fig. 13. The transistor is first inserted in a test circuit

which provides a 50-ohm environment at its input and output ports. A conven-

tional one-signal measurement is made at the transistor input port at the de-

sired signal level. The "large-signal SI which is determined in this fashion

is used to determine the actual power input to the transistor; the power input

is then readjusted to correct for the input mismatch. This procedure is iterated

until the actual power input to the transistor is sufficiently close to the

desired level.tl

The "large-signal S1 corresponding to the desired power input level

thus obtained is used to design an input matching network (IMN). This network

provides an input termination which closely approximates that needed for actual

amplifier operation at the signal level which was selected. This matching net-

work is installed in the test-holder (replacing the 50 input circuit), and the

two-signal measurement technique is used to measure P as a function of fre-

quency and to ensure properly matched conditions at the transistor input port.

The two-signal measurement method is then made at the transistor output port to

obtain P22 from which the output matching network (OMN) is designed. The out-

put matching network designed on this basis (conjugate match for P 22) provides

maximum gain at the signal level at which the transistor was characterized.

['his procedure or any part of it is iterated as necessary, depending on the

performance achieved.

Typical large-signal characterizations of the .5 watt K-Band GaAs MESFE's

developed in this program are shown in Figs. 14 and 15. Conventional one-

signal measurements of the transistor installed in the 50-ohm holder described

previously show that most of the power incident on the transistor is reflected.

Figure 14 illustrates the result of a two-signal measurement made at largv-

;ignat conditions to determine the input impedance match far a FET with a

irtial-matching network installed In the input port of the FET test-circuit.

27

V ,

5-50 ZL - 5

I CONVENTIONAL ONE-SIGNAL S-PARAMETER MEASUREMENT

* MEASURE S1 UNDER LARGE-SIGNAL CONDITIONS

e ITERATE TO ESTABLISH DESIRED INPUT LEVEL

e DESIGN MATCHING NETWORK (IMN) FOR FET INPUT

7s=50 n Zs=5Oa

U TWO-SIGNAL S-PARAMETER MEASUREMENT

I INSTALL IMN AND MEASURE SIITO DETERMINE INPUT MATCH

* MEASURE S.2 UNDER LARGE-SIGNAL CONDITIONS

* DESIGN OUTPUT MATCHING NETWORK [112488SI

Fig. 13. Large-signal FET characterization and circuit designprocedure.

28

FREQUENCY MAG P11 ARG P11 MAG P12 REVERSE GAIN INPUT RETURN LOSS(MHz) (deg) (dB) (dB)20000 .81 149.42 .203 -13.85 -1.8220100 .73 151.06 .216 -13.30 -2.6820200 .78 154.04 .211 -13.53 -2,1720300 .74 154.95 .217 -13.29 -2.6120400 .72 157.76 .243 -12.29 -2.8620500 .72 161.44 .254 -11.90 -2.8120600 .71 163.26 .258 -11.77 -2.9820700 .59 162.60 .235 -12.57 -4.5720800 .57 163.99 .257 -11.79 -4.8620900 .58 168.90 .287 -10.83 -4.7021000 .52 174.94 .327 -9.71 75.62

A2/A1=1

1800 0.

-

Fig. 14. P-parameter measurements: K-band 0.5 W FET, P(partial input matching network installed).

29

r-- - -

This network is seen to provide an impedance match which improves as frequency

increases; the best match, P11 = .52/174.9%, occurs at 21 GHz, corresponding

to an actual power input to the transistor of 22.6 dBmW for the measurement

conditions (generator power = +24 dBmW). Figure 15A shows the measured P22

data corresponding to the P1 data of Fig. 14; typical power reflections of

60% are obtained over the frequency band of 20 to 21 GHz. This information

provides the basis for the design of the transistor output matching network.

Typical measurements are plotted in Fig. 15B for transistors fabricated from

three different wafers. The spread in the data may be attributed to dis-

similarities in these transistors and to measurement uncertainties.

A number of factors contribute to the difficulty in obtaining accurate

characterizations of K-Band FETs. The physical size of test-circuits and mea-

surement standards was initially scaled to cotrespond to transistor dimensions.

Fused-silica substrates of .010" thickness were selected to provide 50-ohm

microstrip lines whose line width coincided closely with that of the transistor

leads utilized by the MSC "small chip-carrier" which was used on initial devices

produced in this development program. Consequently, the transistor leads did

not contribute significantly to the measurement. However, in order to provide

a better input match into the transistor and improve the mechanical characteris-

tics of the partial-packaging configuration, the manufacturer later selected a

"large chip-carrier" configuration which utilizes larger standoffs and wider

transistor leads. Subsequent characterizations of transistors showed some

dependance on transistor lead dimensions since the lead width exceeds the

*width of the 50-ohm microstrip lines. These effects must be considered to

accurately determine FET S-parameters.

An additional factor contributing to measurement uncertainty is that of

physical dissimilarites between components used in the calibration of the test

system and those associated with test holders. Measurements of calibration

standards similar to those used in calibration (but not identical) indicate

a typical measurement accuracy of + 10% in magnitude and + 7* in phase over

thv 18-22 GHz frequency band for reflection and transmission components with

30

FREQUENCY MAG P22 ARG P22 MAG P21 FORWARD GAIN OUTPUT RETURN LOSS(MHz) (deg) (dB) (dB)20000 .79 124.83 .612 -4.27 -2.0620100 .78 123.24 .667 -3.52 -2.1820200 .84 128.07 .732 -2.71 -1.5220300 .87 129.64 .728 -2.76 -1.2620400 .84 129.79 .724 -2.80 -1.5520500 .76 131.62 .698 -3.13 -2.3920600 .76 128.49 .691 -3.21 -2.3820700 .76 122.83 .737 -2.66 -2.4420800 .73 120.37 .777 -2.19 -2.7820900 .76 120.61 .849 -1.42 -2.3321000 .71 117.09 .885 -1.06 -3.00

A2/Al=1

160. 0.

Fig. 15A. P-parameter measurements: K-band 0.5 W FET, P(50-ohm network installed). 22

31

[ll5OiJ IMPEDANCE COORDINATES - 50-OHM CHARACTERISTIC IMPEDANCE

* WAFER 21200CC0 WAFER 2057AN

Fig. 15B. P measurement comparison.22

32

unity coefficients (ignoring line losses) in the microstrip medium. The ef-

fects of such an error is shown in Fig. 16 for both a measurement of a stan-

dard with unity reflection-coefficient and a typical P22 measurement. For

such inaccuracies, design iterations spanning the uncertainty in characteri-

zations are required to achieve desired performance.

33

I

105 910 75 1104R

:x -1.0

1 m -0 049

-165 -0.8

-0

-105- -0.0

(1 ESUEET NETANYFO UIT ELETO

\ 34

IV. FET PERFORMANCE

On the basis of the large-signal characterizations described previously,

matching networks were designed in a microstrip environment to evaluate tran-

sistor capability. These designs have been iterated as necessary to accommodate

both the uncertainties associated with transistor characterizations and the

range of devices under consideration. Transistors selected from four wafers

have been tested; some results are listed in Table III for a test frequency of

19 GHz where the best performance was achieved with initial circuit designs.

These results include the losses introduced by the matching networks. While

there is considerable variance in this data sample, the mean values which are

indicated (z .5 watt power output, 3.6 dB gain, and 32% power-added efficiency)

are representative of transistor performance capability. These test results

correspond to matched transistor configurations exhibiting 3 dB bandwidths of

typically 300 to 500 MHz. Figure 17 plots typical 19 GHz FET performance which

also includes losses of microstrip matching networks. The matching network con-

figuration used in this circuitry is modeled in Fig. 18. These networks are

comprised of distributed-element microstrip transmission lines only. Several

additional configurations employing fewer matching sections have been investi-

gated with no significant performance advantages realized. The matching net-

works include a single section of transmission line of appropriate characteristic

impedance and length 1 2 to map the transistor large-signal input or output

impedance to a real impedance; this impedance is then matched to 50-ohms

using two cascaded quarter-wavelength transformers.

35

TABLE III

FET PERFORMANCE SUMMARY

WAFER/SN FREQUENCY POWER OUTPUT GAIN POWER ADDED EFFICIENCY

#GHz dBmW dB%

20911CE-3 18.87 26.6 3.1 20.5

20911CE-6 18.87 25.8 1.3 10.7

20857AF-4 18.87 26.5 4.5 30.6

20857AH-2 18.87 26.8 3.8 29.2

10404BD-3 18.87 27.9 3.4 30.0

10404BD-5 18.87 26.1 3.6 38.6

10404BD-7 18.87 27.7 3.6 41.4

21200CC-i 18.8 28.6 4.6 40.4

21200CC-9 18.8 24.3 3.7 22.6

21200CC-2 18.87 29.5 4.6 49.7

Mean 27.21 3.62 31.9

Standard Deviation 1.24 0.92 10.7

36

30 -40

W 24 30-

10

W 00

POE ;?PU 18-mWA

Fig 17.CINC 19G F20efomne

M3

L3 z IN 3 z0 zOfF T 9 05z

z2

(1O+S11) 2=0

ZINz ZIS1

Zol = ZN 2 = 93

RE f{Zinz IM Z."

I zini

Fig. 18. Circuit model for FET impedance matching networks and design

approximations.

38

MO- NI- q6

V. AMPLIFIER DESIGN AND PERFORMANCE

A complete experimental amplifier stage requires a means of biasing both

the gate and the drain of the field-effect transistor. Bias blocking and in-

sertion networks were designed which utilize coupled microstrip lines in con-

junction with a T-junction high-impedance feedline interconnected to a

commercially-available feedthru filter by a conductor loaded with a single

ferrite bead (Fig. 19A). The performance of these bias networks is shown in

Fig. 19B; typical loss of z 1.0 dB was achieved in the frequency band of 20-21

GHz. This performance includes the loss of two coaxial to microstrip launchers

which contribute most of the loss. A circuit model for the bias network is

shown in Fig. 20.

To complete the experimental amplifier design, the bias networks were

fabricated on the same fused-silica substrates (.5" x .5" x .010") with the

input or output matching networks for the transistor (see Fig. 21). Impedance-

compensation networks were included as necessary to accommodate the interface

of matching networks, bias networks, and coaxial to microstrip launchers. All

of these networks utilize distributed element microstrip transmission lines

only.

The performance of several complete experimental amplifier stages is sum-

marized in Table IV. Devices from wafer #21200 CC consistently performed

better than devices from the other three wafers which were evaluated in this

circuit design. For the best wafer, average performance of 0.4 watt power

output at 3.0 dB gain and z 15% power-added efficiency was achieved at 20 GHz.

Best performance results include 0.5 watt power output at 16.4% power-added

efficiency. Typical amplifier performance is plotted in Fig. 22 as a function

of power input. Maximum power-added efficiency for this amplifier occurs at

2 dB compression from typical linear gain of 5.0 dB.

The power-bandwidth responses of Fig. 23 show the 1 dB bandwidth of this

amplifier to be in excess of 1 GHz at typical operating input power levels

(+22 to +24 dBmW) with midband gain of z 3.0 dB. Some bandwidth shrinkage is

noted for large decreases in power input (> 10 dB reduction).

39

* W ,....'-

fL2463-S1

Fig. 19A. microstrip bias network.

40

- 56

D Lw

) . .

0

0o 0zwt 0

LL L

z1

414

MIA)

Z L Z112506-Rj BDC BIAS

Fig. 20 Cirui moe foIisntok

42T

110-oh-

;l24 4-11

~1 £f2

Fig. 21. Experimental inicrostrip anmplifier

43

TABLE IV

MICROSTRIP AMPLIFIER PERFORMANCE SUMMARY

Power-AddedWafer/SN Circuit Frequency Power Output Gain Efficiency 1 dB Bandwidth

# # (GHz) (dBmW) (dB) M% (GHz)

21200CC-i 225/231 20.2 26.5 3.0 14.0 1.2

2120OCC-2 225/231 19.7 26.1 3.0 18.1 1.4

2120OCC-7 225/231 20.0 27.0 3.0 16.4 1.5

2120OCC-8 225/231 20.1 25.0 3.0 13.1 0.8

21200C-FlO 225/231 20.2 25.3 2.8 14.4 0.9

21200C-FI3 225/231 20.1 23.9 1.9 9.6 0.8

10404BD-3 225/231 20.9 24.0 2.0 7.4 0.9

10404BD-7 233/236 21.1 24.1 2.1 10.0 0.8

20857AH-2W 225/231 20.2 25.0 2.0 9.0 1.4

20857AH-23W 225/242 20.7 24.2 2.2 8.4 1.0

4 _____44

m 30 WAFER/SN: #21200CC-1 CIRCUIT: 225/231 -25DATE: 3/16/81 FREQUENCY: 20.185 GHz PDCAT MAX PIN:) - 1.47 W

Em 24 PO - 20 "

- 1 U

' PAPAo 18 --15 o

o w

a. EFFICIENCY

12 - 10 u.uJ0

a.

6 GAN5

_j00 6 12 18 24 30

POWER INPUT (dBmW)

Fig. 22. Microstrip amplifier performance.

45

E C

0 0

z CLI w

W -

c3

oA

V ~ ~ ~ ~ ~ ~ u anCi 0()a -Wcy C CY Y CY CY NCD

ioLA

The large-signal S-parameter measurements for the complete amplifier are

listed in Table V together with calculated performance parameters. These mea-

surements were made using 3.5 mm coaxial standards and correspond to performance

referenced to the input and output of the coaxial connections to the amplifier.

The input return-loss is plotted in Fig. 24A; it exceeds 10 dB in the 1 GHz

band centered at s 20.4 GHz, while the gain calculated from these measurements

approaches 4 dB at a power input of +21 dBmW (Fig. 24B). The amplifier band-

width appears to be limited by the input match. The average group-delay for

the complete amplifier stage also calculated from the large-signal S-parameter

measurements ( $21) for a 1 GHz band centered at 20.5 GHz was determined to

be z .5 nanosecond.

Temperature cycling of the amplifier stage yielded the power output

variations shown in Fig. 25 measured over the frequency band from 19.8 to

21.8 GHz. Typical variations of 1 dB are observed in the power output at

the center of the operating band over the temperature range of -40'C to

+60°C. This variation increased to z 2 dB at the band edges of the 1 GHz

operating band.

Additional packaging requirements were necessary beyond those employed in

the experimental amplifier configuration to completely enclose the amplifier

stage. Evaluation of initial package design indicated the presence of wave-

guide mode propagation and necessitated the reduction in substrate width shown

in Fig. 26 to establish a waveguide beyond cutoff when the cover is installed.

After making the reduction in substrate width, a completely-enclosed amplifier

stage yielded the expected performance and no anomalies were observed.

47

m~~j, _.! .. .. "" ""*-7 -7

TABLE VA

LARGE-SIGNAL S-PARAMETERS AND CALCULATED PERFORMANCE FOR MICROSTRIP AMPLIFIER

Si $ 721 :712 -,'2SrI h . .:; *ri Q I e toa an..rg I e

1 :- r'*I 4 : "' 15.0 07 '0 2. 66 -11371 0181 .44 46 Li 106 .n1 1 1 .91 -65

1 - 1 1 .01 1i5 90 -73I; :5 19 -I .-j I9 ::Z. - 11D 1 .54 -5 7.Ji 91 -901: 4',: -1 54 74 '' 2 t:31- ,. .54 .48 . .-: -1001 ::', , - -24 .43, 43 . 1 * -, -109.... -- . 4, 466

4_ -4 . 0 4 . ' 1 .31.B90O 4 'i 0 ' l 1 : -141I ' C -1 4 --. 1 . :4 -1 54

13 %.4- 1'L 41 *41 r1.>14.2 1 4- 1 r: -71 -5i - ' 12 1

1 4:0 .4'ti -j5 96 -71 56 4 _ jjr.54' -164 1 13 -,1 0.- -64 .tF: 140

1960) .s'A 1 -'9 1 1r -1 5 *4 -74 C-' - 7.41 - I 1 -1 5 -91 67"

1 ?:.:01, 142 1 7'4 -15.3 0 -1 10 .51.25 12- 1 . 174 3 6. 1 .41 -:4

20003 .2) 10'9 1.5r 17fl *7 152 3 12-'i 0l I 1 . 11 1 . 3 15 1 -71 - -

C2 ,7i .ti:r I r1 141 - :-: 14' 45 -'4-i 0 -,, 1 4 : . 7 12 - 4 -12

51 1 4- L4 c11 11 ,51 1457206 1 1 -w 1 .4 4': .17 -'2 =, -07 9

20703 19 -9- 1 40 -4 06 71 57 1742a ' .' - 1 ,, 1j I 5r n50 15520i - 1 1 - 05 41 64 14010 , -1 - '7 1 1: 10 l5 'LI 126

2 1 . 41 -1 4 i 07 .. 74 .5 t;4 1131 I -1 7 1 1 Li 451 . 4 ' 6 106

1 1 . I -74 .04 - : ,2

I LI .rl _ _ , 5 ,11 ._76 11 1l7 -7 45

- .'I 141 -' 1 1 4i1.411 . ~ 1 71 .'1I -15'- .02 107 .nl 19- --. 1 1.... ..- I _, ,U :

46 22401 *r 11 .7 16 8U3 154 4 8

48

A- d

, • - :. -_ -I C_ _:"- --- _7

TABLE VB

LARGE-SIGNAL S-PARAMETERS AND CALCULATED PERFORMANCE FOR MICROSTRIP AMPLIFIER

2-'"2,?,1: W2120000-1

I',H TE =REF PLR-4E= 0.0 RF F(It'- 21.0VG= -1.07 YD= 8.54 II= .244

FRECUENCY RETLO IN FHH'SE GIN PHASE RE',-' GRIN F'HASE RETLO OUT PHASE1:3 0 61 - . 115 - 4:. 70 -8.49 -1:?I-102, 7.06 46 -1.3.94 106 -44. -6 121 .,: -651620) 5. 49 3 -511.6, 101 -39.70 105 .3' -731 :::...'0*), .5.79 ? 14 - 1 0.65c, :E 9 - 39''. 66 9 2 * :k: -6k','

4 -'. ,. -L

5.426 -24 - 5. 43 - 7 Z I - 747'-L 4_ 7C4,-" 1

4 -42 -6.80 15 4. 1 24 -12018-:' 6.L I-. 41 17 - :. '4 -1301:, 1 -34 1 1 1 0 -1 41....... tIc _',, 1 .:0 -1541

1 1. -2.24 - ,.. :-3 - -. 1357 5. 12. -94 -41 1--176

'1 -53 ---:0.49 - 1 17019.4&0 -. 17 -15 -. "9 - 1 -;_. 9"? -4 - - 156

19,1 .- - 4 -' - 5 .4 40 140J. 7 1.32 -L0 429. 4 .1 121

1970. 17 C 142 2 .-5:3. -24.41 4 Ic I?:';2I 14 2 .77 -174 -24. IU -1:? -: 7l.l 34

2nO0Z, _ 1 . ::2 109 ._,01 8 1F7 -2'-:3_.. 501 - 15 2.-,':. : 120 1 11 -I-,: 1. 4.-" 1 4 4 i. 2 Lll20001 1 , w -15 - 17"2010 Ir Li Il41- 1- 1

_: 25. 09 4.11 02 -2 1 4 1419c1 1- 12 -125

- 1 14 24 110 ., 1 -1459L I LI 1 4 4 165

l , i07 J 14. - 4 4 'r 71 4.0 174: 1 11.41 1 5 2 1.I5 4. 4-

2 I'LI 1 1 1 -, . - LI 40 .4 14021LIL --I. : 4 •r110 LIi 1'? 14 ci? 3 - *:4.0 " , 1-': 11U- -1 1 .4 4.A1 7 4 - 1 4 -5 44 0 C

140. 4 . 17 -. -47 .45 7 2,ld 2 1 !. ..0 " 4 . "C: It I '1 . 46 o. q." . --- : - 4 - _- , -

1 'ii 4. 4' 141 -. -0 4 '14 4 .011:: 4. 17 I -. 4 1 - 1 1 4.2:-;

2200J 4.09 117 -1.24 I:: -:0. 41 -154 6.27

49

30 POWER INPUT: 21 dBmW 1157N

24-

co3

18-U)0_j

12-

18,000 18,800 19,600 20,400 21,200 22,000

FREQUENCY (MHz)

Fig. 24A. Input return-loss for microstrip amplifier.

50

5POWER INPUT: 21ldBmW1120]N

0

-- 5-

o-10-

18,000 18,800 19,600 20,400 21,200 22,000

FREQUENCY (MHz)

Fig. 24B. Gain of microstrip amplifier calculated from large-signals-parameter measurements.

15

77 -

144

2 QJ2

OD L

I-z

'4-

~ - S.0 N N n

1-4

.

0 1

Fig. 26. Packaged microstrip amplifier.

53

L ._ _ _ _ _ _ _ _ _ __ _ _ _ _ _ _ _ _ _ _

VI. CONTINUING DEVELOPMENT

A primary goal of this development effort is to produce a multi-stage am-

plifier module meeting specifications for use in a multi-element phased-array

satellite downlink transmitter configuration 13 . In pursuit of that goal, ad-

ditional FET development contracts were granted in October 1980. Microwave

Semiconductor Corporation received both a contract for 1.0 watt FET develop-

ment and for high-gain medium-power (10 dB, 100 mW) transistors. Hughes Air-

craft Company and Dexcel, Incorporated also received contracts for the latter.

All contracts are presently scheduled for completion by October 1981, (see

Appendix A).

At present, the primary emphasis in circuit development centers on cas-

cading amplifier stages. Preliminary tests for two cascaded discrete amplifier

stages have yielded 0.4 watt power output at 7 dB gain, and 10 dB small signal

gain (Fig. 27). Integration of amplifier stages into a compact package is in

progress. The circuit configuration of Fig. 28 easily permits cascading of

stages as the amplifier chain is assembled. Each section includes a half-inch

fused-silica substrate with appropriate biasing and impedance-matching networks.

The proposed multi-stage amplifier configuration will utilize transistors from

the development contracts scheduled for completion in October 1981, in addition

to the 0.5 watt transistors already developed. The four cascaded amplifier

stages shown in Fig. 29 are expected to produce .4 to .6 W of power output with

22 dB of overall gain. The overall power-added efficiency goal for this am-

plifier module is 15%. Four of these modules will be used in conjunction with

the phase shifters shown in the block diagram as part of a phased-array

demonstration.

54

30 50

-24-P 25

0

0 -20

E

zA

M12-a0 GAI0U

10W

0 4.8 9.6 14.4 19.2 24.0

POWER INPUT (dBmW)

Fig. 27. Performance of two discrete cascaded microstrip amplifier stages.

55

Fig. 28. Experimental two-stage microstrip amplifier.

56

i.Mad

BEAMCONTROL

6. " - B4mW 22m 11mW 282mW 562mW O5B 500mW

40mW- + 5.5 dBm + 13.5 dBm +20.5dBrn +24.5dBm +27.SdBm +7~

GHz

Fig. 29. 20 GHz transmitter test-bed.

t 57

VII. CONCLUSION

A K-Band GaAs MESFET development program has produced devices with a typi-

col performance capability of 0.5 watt power output at 3.6 dB gain and 32%

power-added efficiency at z 19.0 GHz. A technique for acquiring large-signal

characterizations of these devices has been developed. Microstrip amplifier

designs have been realized which produce typical performance of 0.4 watt power

output at 3.0 dB gain and 15% power added efficiency at 20 GHz. Additional

lower-power high-gain FETs are presently under development for the first two

stages of multi-stage amplifier modules to be used in a multi-element phased-

array satellite transmitter configuration.

58

.

0 (n u

'400 W Q)4-4 0 Cn -4 00

0

E-40 w0z -4

-43 u3 .

0 0 "al0

-4 0 0)

00 x

10 V

0

u' 004

En Cfl

wz V4 LA

-4)

-4- -4 44-

U Q)

P.. 4:Cl) -4 0 0 0 4

w; Q) co

ca -4 0 Cd

0W 0 o w 4

0 U)

59

APPENDIX B

PERFORMANCE PARAMETERS CALCULATED FROM

SMALL SIGNAL S-PARAMETER MEASUREMENTS

ROLLET'S STABILITY FACTOR (K)

I + ISI 22 - S2 2112 - IS1 112 - IS212

2 IS1 2 1 Is2 1 1

(17)

K < 1, Potentially Unstable

K > 1, Unconditionally Stable

MAXIMUM AVAILABLE GAIN (MAG)

S21 K

(18) MAG= - (K- K-I

S12

MAXIMUM STABLE GAIN (MSG)

$21

MSG - -2

( 1 9 ) -12 1)1, K MSG

MAG

| 60

ACKNOWLEDGEMENTS

The author is grateful for the assistance of several people who have con-

tributed to this work. Error-correction of measurement data by desktop computer

results largely from the contributions of Dr. Peter W. Staecker. Dr. Ronald F.

Bauer furnished a suitable algorithm for the data reduction of two signal

measurements. David M. Hodsdon provided assistance in the analysis of multiple

coupled microstrip lines. Dr. Ira Drukier and Dr. Leonard Rosenheck of Micro-

wave Semiconductor Corporation are responsible for the design and fabrication

of the GaAs FETs and also provided many helpful discussions. Timothy J. King

made many of the measurements and provided circuit fabrication assistance to-

gether with William Macropoulos, William L. McGilvary, and William E. Fielding.

Michael Demerjian provided assistance with data processing requirements.

61

REFERENCES

1. S. R. Mazumder and P. D. Van der Puije, ""Two-Signal" Method of Measuring

the Large-Signal S-parameters of Transistors," IEEE Trans Microwave

Theory Tech. MTT-26, 417 (1978).

2. Technical Proposal: "K-Band FET Development," prepared by Microwave Semi-

conductor Corporation for M.I.T. Lincoln Laboratory, (May 1979).

3. Ibid.

4. "K-Band FET Development Final Report," prepared by Microwave Semiconductor

Corporation for M.I.T. Lincoln Laboratory, (August 1980).

5. M. L. Stevens, "Characterization of Power MESFETs at 21 GHz," TR-579,

Lincoln Laboratory M.I.T. Technical Report (15 September 1981).

6. Stig Rehnmark, "On the Calibration Process of Automatic Network Analyzer

Systems," IEEE Trans. Microwave Theory Tech. MTT-22, 457 (1974).

7. R. F. Bauer and P. Penfield, Jr., "De-Embedding and Unterminating," IEEE

Trans. Microwave Theory Tech. MTT-22, 282 (1974).

8. "S-parameters ... Circuit Analysis and Design," HP Application Note 95,

September 1968.

9. See Reference 1.

10. K. Kurokawa, "Power Waves and the Scattering Matrix," IEEE Trans.

Microwave Theory Tech. MTT-13, 194 (1965).

11. Notation suggested by D. Peck of Watkins-Johnson at IEEE Symposium Power

GaAs FET Workshop, Los Angeles, CA, June 19, 1981.

12. D. H. Steinbrecher, "An Interesting Impedance Matching Network," IEEE

Trans. Microwave Theory Tech. MTT-15, 382 (1967).

13. P. R. Hirschler-Marchand, C. D. Berglund, M. L. Stevens, "System Design and

Technology Development for An EHF Beam-Hopped Satellite Downlink," National

Telecommunications Conference Record, Vol. 1, Sect. 17.5, Houston TX,

November 1980.

62

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RNUBR2. GOVT 0CESO O 3. RECIPIENT'S CATALOG NUMBER

4- TITLE do lbt, 5.TYEOFRPOTII PRODCVEE

Large-Signal Characterization, Amplifier Design, Technical Reportand Performance of K-Band GaAs MESFETS 6 EFRIGOG EOTNME

Technical Report 5867. AUTHOR-) 8. CONTRACT OR GRANT NUMBER(s)

Carl I .B~erglund F19628-80-C-0002

9. PERFORMING ORGANIZATION NAME AND ADDRESS 10. PROGRAM ELEMENT, PROJECT, TASK

Lincoln Laboratory, m.. AR2A & WORK UNIT NUMBERSP.O. Box 73 Program Element Nos. 33601 F

LexintonNIA 2173and 6343 IFLexigton MA 2173Project Nos.2487 and 2028

11. CONTROLLING OFFICE NAME AND ADDRESS 12. REPORT DATE

Air Force Systems Command, USAF 11 December 1981Andrews AFB ___________________Washington, DC 20331 13. NUMBER OF PAGES

7014. MONITORING AGENCY NA.dE II ADDRESS (&/ different from ContIrolling Office) 15. SECURITY CLASS. (of iA,srep-0t

Electronic Systems Division UnclassifiedH-anscom AFBBedford, MA 01731 15 . DECL ASSI F1ICATION DOWNGRADING

S~iEDULE

1S. DISTR!BUTION STATEMENT (of ghgo Report)

Approved for public release; distribution unlimited.

I 01.ST R'BUTION STATEMENT (of ike Gbsiraci entered in Block 20, .f dnfferens from Report)

I-78. SUPPLEMENTARY NOTES

None

NORF01 C.,tner reterse side if necessary and identify by block nu~mber)

rI G a s miCrostripSI *:TLarge-signal 5-parameters powver am plifier

K Bal~d

- - M, 'Il I -r es-y .. id d-1iif, by block oumber1

-conI Ov~aiice- In Gallium Arsenide field-effect transistor technology have extendied thie powe(:r),, apa!iliies of FEls to the K-Band frequency range. FETs with performlance capabilitv

I t I'iJU olurplt at 20 Gliz have been developed. Large-signal S-parameter chlaracterIzatIons(haviU heelI utilized ii (designing power amplifiers. Transistor performance capabilIt-N

lA o.,bthcr with the performance of experimental amplifier designs realized in a mincrostrip

i: 1473 FnITION OF I NOY 65 IS OBSOLETE UCASFE

SECURITY CLASSIFICAJION OF THIS PAGE (k1h, [).to Ester.d

D AT

F11 Lm E

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