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FREQUENCY SYNTHESISBY PHASE LOCK
(P. ii Blank)
FREQUENCY SYNTHESISBY PHASE LOCK
Second Edition
WILLIAM F. EGAN, Ph.D.
Lecturer in Electrical EngineeringSanta Clara University
A Wiley-Interscience Publication
JOHN WILEY & SONS, INC.
New York / Chichester / Weinheim / Brisbane / Singapore / Toronto
Figures whose captions indicate they are from PLB have been reprinted from Phase-Lock Basics, by
William F. Egan, copyright ( 1998, John Wiley and Sons, Inc. and are reprinted by permission.
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Library of Congress Cataloging-in-Publication Data:
Egan, William F.
Frequency synthesis by phase lock / William F. Egan. Ð 2nd ed.
p. cm.
Includes bibliographical references and index.
ISBN 0-471-32104-4 (alk. paper)
1. Frequency synthesizers. 2. Phase-locked loops. I. Title.
TK7872.F73E32 1999
621.3815 0486Ðdc21 99-25863
CIP
Printed in the United States of America.
10 9 8 7 6 5 4 3 2 1
To Mary andBill, Dan, Tom,John, and Mike
(P. vi Blank)
CONTENTS
PREFACE xvii
GETTING FILES FROM THE WILEY INTERNET SITES xxi
SYMBOLS LIST AND GLOSSARY xxiii
1 INTRODUCTION 1
1.1 Basic Concepts / 1
1.1.1 Meaning of Frequency / 1
1.1.2 Meaning of Frequency Synthesis / 3
1.1.3 Transformation to and from Voltage and Current / 3
1.1.4 Units / 7
1.2 Mathematical Operations on Frequency / 8
1.2.1 Addition and Subtraction: The Mixer / 8
1.2.2 Frequency Multipliers / 13
1.2.3 Frequency Dividers / 13
1.3 Synthesizer Types / 14
1.3.1 Direct Digital (Look-Up Table) Synthesizer / 15
1.3.2 Direct (Analog) Synthesizer / 19
1.3.3 Phase-Locked (Indirect) Synthesizer / 24
1.4 Phase-Coherent and Phase-Continuous Switching / 27
1.5 Combinations of Techniques / 29
1.6 Summary / 31
Problems / 32
vii
2 THE ELEMENTARY PHASE-LOCKED SYNTHESIZER 35
2.1 Basic Components / 35
2.1.1 Voltage-Controlled Oscillator / 35
2.1.2 Divide-by-N (oN) / 40
2.1.3 Phase Detector / 40
2.1.4 Loop Filter / 41
2.2 Loop Operation / 42
2.2.1 Qualitative Description / 42
2.2.2 Mathematical Description / 44
2.3 Loop Low-Pass Filter / 55
2.4 Hold-In Range / 57
2.5 Transient Response / 58
2.6 Summary / 63
2.A Appendix: Linearizer Design / 63
2.A.1 Straight-Line Approximation / 65
2.A.2 Continuous Approximation / 68
Problems / 69
3 MODULATION, SIDEBANDS, AND NOISE SPECTRUMS 71
3.1 Spectral Representation of AM and Narrow-Band FM / 72
3.2 Decomposition of SSB into AM and FM / 75
3.3 E¨ects of Modulation of the Local Oscillator in a Mixer / 78
3.3.1 FM Transfer / 78
3.3.2 AM Suppression / 78
3.3.3 Mixing Between LO Components / 79
3.3.4 Leak-Through / 80
3.3.5 Contamination of the IF / 80
3.4 E¨ect of Modulation of a Multiplied Signal / 84
3.5 E¨ect of Modulation of a Divided Signal / 87
3.6 Oscillator Spectrums / 94
3.6.1 E¨ect of Internal Noise Sources / 94
3.6.2 E¨ect of External Noise Sources / 96
3.6.3 Delay-Line (Ring) Oscillators / 99
3.6.4 Relaxation Oscillators / 101
3.7 Relationships Between Spectral Densities / 102
3.8 Typical Spectral Shapes / 106
3.9 Component Noise / 114
3.9.1 Passive Components / 115
3.9.2 Transistors / 119
viii CONTENTS
3.9.3 Relationship Between Phase Noise and PowerConsumption / 120
3.9.4 Other Active Blocks / 121
3.9.5 Operational-Ampli®er Noise and the Loop Filter / 121
3.9.6 Frequency Dividers / 123
3.9.7 Frequency Multipliers / 126
3.9.8 Finding Noise Sources / 127
3.10 Noise Density at the Syntheizer Output / 129
3.11 Summary / 133
3.A Appendix: The E¨ect of Vibration on Oscillators / 133
3.B Appendix: Considerations of the Upper Integration Limit inEq. (3.39) / 135
Problems / 136
4 FREQUENCY DIVIDERS 139
4.1 Flip-Flops / 139
4.2 Frequency Divider Types / 142
4.3 Presettable Dividers / 146
4.4 Prescalers and Pulse Swallowers / 153
4.4.1 Increasing the Modulus of a VMP / 157
4.4.2 Using Pulse Swallowers in Series / 157
4.4.3 Using Three-Modulus VMPs / 162
4.4.4 Using Four-Modulus VMPs / 162
4.5 Other Bases / 162
4.6 Presetting and O¨setting / 163
4.7 Other Logic Circuits Used in Synthesizers / 166
4.8 Precautions / 167
4.9 Interfacing With RF Input and Di¨erent Logic Families / 168
4.9.1 Gates Biased as Ampli®ers / 168
4.9.2 Sine- to Square-Wave Conversion / 168
4.9.3 Interfacing with ECL / 170
4.10 Summary / 171
Problems / 171
5 PHASE DETECTORS 175
5.1 Balanced Mixer / 175
5.2 High-Speed Sampler / 177
5.3 Exclusive OR / 180
5.4 Flip-Flop / 182
5.5 Comparing Sideband Levels / 187
CONTENTS ix
5.6 Sample-and-Hold Phase Detector / 188
5.7 The Charge-Pump Phase Detector / 197
5.7.1 Operation of the Charge Pump in the Linear Range / 197
5.7.2 Crossover Distortion / 203
5.7.3 Filtering the fref Components With an IntegratingFilter / 214
5.7.4 Filtering the fref Components With a Low-Pass Filter/ 218
5.7.5 Low-Pass Transfer Function With Approximate ChargePump / 220
5.7.6 E¨ects of Imbalance in the Charge-Pump OutputPulses / 222
5.7.7 Sampling E¨ects / 226
5.8 Computing Phase Digitally / 227
5.9 Filter Placement / 228
5.10 Sideband Level and Dependence on N / 228
5.11 Summary / 230
5.A Appendix: Edge Triggered J±K Flip-Flop / 230
5.B Appendix: E¨ect of Noise Current into Ramp Capacitor / 232
5.C Appendix: Crossover Distortion in Charge-Pump PhaseDetectors / 233
5.C.1 Comparison and Equivalence of Logic Realizations / 233
5.C.2 Claims of Improved Performance / 236
5.D Appendix: Transfer Function of Approximate Charge Pump andLow-Pass Filter / 240
Problems / 242
6 HIGHER-ORDER LOOPS 245
6.1 The General Second-Order Loop / 247
6.1.1 Equations / 250
6.1.2 Geometric Interpretation / 251
6.1.3 Circuit Equivalence / 254
6.1.4 Transient Response / 256
6.1.5 Slow Response Due to Imbalance / 259
6.1.6 Modulation Response / 260
6.2 Third-Order Loop / 260
6.2.1 Loop with Integrator-plus-Lead±Lag Filter / 260
6.2.2 Exact Analysis of a Special Case / 267
6.3 A Convenient Second-Order Filter / 270
x CONTENTS
6.4 State-Space Analysis / 271
6.4.1 Transfer Functions / 271
6.4.2 State Variables / 272
6.4.3 Matrix Di¨erential Equation / 272
6.4.4 Solution of the Time-Response Equation / 273
6.4.5 Computer-Aided Solutions / 274
6.4.6 Another Method / 275
6.5 Summary / 276
6.A Appendix: Responses Between Nodes / 276
6.B Appendix: Evidence that Type-2 Loops Are Slower / 278
6.B.1 Theoretical Considerations / 278
6.B.2 Evidence from Simulation / 279
6.B.3 Evidence from Computed Results / 280
6.M Appendix: Modulation-Response Curves / 287
6.T Appendix: Transient-Response Curves / 292
Problems / 299
7 SAMPLING EFFECTS 301
7.1 The Sampling Model / 301
7.1.1 Sample-and-Hold Phase Detector / 302
7.1.2 Charge-Pump Phase Detector / 302
7.2 First-Order Correction for Sampling / 304
7.2.1 Sample-and-Hold Phase Detector, The Hold / 304
7.2.2 Charge-Pump Phase Detector, The E¨ective Hold / 312
7.3 z-Transform Representation / 312
7.3.1 Sample-and-Hold Phase Detector / 312
7.3.2 Charge-Pump Phase Detector / 315
7.3.3 Step Response / 320
7.4 Laplace Representation with Sampling / 323
7.4.1 Second-Order Loop / 328
7.4.2 Third-Order Loop / 328
7.4.3 When Are Sampling E¨ects Important? / 329
7.4.4 E¨ect on Modulation Response / 329
7.5 Summary / 336
7.A Appendix: Obtaining z-Transforms / 336
7.B Appendix: E¨ective Hold / 337
7.B.1 Graphical View / 338
7.B.2 Mathematical Basis / 338
CONTENTS xi
7.S Appendix: Software / 340
BdT1o3.m and BdT1o3sb.m / 340
EvZord3 / 341
GSmpl / 341
InvZ / 341
Problems / 341
8 ARCHITECTURES 343
8.1 Heterodyning Within the Synthesizer / 344
8.1.1 Spurious Coupling to the Output / 345
8.1.2 Spurious Coupling to the Loop / 345
8.1.3 Miscounts Due to Spurious Signals / 347
8.1.4 The E¨ect of IF Filters / 349
8.1.5 Dynamic Range with IF / 351
8.2 Architectures Employing Heterodyning / 351
8.2.1 Multiply Output Frequency / 352
8.2.2 Divide and Sum / 353
8.2.3 O¨set References / 357
8.3 Fractional-N and Relatives / 371
8.3.1 The Digiphase Synthesizer / 372
8.3.2 Fractional-N Synthesizer / 376
8.3.3 Spurious Frequencies with Fractional Division / 377
8.3.4 Reduction of Sideband by Digital Processing / 379
8.3.5 Multistage Fractional Divider / 383
8.4 Other Uses of Pulse Addition and Subtraction / 391
8.4.1 High Modulation Index FM of Synthesizer Signal / 391
8.4.2 Frequency O¨setting / 392
8.5 Summary / 392
8.A Appendix: Computing Minimum Divide Ratio / 393
Problems / 396
9 LARGE-SIGNAL PERFORMANCE, NATURALACQUISITION 399
9.1 Simple Loop Acquiring Lock / 400
9.1.1 Optimized Gain Shaping / 401
9.1.2 Constant Gain / 403
9.2 Formulas for Nonlinear Behavior / 408
9.2.1 First-Order Loop / 410
9.2.2 Second-Order Loop / 411
xii CONTENTS
9.3 The Pull-In Process / 420
9.4 False Lock Due to Phase Shift / 423
9.5 False Lock Due to Sampling / 426
9.6 Monitoring Lock / 435
9.6.1 Coherent Detector / 435
9.6.2 Level Detector / 435
9.6.3 Logic / 436
9.6.4 Processing the Out-of-Lock Signal / 436
9.7 Testing Acquisition / 436
9.7.1 Testing Ranges / 437
9.7.2 Testing Speed / 437
9.8 Summary / 440
9.A Appendix: Detailed Analysis of Simple Loop Acquiring Lock / 441
Problems / 443
10 ACQUISITION AIDS 445
10.1 The Frequency Discriminator as an Acquisition Aid / 445
10.2 The Search Oscillator as an Acquisition Aid / 448
10.3 Changing Loop Parameters to Aid Acquisition / 451
10.4 Acquisition-Aiding Logic / 451
10.4.1 Charge-Pump Phase-Frequency Detector / 452
10.4.2 Quad-D Phase-Frequency Detector / 459
10.4.3 Square-Wave Phase-Frequency Detector / 463
10.4.4 Sample and Hold Phase Detector / 465
10.4.5 Extended Range / 474
10.4.6 Speed-Up Circuits / 476
10.4.7 Improved Sine PD / 484
10.5 E¨ect of Sign Reversals in Mixers / 484
10.6 Summary / 486
10.A Appendix: Further Consideration of the Charge-Pump PFD'sOut-of-Lock Output / 486
10.B Appendix: Comparison of S&H and Charge-Pump PFD / 487
Problems / 488
11 SPECTRAL PURITY 491
11.1 Noise Suppression / 491
11.2 Sampling E¨ects on the Noise Spectrum / 493
11.3 Sidebands Caused by Injection Locking / 495
CONTENTS xiii
11.4 Conversion of Phase-Noise Density to Other Stability Measures /497
11.4.1 Phase and Frequency Deviation / 497
11.4.2 Allan Variance / 499
11.4.3 Calculations of Other Time-Domain Stability Measures /503
11.4.4 Jitter / 504
11.4.5 Units in This Section / 506
11.5 Measurement of Frequency Stability / 507
11.5.1 Measurement with a Phase Detector / 507
11.5.2 Measurement with a Frequency Discriminator / 509
11.5.3 Measurement of Sideband Density / 511
11.6 Summary / 512
Problems / 512
12 COMPUTER-AIDED ENGINEERING 515
12.1 Frequency-Domain Analysis / 515
12.1.1 Stability Analysis / 515
12.1.2 Modulation Response / 518
12.2 Time-Domain Analysis / 519
12.2.1 Response with z-Transforms / 519
12.2.2 Nonlinear Simulation / 519
12.2.3 S&H PD, Using State-Space Method / 521
12.2.4 Charge Pump PFD, Using State-Space Method / 530
12.2.5 Approximate Solution with State-Space Variables / 538
12.2.6 Simulation Without State Space / 538
12.3 Synthesizer CAE Programs / 541
12.3.1 Open- and Closed-Loop Responses / 547
12.3.2 Noise Levels / 547
12.3.3 Transient Response / 556
12.3.4 Computation Methods and Accuracy / 561
12.3.5 Comparison of Program Types / 563
12.3.6 Simple Tests for Synthesizer Software / 564
12.4 Summary / 564
12.A Appendix: Using the Matrix Inverse to Set Initial Values / 565
12.B Appendix: Getting Files from the Wiley ftp and Internet Sites /566
xiv CONTENTS
REFERENCES 569
ANSWERS TO PROBLEMS 581
INDEX 585
Cross-Reference from First Edition 597
CONTENTS xv
(P. xvi Blank)
PREFACE
The ®rst edition of Frequency Synthesis by Phase Lock was written when radios,televisions, and RF instruments were commonly tuned by knobs, somethingthat has been all but forgotten due to today's widespread use of frequencysynthesizers. While synthesizers have become common, they still represent afascinating and challenging area of electronic design. A synthesizer is a com-pact, but complex, system, one whose design requires knowledge of RF, ana-log, digital, and control system technologies, yet is small enough that one en-gineer can know it in detail. It contains fast digital signals in the volt range andanalog signals that must be shielded from those transients to the nanovolt level.The loop itself is a sample data control system with signal-dependent samplingrate, practically unanalyzable but o¨ering opportunity for the clever use of ap-proximation. It is so fascinating and complex that an engineer's ®rst synthesizerdesign is likely to provide a very signi®cant learning experience.
This book is written for engineers who design, specify, use, or test frequencysynthesizers. It is not a ``cookbook,'' not a simpli®ed instruction manual forsynthesizer design. The nature of the synthesizer design problem makes suchdesign formulations apply only to limited cases. Moreover, I believe it is im-portant that engineers have a basic understanding of their design. Otherwise,we are at the mercy of misinterpretations of, or factual errors in, reference ma-terials which, I have found, are often of great value but rarely infallible. Anengineer should maintain an awareness of what results are reasonable and thisrequires the kind of understanding that I hope this book will foster. Wherethere is a schematic in this book, it rarely includes component values; it is in-tended that the engineer should gain an understanding of that circuit and applyit to his or her particular situation.
xvii
Frequency Synthesis is for engineers who want to gain an understanding ofsynthesizers and their e¨ects on the systems in which they are embedded. It isfor engineers who have designed a synthesizer (perhaps using a cookbook) andnow want to understand the design. It is for engineers who wish to take the timeto study before designing a synthesizer in order to avoid problems.
Within the subject area of synthesizers, the phase-locked type is stronglyemphasized, but the other types, direct and digital, are not ignored. Their op-erating principles are described and fundamentals applicable to their design anduse are discussed, but phase-lock techniques, which are probably the mostcommonly used, are emphasized.
Some of the material is from the ®rst editionÐthose fundamentals stillapplyÐbut much of the material is new, re¯ecting subsequent developments.The ®rst edition was designed largely as a text for use in graduate courses. Ihave used it for this purpose, but such courses are not common. Problems, mostfrom the ®rst edition, are included, and answers have now been provided formost of these, making the problems more useful for self-study. Numerous ex-amples are included, as before.
Because of the complexity of the synthesizer loop, simulation is important.In the ®rst edition, I could only describe computer-aided engineering (CAE)programs that were run on large computers. Happily, we now have availablecommercial CAE programs for PCs, which are discussed in Chapter 12. In ad-dition, I have made available MATLAB= scripts for use as design aids and asaids to understanding. These tools for synthesizer analysis and simulation canbe downloaded from the Wiley ftp site. (See Figures 12.13 through 12.15 andFigure 9.18 for CAE examples.) Moreover, the descriptions in the text andcomments in the scripts are intended to allow the reader to understand the de-tails of these scripts so they can be further extended and expanded, possiblyused in other software languages. The ftp site also provides a vehicle for making(the practically inevitable) errata available.
Extensive references have been provided to lead the reader to a better un-derstanding of related material that is not covered in detail, or where a moreextensive, or simply alternate, treatment may be available. One signi®cantimpediment in using such references is the wide variety of symbols used in theliterature. Fortunately, Phase-Lock Basics [Egan, 1998] provides a convenientreference for a more detailed understanding of basic material, with symbolsthat correspond closely to those used in this book. Because it will be referencedfrequently, it will be abbreviated PLB and not accompanied by the standard[Egan, 1998] pointer to the description of a work under the References sectionin the back of this book. While Frequency Synthesis is self-contained, referencesto PLB can provide an avenue for gaining understanding at a more basic levelor in more general areas of phase lock. In addition, some of the MATLABscripts used with PLB, which are also available from the Wiley ftp site, arereferenced.
xviii PREFACE
There is a potential problem that a¨ects phase-locked loop design and oftenleads to 2p errors in numerical values, resulting from the variety of units usedfor phase. The ®rst edition of this book guarded against such errors by usingsubscripts to indicate whether cycle or radian units were being used for a vari-able. In the second edition, we follow a procedure that makes this unnecessary,permitting free choice of units while avoiding 2p errors.
Chapter 1 introduces the concepts of frequency synthesis, including the threebasic synthesizer forms. Chapter 2 provides, as a starting point, an elementaryunderstanding of the phase-locked synthesizer, including its components andthe design problem.
The critical concept of phase noise is discussed in Chapter 3, including itsimpact on systems using synthesizers, noise levels in synthesizer components,and the e¨ect of the synthesizer in processing these noise levels. The exten-sive curves of oscillator phase-noise density, given in the ®rst edition, havebeen further expanded and typical frequency-divider noise curves have beenadded.
Chapters 4 and 5 provide ample discussion of two critical synthesizer com-ponents, frequency dividers and phase detectors, respectively. Crossover dis-tortion (``the dead zone'') in charge-pump phase-frequency detectors is coveredextensively.
Chapter 6 extends the elementary synthesizer concepts learned in Chapter 2to higher-order loops, including exact analysis of an important class of third-order loops and a description of state-space methods applicable to even higherorders. The latter are employed extensively in the MATLAB scripts for simu-lation of the synthesizer as it acquires lock.
Chapter 7 discusses sampling in the synthesizer and its important, butsomewhat obscure, e¨ects on loop performance, especially stability. Variousmethods for analyzing these e¨ects are given.
Chapter 8 describes advanced synthesizer architectures, including the incor-poration of heterodyning, multiple loops, and fractional-N synthesis. The use ofdigital signal processing to reduce spurious content in fractional-N synthesis,which was discussed in the ®rst edition, is here expanded to include more so-phisticated variants.
Chapter 9 discusses large-signal performance during frequency switching andacquisition of lock, including many formulas for various kinds of loops and adiscussion of the phenomena of false locks and limited oscillations. Chapter 10describes acquisition aids, including phase-frequency detectors and learningsequences.
Spectral purity, its attainment, measurement, and computations are dis-cussed in Chapter 11.
Chapter 12 describes CAE, focusing on the various aids provided byMATLAB scripts, as well as commercial CAE programs.
PREFACE xix
I hope that this book will be a valued resource for engineers engaged in allaspects of synthesizer design and use, and that it conveys some of the fascina-tion I have found in this area of engineering.
The manuscript was reviewed by Eric Unruh, a colleague and fellow syn-thesizer designer, whose suggestions were greatly appreciated and will surelybene®t the reader.
William F. Egan
Cupertino, California
August 1999
xx PREFACE
GETTING FILES FROM THE WILEY ftpAND INTERNET SITES
To download the ®les listed in this book and other material associated with it,use an ftp program or a Web browser.
FTP ACCESS
If you are using an ftp program, type the following at your ftp prompt:
ftp://ftp.wiley.com
Some programs may provide the ®rst ``ftp'' for you, in which case type:
ftp.wiley.com
Log in as anonymous (e.g., User ID: anonymous). Leave password blank.After you have connected to the Wiley ftp site, navigate through the direc-
tory path of:
/public/sci tech med/frequency synthesis
WEB ACCESS
If you are using a standard Web browser, type URL address of:
ftp://ftp.wiley.com
xxi
Follow the directions in the ftp section to navigate through the directory pathof
/public/sci tech med/frequency synthesis
PLB FILES
To access Phase-Lock Basics (PLB) ®les, substitute ``phase lock'' for``frequency synthesis'' in the preceding instructions.
FILE ORGANIZATION
Under the frequency synthesis directory, ®les are organized alphabeti-cally.
Under the phase lock directory are subdirectories that include MATLAB®les for PC, Macintosh, and UNIX systems and Microsoft= Excel ®les.
Important information is included in README ®les.If you will be running MATLAB on a Macintosh or Unix system and will
use a MATLAB version earlier than 5, see Appendix 12.B.If you need further information about downloading the ®les, you can call
Wiley's technical support at 212-850-6753.
xxii GETTING FILES FROM THE WILEY ftp AND INTERNET SITES
SYMBOLS LIST AND GLOSSARY
(Some symbols have more than one meaning and all meanings may not begiven below, but usage should be apparent from context.)
1 is identically equal to, rather than being equal only undersome particular condition.
v is de®ned as.@ (superscript) indicates rms.X jy the variable X with the condition y or referring to y.
X jy2y1 the variable X with y between yl and y2.
ex angle or phase of x.D@ low-pass ®lter.D@D band-pass ®lterADC analog-to-digital converter, a device that produces a digital
output proportional to a voltage or current input.C control number [Section 4.6, p. 164].CP charge pump (phase detector) [Section 5.7, p. 197]DAC digital-to-analog converter, a device that produces a voltage
or current proportional to digital input.dB decibel, 10 log10 (power ratio) [Section 1.1.4, p. 7].dBc decibels relative to carrier power, i.e., 10 log10 (power/carrier
power) [Section 1.1.4, p. 7].dBc/Hz ratio of sideband power density, per Hertz bandwidth, to
total signal power. Decibels relative to ``carrier'' per Hzbandwidth of noise [Section 3.7, p. 102].
dBm decibels relative to 1 mW, 10 log10 (P/mW) [Section 1.1.4, p. 7].
xxiii
DBM doubly-balanced mixer [Section 1.2.1, p. 13]dBr decibels relative to 1 radian2, 10 log10(j2/rad2) [Section
1.1.4, p. 7].dBr/Hz phase-noise power spectral density in decibels relative to 1
radian squared per hertz bandwidth [Section 3.7, p. 102].dBV decibels relative to 1 volt [Section 1.1.4, p. 7].DDS direct digital synthesizer (look-up table synthesizer) [Section
1.3.1, p. 15].EG relative gain error [Eq. (9.16), p. 403].En relative frequency error in the nth period [Eq. (9.17),
p. 403]ExOR exclusive OR function, equal to one if and only if the two
inputs di¨er.F ®nal count [Section 4.6, p. 163]; actual frequency (as opposed
to f, which may be a deviation from steady state).fx where x is any subscript, see ox if de®nition not found under
fx.ffract in a fractional-N synthesizer, di¨erence between the
synthesized frequency and next lower whole multiple of fref .fI IF, the frequency out of a mixer [Section 1.2.1, p. 8].fL local-oscillator frequency [Section 1.2.1, p. 8].fm modulation frequency [Section 3.1, p. 72].f1 open-loop frequency change at VCO output (Section 2.2.2,
Fig. 2.8a, p. 46). D fout in PLB.fosc oscillator frequency.fp ®lter pole frequency.fref or fREF reference frequency to phase detector [Fig. 1.19, p. 24].f 0ref or f 0REF reference frequency to divider that produces fref [Fig. 1.19,
p. 24].frequency
power-spectral-density
Sf �om�, mean square frequency s2f in a narrow frequency
band divided by the bandwidth. The band is narrow enoughthat the value of Sf �om� does not change appreciably whenthe bandwidth decreases [Eq. (3.35), p. 103].
fres resolution, or step size, of the synthesizer.fs sample frequency; frequency of feedback signal at phase
detector [Fig. 9.1, p. 401].fS signal frequency; the frequency of the weaker input to a
mixer [Section 1.2.1, p. 8].fz ®lter zero frequency [Fig. 6.2, p. 247 for second-order loop].f0 see o0 below.G open-loop transfer function [Section 2.2.2, p. 44]; gain;
conductance.GF forward loop transfer function [Section 2.2.2, p. 44].GR reverse loop transfer function [Section 2.2.2, p. 44].Gr relative gain [Eq. (9.15), p. 402].
xxiv SYMBOLS LIST AND GLOSSARY
H closed-loop transfer function. [Eq. (2.14), p. 47].hold-in range GWH of mistuning �GW� over which lock can be
maintained as the loop is tuned [Section 9.2, p. 408].IC integrated circuitICO current-controlled oscillatorIF intermediate frequency. The output signal from a mixer or
the frequency of that output.Im imaginary part of.KF forward gain (in secÿ1) [Section 2.2.2, p. 44].KLF loop-®lter gain constant (dimensionless) [Section 2.2.2, p. 44].Kp phase-detector gain constant (usually in V/cycle or V/rad)
[Section 1.3.3, p. 24]. Kj has also been used.Kv VCO gain constant [in Hz/V or (rad/sec)/V] [Section 1.3.3,
p. 24].L� fm� relative SSB level at fm from spectral center [Eq. (3.37),
p. 104].LO local oscillator: the normally stronger input to a mixer
[Section 1.2.1, p. 8].LSB least-signi®cant bit. 3 LSB means third-least-signi®cant bit.m modulation index � peak phase deviation in radians
[Eq. (3.5), p. 74].oM reference frequency dividerMSB most-signi®cant bit.oN frequency divider in the loop.O o¨set [Section 4.6, p. 164].op amp operational ampli®er.open-loop
transferfunction
transfer function around the loop as if it were broken toallow the response of the opened loop to be measured[Section 2.2.2, p. 44].
P preset number [Section 4.6, p. 163]; power.p one-sided power spectral density [Section 3.7, p. 104].PD phase detector.PFD phase-frequency detector [Section 5.7, p. 197].phase margin additional phase lag to cause the loop to oscillate, to give
ÿ180� at the frequency at which open-loop gain is unity[Section 2.2, p. 42].
phase powerspectraldensity
Sj�om�, mean square phase s2j in a narrow frequency band
divided by the bandwidth. The band is narrow enough thatthe value of Sj�om� does not change when the bandwidthdecreases [Section 3.7, p. 102].
PFF preset ¯ip-¯op [p. 148]PLB Shortened form for text reference of Egan (1998) book
Phase-Lock Basics.PLL phase-locked loop.PM phase modulation.
SYMBOLS LIST AND GLOSSARY xxv
power spectraldensity
power per unit frequency, the limit (at a given frequency) ofthe ratio of power to bandwidth as bandwidth approacheszero [Section 3.7, p. 102].
PPSD phase power spectral density fseeg.PSD power spectral density fseeg.pull-in process of acquiring lock. Range GWPI of mistunings (GW
over which lock can be acquired [Section 9.2, p. 408].ppm parts per million, �10ÿ6.Q quality factor, (energy stored)/(energy dissipated in a cycle),
a measure of the sharpness of a resonance curve.R ratio of pole frequency to sampling frequency [Eq. (7.27),
p. 328].r ratio of (nonzero) pole frequency to unity gain frequency and
of unity gain frequency to zero frequency in special third-order loop, [Eq. (6.49), p. 267].
rpz ratio of pole frequency to zero frequency in type-2 third-order loop, [Eq. (6.40), p. 261].
rn ratio of natural frequency to (nonzero) pole frequency, type-2third-order loop [Eq. (6.63), p. 271].
rad radian.rad2/Hz a measure of PPSD, the density that produces a phase
variance of d rad2 in a narrow bandwidth d Hz [Section 3.7,p. 102].
Re real part of.reference input to standard control system.reference sidebands o¨set from the synthesized signal by fref or
harmonics of fref .sidebandsRF radio frequency. The normally weaker input to a mixer or the
frequency of that input [Section 1.2.1, p. 8].s the Laplace variable, s� jo.S siemens, unit of conductance, the reciprocal of an ohm,
equivalent to a mho.sampling sidebands produced by the sampling process on harmonics of
the sampling frequency [Section 7.4, p. 323].sidebandsS&H sample-and-holdsec second.seize range GWs of mistuning �GW� over which the loop will
acquire lock without skipping a cycle [Section 9.2, p. 408].Sf �om� frequency power spectral density fseeg at modulation
frequency om.sinc�x� sin�px�=�px�.spectrum
analyzeran instrument that displays power versus frequency bymeasuring power passing through a ®lter whose centerfrequency is swept in synchronism with the abscissa of thedisplay.
xxvi SYMBOLS LIST AND GLOSSARY
SSB single sideband. This refers to signal strength on one side ofthe carrier, often accompanied by an equal strength on theother side, and should not be confused with single-sided,referring to spectrums where all of the power is shown atpositive frequencies.
Sy� f 0� power spectral density fseeg of y at frequency f 0.Sj phase power spectral density fseeg [Section 3.7, p. 102].S _j;So frequency power spectral density fseeg [Section 3.7,
p. 102].TA count period (averaging time).Tc computational period, the sampling period for computations
in a simulation.Ts sample period, especially within the loop where Ts � 1= fs �
1= fref .TS time between starts of counts [Section 11.4.2, p. 499]; lock or
seize time [Section 9.2, p. 408].u1 phase-detector output [Fig. 1.19b, p. 24].u2 VCO input, tuning voltage [Fig. 1.19b, p. 24].VCO voltage-controlled oscillator [Section 2.1.1, p. 35].VMP variable-modulus prescalar [Section 4.4, p. 153].z z-transform variable [Section 7.3, p. 312].a 0 for lag ®lter; 1 for integrator and lead, Eq. (6.23) [p. 256]
otherwise; ratio of false to correct lock frequencies [Section9.5, p. 426].
z damping factor [Section 6.1, p. 247].h sampling e½ciency [Eq. (5.25), p. 193].j phase.j1 open-loop phase at the VCO output, integral of f1fseeg.jref reference phase to phase detector, integral of freffseeg.o frequency in radians/second.ox where x is any subscript, see fx if de®nition not found under
ox.W Gmistuning: di¨erence between the input (reference)
frequency and the VCO center frequency [Fig. 9.5, p. 409].W normalized modulation frequency, om=on [Appendix 6.M,
p. 287].oc oscillator center frequency.WH peak hold-in range: maximum G change in o that still
permits lock to be maintained [(12) total hold-in range]
[Section 9.2, p. 408].oL frequency where open-loop gain is unity. This is close to the
ÿ3-dB closed-loop bandwidth for a well-damped loop [Fig.2.9, p. 48].
om modulation frequency [Section 3.1, p. 72].on natural frequency [Section 6.1, p. 247].
SYMBOLS LIST AND GLOSSARY xxvii
o0 loop velocity constant. For type-l loop, frequency whereopen-loop gain would be unity if loop ®lter maintained itslow-frequency gain. For type-2 loop, o0 is in®nite [Eq. (2.10),p. 45].
oosc oscillator frequency.oout loop output frequency (at VCO output).op ®lter pole frequency.WPI peak pull-in range: G frequency range over which eventual
lock is certain [(12) total pull-in range] [Section 9.2, p. 408].
oref reference frequency to phase detector [Fig. 1.19, p. 24].os sample frequency, frequency of feedback signal at phase
detector [Fig. 9.1, p. 401].WS peak seize frequency range: frequency range over which loop
locks without skipping a cycle [(12) total seize range] [Section
9.2, p. 408].oz ®lter zero frequency [Fig. 6.2, p. 247 for second-order loop].
xxviii SYMBOLS LIST AND GLOSSARY
