Sam PalermoAnalog & Mixed-Signal Center

Texas A&M University

Lecture 13: Folded Cascode OTA

ECEN474/704: (Analog) VLSI Circuit Design Spring 2016

Announcements & Agenda

• HW5 (Preliminary Project Report) Due Apr. 18

• Single-Stage Cascode OTA• Folded Cascode OTA

2

Simple OTA

3

M1 M2Vi+ Vi-

VDD

VSS

Rbias

Itail

M5 M6

M3 M4

CL

Vo

( )621 || oomoutmv rrgRGA == Gain DC

• Gain is limited by single-transistor output resistance

Single-Stage Cascode OTA

• Gain is larger by a gmro factor• Output swing range is limited

due to large compliance voltage of cascode current source load

4

( )6864241 || oomoommoutmv rrgrrggRGA ≈= Gain DC

[Razavi]

Single-Stage Cascode OTA Unity Gain Feedback Voltage Range

5

( )!!! a than Less

Range Input) (&Output conditionsat M2 into plugging and As

saturation M4 byset V Minimum

saturation M2 byset V Maximum

out

out

TH

THGSTH

xGSxb

THbout

THxout

VVVV

VVVVVVV

VVV

244

4

4

2

−−=+=

−≥

+≤

• Cascode configuration constrains output & unity-gain swing

[Razavi]

Folded Cascode Circuits

6

• “Folding” about the cascode node will increase input and output swing range

PMOS Input & NMOS Cascode

NMOS Input & PMOS Cascode

[Razavi]

Folded Cascode OTA

7

[Razavi]

Folded Cascode OTA Unity Gain Feedback Voltage Range

8

• With proper (high-value) choice of Vb2, a decent output and input swing range can be achieved

1

2 ||

GSDSATIoutDSATNDSATNCout

THPbout

VVVVVV

VVVMP

Tail+≥+≥

+≤

OR saturation sourcecurrent tailor cascode NMOSoutput byset V Minimum

saturation byset V Maximum

out

out

MP

MNC

TAMU-ELEN-474 2009 Jose Silva-Martinez

- 9 -

Folded-Cascode OTA: gm, rout and poles?

VB1 and VB2 must keep M1

- M5 in saturation region

VB2 > Vsat,4 + VGS3

VB1 < VDD - Vsat,5 – VSG2

Notice that ID5 biases both M2 and M1

( )( ) ( )43351221 ; dsmdsdsdsmdsoutmm rgrrrgrrgG ≅=

(for M4 sat)

(for M5 sat)

TAMU-ELEN-474 2009 Jose Silva-Martinez

- 10 -

Example: Folded-Cascode OPAMP

Find the gain and the phase from input to output and from input to node 2.

The low frequency gain is 77 dB and the unity gain frequency is around 80 MHz.The behavior of the gain from the input to node 2 is interesting: above the dominant pole.

51

1

oo

m

ggg+

≈2

1

m

m

gg

≈

+

≈Loutoo

mz Crgg

g 1

51

22ω

TAMU-Elen-474 Jose Silva-Martinez-08

- 11 -

There is a limitation due the non- dominant pole

IBIAS ↑ ⇒ ADC ↓

Wcasc ↓ ⇒ VDSAT ↑

+

+

−=

o

L

mc

po

md

in

o

gCs1

gC

s1

1g

gvv

TYPICAL FOLDED CASCODE (One of the most popular circuit in ADCs)

TAMU-Elen-474 Jose Silva-Martinez-08

- 12 -

FOLDED-CASCODE OTAFrequency response:

Righ hand side

Righ hand side: 2 poles (at VW and Vout)

Left hand side: 4 poles !!! (at VX, VY, VZ and

Vout)

The poles at Vy and Vz are associated to

N-type transistors higher frequencies

( )

mp

PC

out

outout1mV

gsC1

1

gsC1

1RgsA+

∗+

∗≅

vin-

2ID1

M1

MP

vout

VB2

VB1vin+

2ID1

VB2iOUT1

2ID1

VDD

-VSSMN

VB3

MN

VB1

VWVX

VY

VZ

TAMU-Elen-474 Jose Silva-Martinez-08

- 13 -

Output referred noise

M1 produces an output current given by

Each transistor M2 generates a differential output current

Similarly, for each transistor M5

At low and medium frequencies, noise contribution of the cascode transistors can be neglected (M3 and M4)

Vn4

ro5

i04

M405

4n4n

054m

4m04 r

vv

rg1g

i ≅+

=

For cascode transistors

1n1m01 vgi =

2n2m02 vgi =

5n5m05 vgi =

vin-

2ID1

M1

M2

vout

VB2

VB1vin+

2ID1

VB2iOUT1

2ID1

VDD

-VSSMN

VB3

MN

VB1

VWVX

VY

VZM4

M5

M3

iout2 = 2(ieq1

2 + ieq22 + ieqn

2 )meq kTgi382 =Remember

TAMU-Elen-474 Jose Silva-Martinez-08

- 14 -

Noise density and noise level

The output referred current spectral density is

And the input referred noise density becomes

The noise level is

( )25n

25m

22n

22m

21n

21m

2T0 vgvgvg2i ++=

21m

25n

25m

22n

22m

21n

21m2

in,eqg

vgvgvg2v

++=

∫∫

++==

BW2

1m

25n

25m

21m

22n

22m2

1nBW

2in,eqnoise df

g

vg

g

vgv2dfvv

FOLDED-CASCODE OTA

vin-

2ID

1

M1

M2

vout

VB2

VB1vin+

2ID

1

VB2iOUT1

2ID

VDD

-VSSM5

VB3

M5

VB1

VWVX

VY

VZ

TAMU-Elen-474 Jose Silva-Martinez-08

- 15 -

Noise level for the folded-cascode OTA

Lets consider thermal noise (vn2 =(8/3)KT/(gm))

Low-noise is associated with large gm1 and relatively small gm2 and gm5

∫

++=

BW2

1m

25n

25m

21m

22n

22m2

1nnoise dfg

vg

g

vgv2v

∫

++=

BW m

m

m

m

mnoise df

gg

gg

gkTv 2

1

52

1

2

1

13

16

( )

++

≈

1

5

1

2

1

18

m

m

m

m

mnoise g

gggBW

gkTv

Or for a dominant (single) pole system with NBW = (π/2)BW

vin-

2ID1

M1

M2

vout

VB2

VB1vin+

2ID1

VB2iOUT1

2ID1

VDD

-VSSM5

VB3

M5

VB1

VWVX

VY

VZ

Noise of diff pair Noise Factor (due to other transistors)

Next Time

• Two Stage Miller OTA

16