# ECEN474: (Analog) VLSI Circuit Design Fall spalermo/ecen474/lecture08_ee474_curr2012-10-08ECEN474: (Analog) VLSI Circuit Design Fall 2012 Lecture 8: ... • Biasing in ICs • Simple

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### Text of ECEN474: (Analog) VLSI Circuit Design Fall spalermo/ecen474/lecture08_ee474_curr2012-10-08ECEN474:...

• Sam Palermo Analog & Mixed-Signal Center

Texas A&M University

ECEN474: (Analog) VLSI Circuit Design Fall 2012

Lecture 8: Current Mirrors

• Announcements & Agenda

HW2 due Monday

Reading Razavi Chapter 5

Biasing in ICs Simple Current Mirror Transistor Small-Signal Impedances

Simple Amplifiers Other Current Mirror Topologies

2

• Current Source Properties

Output Resistance

3

Finite output resistance degrades current source accuracy and amplifier gain

Other important properties: Voltage headroom (compliance voltage) Accuracy Noise

• How Should We Bias Our Circuits?

Resistive Biasing Assuming saturation

4

( )2

21

2

2

21

21

+=

=

TnGG

Goxn

TnGoxnD

VVddRR

RL

WC

VVL

WCI

ID is sensitive to Supply (Vdd) Process (VTn and nCoxW/L) Temperature (VTn and n)

• IC Biasing

In IC design we often assume that we have one precise current source and we copy its value to our circuits

5

• Simple Current Mirror

That copy circuit is a current mirror Simple Current Mirror

6

( )

Tn

oxn

REFG

TnGoxnREFD

V

LWC

IV

VVL

WCII

+

=

==

1

2

1

2

21

?

GV isWhat

If VG is applied to another transistor 2

1

2

221

+

= TnTn

oxn

REFoxnout VV

LWC

IL

WCI

REFout I

LWL

W

I

1

2

=

• Ideal Current Mirror Example

7

I1=1mA

I2=1mA

I3=0.5mA

I4=1.5mA

This bias scheme reduces sensitivity to process, voltage, and temperature variations

• CS Amplifier w/ Current Source

8

What is ID?

Need to insure that M3 remains in saturation

( )

+

+

=+= Tnoxn

D

GG

GTnovGs V

LWC

IVddRR

RVVVV

1

21

21

2

• TAMU-ELEN-474 2009 Jose Silva-Martinez

- 9 -

Current Mirrors: Accuracy limitations

VGS +

_

ID1

ID2

M1 M2

In general (W/L)2=N(W/L)1, most probably VT1VT2, then

( ) ( )

( ) ( )

( ) ( )( ) ( )( ) ( ) 1D1DS121TGS1P

2DS22

2TGS2P1D

1DS12

1TGS1

OXn

2DS22

2TGS2

OXn

2D

2DS22

TGS2

OXn2D

NIV1VVKV1VVK

IV1VV

LW

2C

V1VVLW

2C

I

V1VVLW

2C

I

+

+=

+

+

=

+

=

1DS12DS2 VVError

L1 Long devices reduce the

error; make VDS1=VDS2

1P2P KKError

Errors can be reduced (but not eliminated) by using replicas of the main device and good layout!

1T2T VVError

Good solution ==> use cascode structures

Effective mobility and threshold voltages are sensitive to VDS.and Vdsat

• TAMU-ELEN-474 2009 Jose Silva-Martinez

- 10 -

DC Current Mirrors: Second-Order Effects

VGS +

_

ID1

ID2

M1 M2

( ) ( )( ) ( ) NV1VV

V1VVII

1DS12

1TGS1n

2DS22

2TGS2n

1D

2D

++

=

12Error

Error is minimized by using replicas of the basic device

1T2T VVError crit

dsgs0

LV1

1V1

1

++

=

W

VT

VT0

1-3m

After good layout: Tolerances in N are in the range of 0.5-2 %. Usually mismatches are inversely proportional to gate area!

Intra-die VT mismatches are inversely proportional to gate area!

• Small-Signal Impedance: Simple Current Source

11

oout g

r 1=

• Small-Signal Impedance: Diode Load

12

momout ggg

r 11 +

=

• Small-Signal Impedance: Looking Into Source

13

( ) ( )

mombmout

oombmo

oombmo

ggggr

vgggrvvggi

11

++=

++=++=

• Small-Signal Impedance: Looking Into Source w/ Drain Resistor

14

+

++=

o

D

ombmout r

Rggg

r 11

• TAMU-ELEN-474 2009 Jose Silva-Martinez

- 15 -

Small signal analysis: Common-source amplifier

VGS+vgs1 +

_

ID1

ID1

M1

M2

vgs1 vout r01

gm1vgs1

vout

1 : 1

r02

Small signal equivalent

0201

1

gggAv m+

=

If VOUT>VDSAT1, VOUT

• TAMU-ELEN-474 2009 Jose Silva-Martinez

- 16 -

vgs1 vout

r01 gm1vgs

1

r02

Small signal equivalent circuit

vout

Small signal analysis: Common-drain (source follower) amplifier

VGS +

_

ID1

ID2

M1 M2

VIA+vin

gmbvbs1

+

-

vin

vgs1 vout

r01

r02 1/gmb

+

-

vin

1/gm1

0201mb1m

1m

in

out

ggggg

vv

+++=

How this is done? Why?

gm1vin

• TAMU-ELEN-474 2009 Jose Silva-Martinez

- 17 -

vgs1

vout

r01 gm1vgs

1

r02

Small signal equivalent circuit

Small signal analysis: Common-gate amplifier (cascode)

gmbvbs1

+

- vin

vout

r01

gm1vin r02 gmbvin

0201

01mb1m

in

out

ggggg

vv

+++

=

ID1

ID1

M1

M2

vout

1 : 1

vin

VIN+vin

Impedance seen at Vin and Vout? Are they relevant?

• TAMU-ELEN-474 2009 Jose Silva-Martinez

- 18 -

Precise Current Mirrors: Cascode structure

_ ID1

ID2

1DS12DS2 VVError

Transistors M1 and M2 are used as current mirrors

Transistors M3 and M4 are used to have VDS1=VDS2.

L1=L2 and ID1=ID2==>1=2

If M1=M2 then 1=2, and VT1=VT2

VGS1

+

_ M1 M2

Error can be reduced if and only 2=1 and VDS2=VDS1

+

_ VGS1

FUNDAMENTAL PRINCIPLE:

M1 AND M2 ARE ACTING AS CURRENT MIRRORS

???

VGS2

+ M3 M4 ID

2

• TAMU-ELEN-474 2009 Jose Silva-Martinez

- 19 -

Output impedance: Cascode structure

OUTPUT IMPEDANCE

D2 iD2

r02

id2

gm4vs4 rs

v02

S4

r04 2

02

dout i

vZ =

( )4s022d

4s4m044s022d

vgivggvvi

==

04024m0402out rrgrrZ ++=

Notice that most of the AC current re-circulate within the cascode device and only id2 is extracted from v02 !! Compare gm4 with g02!

g02 vs4

(neglecting gmb4)

• TAMU-ELEN-474 2009 Jose Silva-Martinez

- 20 -

Comparison of current sources: output impedance and headroom

VGS +

_

ID1

ID2

M1 M2

v02

VGS2

+

_

ID1

ID2

M3 M4

VGS1

+

_ M1 M2

+

_ VGS1

+

_ VDS4

4DSAT1DSAT1T4SATD1GS0

04024mout

VVVVVV

rrgr

++=+>

2SATD0

02out

VV

rr

>

=

~ 100-400 mV ~ 0.9-1.5 V!

~ 100-400 mV ~ 1 - 1.5 V!

• TAMU-ELEN-474 2009 Jose Silva-Martinez

- 21 -

Double Cascode Structure: Advantages and drawbacks!

ID1

ID2

M3

VGS1

+

_ M1 M2

+

_ VDS2

+

_ VDS3

( ) ( )

4320

0403023404314

DSATDSATDS

mmeqmout

VVVV

rrrggrrgr

++>

M4

+

_ VDS4

VG3

VG4

How VG3 and VG4 can be generated????

Output resistance is increased Voltage swing is reduced Parasitic poles could be an issue

Small signal output resistance:

Usually this section is more complex to ensure VDS is similar in both transistors M1 and M2

• TAMU-ELEN-474 2009 Jose Silva-Martinez

- 22 -

Voltage references (biasing cascode structures)

ID1

ID2

M3

VGS1 +

_ M1 M2

+

_ VDS2

+

_ VDS3

VG3

Increasing L/W by 4, VDSAT increases by 2

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