Sam PalermoAnalog & Mixed-Signal Center

Texas A&M University

Lecture 10: Simple OTA

ECEN474/704: (Analog) VLSI Circuit Design Fall 2018

Announcements

• HW2 is due today

• No class on Thursday Mar 8

2

Announcements & Agenda

• Simple OTA Parameters• OTA w/ Cascode Load & Tail Current

Source

• References• Razavi Chapters 4, 6, 9.8-9.11• Sedra/Smith Section 9.5.5

3

OpAmps and OTAs

• High voltage gain• High input impedance• Voltage source output

(low impedance)4

OpAmp OTA

• High “voltage” gain• High input impedance• Current source output

(high impedance)

Operational Transconductance Amplifier

• Important Parameters• Differential Gain• Gain-Bandwidth Product• Common-Mode Input Range• Common-Mode Gain• Common-Mode Rejection

Ratio (CMRR)• Power-Supply Rejection Ratio

(PSRR)• Slew Rate

5

M1 M2Vi+ Vi-

VDD

VSS

Rbias

Itail

M5 M6

M3 M4

CL

Vo

OTA Differential Gain

6

M1 M2Vi+ Vi-

VDD

VSS

Rbias

Itail

M5 M6

M3 M4

CL

Vo

idoutmo

mmmm

idoutm

m

midoutmo

idi

idi

vrgvgggg

vrgggvrgv

vVvV

1

6521

65

12

and design By 22

2 and

2Let

26

11

oo

moutm

id

oDM gg

grgvvA

TAMU-ELEN-474 2009 Jose Silva-Martinez

- 7 -

Frequency Response

id1

IB

M1 M1

v1

id2

ioutid1

0.5gmvd RXCX

Vx

gdndbndgpdbpgspX

mpmpPX

dXX

XmX

CCCfactormillerCCC

ggrrR

VCSRRgV

12

/1/1||||1

5.0

001

Magnitude

gmRX

1/RXCX

VX

Consider node VX

v2

2dv

2dv

TAMU-ELEN-474 2009 Jose Silva-Martinez

- 8 -

Low Frequency Response

0.5gmvd 1/gmp’CX

Vx

gmR0

gmpvx

CO

Vo

-0.5gmvd

Ro

Vout

OPONO RRR

id1

MP

id1

IB

M1 M1

v1

id2

ioutVX

MP’

odmo

mpx

ompxd

mod

mo

Rvgv

gR

RgRvgRvgv

1222

dv2dv

TAMU-ELEN-474 2009 Jose Silva-Martinez

- 9 -

Frequency Response

0.5gmvd 1/gmp’CX

Vx

gmR0

1/R0C0

gmpvx

CO

Vo

-0.5gmvd

Ro

Vout

AV1

AV2

OPONO RRR

id1

MP

id1

IB

M1 M1

v1

id2

ioutVX

MP’

mp

x

mp

x

oo

domo

mp

xoo

domo

oo

omp

mp

x

mpdm

oo

odmo

gCs

gCs

CsRvRgv

gCsCsR

vRgv

CsRRg

gCs

gvgCsR

Rvgv

1

2

11

2

1

111

12

11

1

2122dv

2dv

OTA Gain-Bandwidth Product (GBW)

10

M

mpm

L

oopo

pmpo

oo

mDM

Cg

Cgg

gggA

526

26

1

,

node mirror"" theat and nodeoutput theat

poles 2 have willcircuit The

L

m

L

oo

oo

mpoDMdBDM C

gC

gggg

gAAGBW 126

26

13

dominates and spaced widely are poles the Assuming po

OTA Common-Mode Input Range

11

• Common-mode input range set by transistor saturation conditions• Low-end set by tail current source

saturation1

14

142

Tn

oxn

tail

oxn

tailSSGSDSATSSicm V

LWC

I

LWC

IVVVVV

• High-end set by differential pair saturation

15

5

151 TnTp

oxp

tailDDTGSDDTocmicm VV

LWC

IVVVVVVV

15

5

1

14

2TnTp

oxp

tailDDicmTn

oxn

tail

oxn

tailSS VV

LWC

IVVV

LWC

I

LWC

IV

OTA Common-Mode Gain

12

• Ideally, common-mode perturbations are suppressed by the differential amplifier, i.e. Acm = 0

• Finite common-mode gain exists due to amplifier asymmetries and finite tail current source impedance

• Note transistor numbers are different from previous slides, as I borrow figures from Sedra/Smith text

[Sedra]

OTA Common-Mode Gain

13

[Sedra]

• Modeling the input transistors as a transconductancecurrent source with a parallel output resistance

icm

moSS

oSSicms v

grR

rRvv

11

1

12

2

SSicm

omcm

SS

icmo

RviG

Rvi

21

2

OTA Common-Mode Gain

14

[Sedra]

2222

1111

22

22

21

oSSmoSSo

oSSmoSSo

SSicm

omcm

rRgrRR

rRgrRR

RviG

33144

3313

1

1

mooicmmcmm

mooicmmcmg

grRvGgi

grRvGv

OTA Common-Mode Gain

15

KCL at vo

Since Ro2>>ro4 and Ro1>>ro3 and gm3=gm4

[Sedra]

33144

1

mooicmmcmm g

rRvGgi

3314

24

224

112

0

moom

SS

ooicmo

o

o

o

oicmmcm

grRg

RRr

vv

rv

RvivG

SSmCM

omSS

o

icm

oCM

RgA

rgRr

vvA

3

33

4

21

11

2

OTA Common-Mode Gain & Rejection Ration (CMRR)

16

• To improve (lower) common-mode gain, we need a high tail current impedance

cm

dm

AACMRR 10log20

4621

omCM

ocm rgv

vA

• An amplifier figure-of-merit is the common-mode rejection ratio (CMRR)

4626

11010 2log20log20 om

oo

m

cm

dm rggg

gAACMRR

OTA Power-Supply Rejection Ration (PSRR)

17

SSo

dm10

DDo

dm10

vvAlog20PSRR

vvA

log20PSRR

42

1

42

1

1

oo

m

vdd

oo

mdm

gggPSRR

A

gggA

[Razavi]

OTA Slew Rate

18

[Razavi]

OTA Slew Rate

19

L

SS

CI Rate Slew

[Razavi]

Simple OTA Summary

20

M1 M2Vi+ Vi-

VDD

VSS

Rbias

Itail

M5 M6

M3 M4

CL

Vo

L

tail

L

TAILn

L

m

gs

mg

M

mp

L

oo

pn

TAIL

n

oo

moutmv

pnTAIL

ooout

TAILnmm

CISR

C

ILWKP

CGGBW

Cg

CgC

gg

LW

IKP

gggRGA

Iggg

ILWKPgG

Rate Slew

PoleDominant -Non

PoleDominant

Gain DC

eConductancOutput

ctanceTranscondu

p1

1

6

62

62

1

62

1

62

11

2

2

2

1

6

1

2

612

11382

382

m

m

min

mmon

gg

gkTv

ggkTi

Voltage NoiseInput

Current NoiseOutput

OTA w/ Cascode Load and Tail Current Source

21

19

9

1

146

464921

4649

464649

1

2

21

281081082p1

21810810821

22

Range Mode-CommonInput 2CMRR

21

where2

1Gain Mode-Common

Rate Slew

11 PoleDominant

Gain DC

TnTp

oxp

tailDDicmTn

oxn

tail

oxn

tail

oxn

tailSS

oommom

oommCM

oomooSSSSm

CM

L

tail

L

m

Lo

om

LoLoomooo

omoomooomDM

VV

LWC

IVVV

LWC

I

LWC

I

LWC

IV

rrggrgrrgg

A

rrgrrRRg

A

CISR

Cg

CrrgGBW

CrCrrgrrr

rgrrgrrrgA

M1 M2Vi+ Vi-

VDD

VSS

Rbias

CL

M7

M8

M9 M10

M3

M4

M5 M6

VBN

VBP

Next Time

• Noise

22