Sam PalermoAnalog & Mixed-Signal Center

Texas A&M University

ECEN326: Electronic CircuitsFall 2017

Lab 1 Graphical Design Approach

Common Emitter Amp w/ Emitter Resistor

2

GEeBBin

GEm

LCm

GEe

LCv

RRrRkkRR

RRgRRg

RRrRR

A

11

1

Typical Design Specifications

3

• Loaded voltage gain, Av

• Max output swing, vomax• This must be satisfied at a given linearity

(total harmonic distortion)

• Input resistance, Rin

• Power Supply, VCC

• Min Emitter Voltage for robustness, VE

How to set DC Biasing Conditions?

4

• In order to meet all design specifications, the DC biasing conditions (IC, RC) must be set appropriately

• Can transform design specifications into functions of IC & RC and graph them to find acceptable solution space

Rin, VCC, & Neg. vomax Specifications

5

• Rin Spec

• Input resistance is primarily set by RE||RG

inGE

GEGEeBBin

RRR

RRRRrRkkRR

11

Rin, VCC, & Neg. vomax Specifications

6

• Need a minimum VCE to keep transistor in active mode with maximum negative swing

margin.for 500set togoodoften isit enough, relaxed are specs theif Note*

300Set

min

min

mVV

mVV

CE

CE

mVVvRIVVRIvVVV

EoCCCCCE

CCoCEECC

300maxmin

maxmin

• VCC Spec (w/ max negative swing)

Rin, VCC, & Neg. vomax Specifications

7

• Can solve for IC

C

EoCCC R

VVvVI

3.0max

• Minimum negative AC Swing constraint sets an upper bound on IC

Pos. vomax Specification

8

• Need to insure with a positive swing that the output signal doesn’t clip the power supply

CCoCCCC VvRIV max

• Positive AC Swing constraint sets a lower bound on IC

• Additional linearity constraint (harmonic distortion) generally sets a tighter bound

C

oC R

vI max

Gain Specification

9

• Gain constraint sets a lower bound on IC

invLC

thv

GEvLC

thvC RA

RR

VARRA

RR

VAI

GE

th

C

LCth

C

GEm

LCm

i

ov RR

VI

RRVI

RRgRRg

vvA

11

Harmonic Distortion Specification

10

• Need a minimum amount of bias current to insure that the AC swing doesn’t distort

E

cbebbe

th

CQm

bebebebec

Rffivvvv

V

Iaga

vavavaavi

where Here

... ,21 , where

...

distorts which system a as a Model

221

33

221

*This analysis is for a general CE Amp, in our specific circuit RCRC||RLand RERE||RG

Harmonic Distortion Specification

11

... ,

121 ,

1

* thatshowCan ....

inputour is that because offunction a as express want toWe

3221

33

221

Emth

CQ

Em

m

bbbbc

bc

RgV

Ib

Rgg

b

vbvbvbbvi

vi

CQ

c

Emc I

iRg

ibbHD max

max21

2

11

41

212

is distortion harmonicorder -second The

• For single-ended amplifiers with low-distortion, HD2 will dominate the distortion terms *This analysis is for

a general CE Amp, in our specific circuit RCRC||RLand RERE||RG

Harmonic Distortion Specification

12

221 max

HDRRRvVI

inLC

othC

in

E

EC

othC

Eth

C

C

o

Em

C

o

C

CQEmc

RR

HDRRvV

I

RVIHD

Rv

RgHDR

v

I

IRgHDi

Using

221

24124

124ionspecificat HD2given asatisfy To

max

maxmax

max

• HD2 will dominate, but is not the only distortion term, so you need to use a slightly larger current or put some margin in the HD2 value relative to the THD spec

*This analysis is for a general CE Amp, in our specific circuit RCRC||RLand RERE||RG

Key CE Amp Design Equation Summary

13

221 :Distortion Harmonic

:Gain

:Swing Pos.

3.0 :V Rin, Swing, Neg.

max

max

maxCC

HDRRRvVI

RARR

VAI

RvI

RVVvVI

inLC

othC

invLC

thvC

C

oC

C

EoCCC

Design Example - Specifications

14

• |Av| |-20|

• Rin 10k

• Vomax = 1Vpk w/ THD ≤ 5% (-26.0dB)

• VCC = 5V

• VE ≥ 0.5V

• Isupply ≤ 1.5mA

• Nominal operation at 5kHz

Design Equation Plots

15

• Chosen design point is IC=1mA, RC=3k

Plots done with =150

DC Operating Points

16

• RE is set with VE=IERE

• RG is set as Rin/• DC bias points must be reasonable for the circuit

to work as designed!

AC Gain

17

• |Av| =30.4V/V

Rin

18

• Rin = 11.3k

Distortion

19

New Lab1 Design Specs

20

• |Av| |-15|

• Rin 5k

• Vomax = 1Vpk w/ THD ≤ 5% (-26.0dB)

• VCC = 5V

• VE ≥ 0.5V

• Isupply ≤ 4mA

• Nominal operation at 5kHz