ECEN326: Electronic Circuits Fall 2017spalermo/ecen326/lecture02_ee326_transistor... · ECEN326: Electronic Circuits Fall 2017 ... • Check the updated Lab 1 on website ... and common-collector

Sam PalermoAnalog & Mixed-Signal Center

Texas A&M University

ECEN326: Electronic CircuitsFall 2017

Lecture 2: Transistor Models & Single-Stage Amplifiers

Announcements

• Lab• Lab 1 begins on 9/14• Check the updated Lab 1 on website

• TA Noah Yang’s office hours are on Tuesday 10AM-12PM

• HW1 is posted on the website and due 9/18

2

BJT Circuit Symbols

3

NPN PNP

• BJTs are 3 terminal devices• Collector, Base, & Emitter

• 2 complementary BJT devices: NPN & PNP

MOSFET Circuit Symbols

4

NMOS PMOS

• MOSFETs are 4-terminal devices• Drain, Gate, Source, & Body

• Body terminal generally has small impact in normal operation modes, thus device is generally considered a 3-terminal device• Drain, Gate, and Source are respectively similar to the Collector, Base,

and Emitter of the BJT

• 2 complementary MOSFETS: NMOS, PMOS

NPN “Large-Signal” (DC) Output Characteristic

5

• For analog applications, we generally desire the BJT to operate in the “Active” region

VVV satCECE 3.0,

NPN “Large-Signal” (DC) Model

6

• Exact equation

• However, VBE doesn’t change much over large values of IC. So, for hand calculations we assume a fixed VBE and use the following

NMOS “Large-Signal” (DC) Output Characteristic

7

• For analog applications, we generally desire the MOSFET to operate in the “Saturation” region

tnGSOVDS VVVV

Saturation

NMOS “Large-Signal” (DC) Model

8

Saturation

oxnn Ck ' where

PNP “Large-Signal” (DC) Output Characteristic

9

• Similar operation to NPN transistor, except• IC flows out of the device• Flip the terminal voltages in calculations

• For analog applications, we generally desire the BJT to operate in the “Active” region VVV satECEC 3.0,

PNP “Large-Signal” (DC) Model

10

• Exact equation

• However, VEB doesn’t change much over large values of IC. So, for hand calculations we assume a fixed VEB and use the following

• Similar operation to NMOS transistor, except• ID flows out of the device• Flip the terminal voltages in calculations

• For analog applications, we generally desire the BJT to operate in the “Saturation” region

PMOS “Large-Signal” (DC) Output Characteristic

11tpSGOVSD VVVV

Saturation

PMOS “Large-Signal” (DC) Model

12

Saturation

oxpp Ck ' where

Large-Signal “DC” Response

13

Large-Signal “DC” + Small-Signal “AC” Response

14

• For small-signal analysis, we “linearize” the response about the DC operating point

• If the signal is small enough, linearity holds and the complete response is the summation of the large-signal “DC” response and the small-signal “AC” response

CH5 Bipolar Amplifiers 15

DC Analysis vs. Small-Signal Analysis

First, DC analysis is performed to determine operating point and obtain small-signal parameters.

Second, sources are set to zero and small-signal model is used.

NPN & NMOS Small-Signal T-Models (ro=)

16

Formal PNP & PMOS Small-Signal T-Models (ro=)

17

• While these are the formal models, for both the PNP and PMOS device you can use the exact same model as the NPN and NMOS device• This is easier to remember• Obtained by flipping the current sources in the formal model


Input/Output Impedances

The figure above shows the techniques of measuring input and output impedances.

Small signal analysis is used

x

xx i

VR

BJT Node AC Resistances (ro=)

19

• Using T-model, base AC resistance is the resistors connected from base through the emitter to ground multiplied by (+1)

• If ro is , then collector AC resistance is

• Using T-model, emitter AC resistance is re plus the base resistor divided by (+1)

BJT Amplifiers AC Gain (ro=)

20

CE Amp CC Amp CB Amp CE Amp w/ RE

MOSFET Node AC Resistances (ro=)

21

• Gate input impedance is capacitive, which is assumed to be infinite resistance at low frequencies

• If ro is , then drain AC resistance is

• Using T-model, source AC resistance is the 1/gm resistor

MOSFET Amplifiers AC Gain (ro=)

22

CS Amp CD Amp CG Amp CS Amp w/ RS

NPN Small-Signal Model & Introducing Finite ro

23

PNP Small-Signal Model w/ Finite ro

24

• While this is the formal model, you can use the exact same model as the NPN device• This is easier to remember• Obtained by flipping the small

signal veb and the current source in the formal model

MOSFET – Impact of Body Voltage

• Before we go over the MOSFET -model, lets consider the impact of the 4th terminal, the Body, on the drain current ID

• The MOSFET Vtn is a function of the Body-Source voltage VBS• If the threshold voltage changes, then so does ID

25

[Razavi] DStnGSoxn

D VVVLWCI

12

2

000 22 SBVtnFSBFtntn VVVV

• The small-signal drain current changes with VBS modulation due to changes in Vtn

Body Transconductance, gmb

26

[Razavi]

SBF

m

Qbs

tn

QtnGS

effOX

Qbs

Dmb V

gvVVV

LWC

vig

22*

Effects)g(NeglectinSaturationIn

NMOS Small-Signal Model w/ Finite ro & Body Transconductance gmb

27

000 22 SBVtnFSBFtntn VVVV

SBF V

22 where • Note, gmb is generally a weak effect (~0.1gm).

Thus, we often ignore it.• In problems/assignments I’ll make it clear when

we need to consider it

PMOS Small-Signal Model w/ Finite ro & Body Transconductance gmb

28

000 22

SBVtpFSBFtptp VVVV

SBF V

22 where

• Note, gmb is generally a weak effect (~0.1gm). Thus, we often ignore it.

• In problems/assignments I’ll make it clear when we need to consider it

• While this is the formal model, you can use the exact same model as the NMOS device• This is easier to remember• Obtained by flipping the

small signal vsg and vsb and the current sources in the formal model

• It is often useful to model transistor amplifiers with a Norton-equivalent model consisting of a transconductancecurrent source and parallel output resistance

Two-Port Modeling of Amplifiers

29

Two-Port Modeling – Extracting Gm and Rn

30

• Short the output, apply an input voltage stimulus, and measure output current

• Short the input, apply an output voltage stimulus, and measure current into output node

Two-Port Modeling – Multi-Stage Amplifiers

31


32

• Note, Rn1 also includes the input resistance of Stage 2


33

• Repeat procedure stage by stage


34

• Repeat procedure stage by stage• This procedure will be useful for analyzing multi-stage transistor

amplifiers


35

CE Amp CE Amp w/ RE

Cn

emm

e

CCm

i

o

RRr

gG

rRRg

vv

Cn

EeEm

mm

Ee

C

Em

Cm

i

o

RR

RrRggG

RrR

RgRg

vv

1

1


36

CC Amp CB Amp

Een

em

Ee

E

i

o

RrRr

G

RrR

vv

1

Cn

Bm

m

emitterBem

emitter

C

Bm

Cm

i

o

RR

Rgg

RRrG

RR

RgRg

vv

11

1


37

CS Amp CS Amp w/ RS

Dn

mm

Dmi

o

RRgG

Rgvv

Dn

Sm

mm

Sm

Dm

i

o

RRRg

gG

RgRg

vv

1

1


38

CD Amp CG Amp

Sm

n

mm

Sm

Sm

i

o

Rg

R

gGRg

Rgvv

1

1

Dn

sourcemm

source

DDm

i

o

RRR

gG

RRRg

vv

1

3-Stage BJT Amplifier Example

39

• This multi-stage amplifier consists of common-emitter, common-base, and common-collector amplifier

• The first two common-emitter and common-base stages are commonly used together, and are called a “cascode amplifier”

• The cascode stage provides all the voltage gain of the circuit, while the output common-collector circuit allows driving of a low-resistance load

Cn

EeEm

mm

Ee

C

Em

Cm

i

o

RR

RrRggG

RrR

RgRg

vv

1

1

3-Stage BJT Amplifier Example – 1st Stage Av

40

CE Amp w/ RE

• Using the common-emitter amplifier equations, the gain from the input to VE2 is

GEe

iv

ein

GEeGEm

mm

nmin

ev

RRrRA

rRR

RRrRRggG

RGvvA

1

21

221

11

11

112

1

1

3-Stage BJT Amplifier Example – 2nd Stage Av

41

• Using the common-base amplifier equations, the gain from VE2 to VB3 is

2

32

332

222

2

222

32

1

11

i

LeCv

LeCiCn

mie

m

nme

bv

RRrR

A

RrRRRR

gRr

G

RGvvA

CB Amp

Cn

Bm

m

emitterBem

emitter

C

Bm

Cm

i

o

RR

Rgg

RRrG

RR

RgRg

vv

11

1

3-Stage BJT Amplifier Example – 3rd Stage Av

42

• Using the common-collector amplifier equations, the gain from VB3 to Vout is

Le

Lv

Len

em

nmb

outv

RrRA

RrRr

G

RGvvA

33

33

33

333

3

1

CC Amp

Een

em

Ee

E

i

o

RrRr

G

RrR

vv

1

Le

L

GEe

iC

Le

L

i

iC

GEe

i

vvvin

outtotv

RrR

RRrRR

RrR

RRR

RRrR

AAAvvA

31

3

32

3

1

2

321,

3-Stage BJT Amplifier Example – Total Av

43

• The total gain is equal to the product of the individual stage gains


Amplifier Example I

The keys in solving this problem are recognizing the AC ground between R1 and R2, and Thevenin transformation of the input network

Then the common-emitter amplifer equations can be used

C1 acts as an AC short


Amplifier Example I

11

1 RRRRR

Rvv SThevS

inThev

• Find the input Thevenin equivalent

Ee

C

Em

Cm

i

oRr

RRg

Rgvv

1


Amplifier Example I

• Use the common-emitter amplifier equations CE Amp w/ RE

• As there is a base resistance (RThev), this must be reflected into the emitter by dividing by (+1) to use the derived equation

S

EeS

C

i

oRR

R

RrRR

RRvv

1

1

1

2

1


Amplifier Example II

Again, AC ground/short and Thevenin transformation are needed to transform the complex circuit into a simple stage with emitter degeneration.

Se

S

C

i

oRR

R

RrRR

Rvv

1

1

21

1


Amplifier Example III

The key for solving this problem is first identifying Req, which is the impedance seen at the emitter of Q2 in parallel with the infinite output impedance of an ideal current source

1211

211

12

111

1

RrrRrrRrR

RrR

eeeqein

eeq

11

21

Rrr

Rvv

ee

D

i

o

Next Time

• Differential amplifiers• Razavi Chapter 10

49

Documents

ECEN326: Electronic Circuits Fall 2017spalermo/ecen326/lecture02_ee326_transistor... · ECEN326: Electronic Circuits Fall 2017 ... • Check the updated Lab 1 on website ... and common-collector