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CSC Phase I Upgrade Electronics. ME4/2 upgrade: 72 new large chambers for high-luminosity triggering in h 1.1-1.8 Flash ADC board for cathode digitization ME1/1 to handle high rates ME1/1 to restore trigger and improve reconstruction for h 2.1-2.4 - PowerPoint PPT Presentation
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CMS Forward Muon Discussion Jay Hauser 07 Oct 2009 1/11
CSC Phase I Upgrade Electronics CSC Phase I Upgrade Electronics
• ME4/2 upgrade: 72 new large chambers• for high-luminosity triggering in 1.1-1.8
• Flash ADC board for cathode digitization• ME1/1 to handle high rates • ME1/1 to restore trigger and improve reconstruction for 2.1-2.4
• Upgrade ME1/1 associated TMB and DMB boards• ALCT mezz. upgrade NOT currently part of this plan
CMS Forward Muon Discussion Jay Hauser 07 Oct 2009 2/11
ME4/2 and ME1/1 upgradesME4/2 and ME1/1 upgradesME4/2 and ME1/1 upgradesME4/2 and ME1/1 upgrades
R-Z cross-section
“Empty” YE3 disk ready for ME4/2
CMS Forward Muon Discussion Jay Hauser 07 Oct 2009 3/11
ME4/2 upgrade motivationME4/2 upgrade motivationME4/2 upgrade motivationME4/2 upgrade motivation
• Triggering with & without the ME4/2 upgrade:• The high-luminosity Level 1 trigger threshold is reduced
from 48 18 GeV/c
Target Rate 5 kHz
Ingo Bloch, Norbert Neumeister, Rick Wilkinson
Simulation result (May ’09)(Vadim Khotilovich, Alexei Safonov)
• Efficiency gaps for good quality TF tracks disappear with addition of ME4/2
• ME4/2 will be included by default in 31X
• Back-porting to 22X took a considerable amount of effort– Thanks to the experts:
Rick Wilkinson, Tim Cox, Oana Boeriu and Slava Valuev!
CMS Forward Muon Discussion Jay Hauser 07 Oct 2009 5/11
“Digital CFEB” cathode board“Digital CFEB” cathode board
• CSC principle: digitize cathode charges to ~1%, interpolate for fine position
• Current CFEB: the ADC is multiplexed 16:1• Requires analog charge storage ASIC (SCA)
• Serial digitization after L1A
• Digital CFEB uses Flash ADCs:• Continuous and deadtimeless digitization
SCA
ADC+-ref
16 FPGA12 bits
.
.
.
.
.
.
mux
21 bitsChan-link
21:3
To DMB over Skewclear
280 Mbps6 layers
ADC
+-
ref
16 FPGA
8 pairs
.
.
.
.
.
.
6 layers
SerialOpt. Trnscvr
To DMB over Fiber~1Gbps
MGT ADC
+-
8
8
ref
8 pairs
16 pairsPipeline/FIFOs
Serial LVDS
CMS Forward Muon Discussion Jay Hauser 07 Oct 2009 6/11
ME1/1 Restoration of 2.1-2.4ME1/1 Restoration of 2.1-2.4• High- section of ME1/1
• Cathode strips are currently ganged 3:1
• Plan:• Install DCFEB boards on ME1/1• Move existing CFEBs from ME1/1 to ME4/2• Takes ~2.5 months per endcap• 72 new TMB and DMB boards needed to
accommodate additional inputs, optolinks
66 77
Channel 16
…
ElectronicsChannel 1
… …
Strips: 1 16 17 32 33 48
…
CMS Forward Muon Discussion Jay Hauser 07 Oct 2009 7/11
Overall schedule (if 2011 start)Overall schedule (if 2011 start)
CMS Forward Muon Discussion Jay Hauser 07 Oct 2009 8/11
Cost almost $9M (needs refinement)Cost almost $9M (needs refinement)
item sub-itemtotal cost
(K$)M&S labor
CSC chamber panels979 979
CSC chamber other parts Panels1227 1227
CSC fabrication 2798 2798
Electronics design 310 310
Electronics DCFEB boards 952 952
Electronics other boards cathode front-end board 1185 1185
FAST site assembly and testing FAST site assembly & testing 250 250
cables 625 625
HV system HV system 403 403
Misc. parts 36 36
Installation 50 50
shipping shipping 163 163
Total 8977 5569 3408
CMS Forward Muon Discussion Jay Hauser 07 Oct 2009 9/11
Discussion items for today - IDiscussion items for today - I• DCFEB
• Buckeye-FADC voltage levels – is there a solution? • DCFEB optical links - what are they? What protocol
do they need on the other end (new DMBs and TMBs)? Are they synchronous (for trigger)?
• Any other news on DCFEB? • Plan is to produce the prototype in 2010 some time -
when? • Radiation test ideas?• How crazy to accelerate to 2011 installation (LHC-off
year)?
• ME1/1 DMBs: • What are the plans for prototyping?• Manpower?
CMS Forward Muon Discussion Jay Hauser 07 Oct 2009 10/11
Discussion items for today - IIDiscussion items for today - II
• ME1/1 TMBs: • How to design and build them most effectively?
• New ME1/1 TMBs: what great new FPGA features are out there that we could make use of?
• ALCT mezzanine upgrade:• left out of the Phase 1 plans so far, but…
• NB Easy replacement when ME1/1 CFEBs replaced.
• Could a cheap FPGA upgrade be found?
• Plug for asynchronous trigger at this point?
CMS Forward Muon Discussion Jay Hauser 07 Oct 2009 11/11
Discussion items for today - IIIDiscussion items for today - III
• Preparation for Phase 2: • What will replacement for TTC system mean for
peripheral crates? • We need to make sure new DMBs and TMBs for
ME1/1 are going to be fully compatible.
• Peripheral crate changes?• Do we need to change the meaning of backplane
signals to deal with "independant" inner and outer sections of ME1/1?
• Do we want TMB to send more than 2 LCTs?• What needs to be done so that MPC sends all muons
(no data funnel)?
• What else should we be discussing?
CMS Forward Muon Discussion Jay Hauser 07 Oct 2009 12/11
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