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Dr. J. E. Rayas Sánchez http://iteso.mx/~erayas [email protected] Signal Integrity and High-Speed Interconnects January-May 2006 1 An Introduction to Sonnet Dr. José Ernesto Rayas Sánchez 2 Dr. J.E. Rayas Sánchez Sonnet EM Simulator A 3-D planar EM analysis software Based on the Method of Moments Intended for frequency-domain analysis of planar circuits (microstrip, stripline, PCBs, and integrated circuits) Not intended for completely arbitrary 3-D problems Development started in 1983 by Dr. James C. Rautio Commercial introduction in 1989 www.sonnetusa.com

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Page 1: An Introduction to Sonnet - ITESO - InicioAn Introduction to Sonnet ... The EM analysis starts by automatically subdividing the ... Dr. J.E. Rayas Sánchez 65desi.iteso.mx/erayas/documents/sihsi_

Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

1

An Introduction to Sonnet

Dr. José Ernesto Rayas Sánchez

2Dr. J.E. Rayas Sánchez

Sonnet EM Simulator

A 3-D planar EM analysis software

Based on the Method of Moments

Intended for frequency-domain analysis of planar circuits (microstrip, stripline, PCBs, and integrated circuits)

Not intended for completely arbitrary 3-D problems

Development started in 1983 by Dr. James C. Rautio

Commercial introduction in 1989

www.sonnetusa.com

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

3Dr. J.E. Rayas Sánchez

4Dr. J.E. Rayas Sánchez

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

5Dr. J.E. Rayas Sánchez

Basic Sonnet Tools

‘xgeom’, for drawing the circuit to be analyzed

‘em control’ to launch an analysis with the ‘em’ analysis engine

‘emgraph’ to plot the results

‘emvu’ to view and animate current distributions in both frequency domain and time domain (for a given exciting frequency)

6Dr. J.E. Rayas Sánchez

Decomposition Capabilities

‘em’ includes a net-list based circuit theory analysis that allows complete EM simulations to be included in the net-list

Very useful for breaking a circuit into pieces, having each piece automatically analyzed and then all results automatically connected back together

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

7Dr. J.E. Rayas Sánchez

The Project Editor – Example 1

8Dr. J.E. Rayas Sánchez

The Project Editor – Example 1 (cont)

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

9Dr. J.E. Rayas Sánchez

The Project Editor – Example 1 (cont)

10Dr. J.E. Rayas Sánchez

The Project Editor – Example 1 (cont)

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

11Dr. J.E. Rayas Sánchez

Setting-up the Analysis – Example 1

12Dr. J.E. Rayas Sánchez

Running the Simulation – Example 1

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

13Dr. J.E. Rayas Sánchez

Showing Results – Example 1

14Dr. J.E. Rayas Sánchez

Setting-up the Analysis – Example 1 (cont)

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

15Dr. J.E. Rayas Sánchez

Running the Simulator – Example 1 (cont)

16Dr. J.E. Rayas Sánchez

Showing Results – Example 1 (cont)

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

17Dr. J.E. Rayas Sánchez

Showing Results – Example 1 (cont)

18Dr. J.E. Rayas Sánchez

Current Density Viewer – Example 1 (cont)

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

19Dr. J.E. Rayas Sánchez

Current Density Viewer – Example 1 (cont)

20Dr. J.E. Rayas Sánchez

Current Density Viewer – Example 1 (cont)

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

21Dr. J.E. Rayas Sánchez

Current Density Viewer – Example 1 (cont)

22Dr. J.E. Rayas Sánchez

The Substrate, Subsectioning, and Cell Size

Sonnet encloses the circuit in a metal boxThe substrate covers the bottom area of the boxCell Size, Box Size and Number of Cells in each direction (x or y) are related as

Cell Size × Number of Cells = Box SizeThe EM analysis starts by automatically subdividing the circuit into small rectangular subsectionsSonnet uses variable size subsections (small subsections are used where needed)A Cell is the building block for all subsections, and each subsection is built from one or more cellsTo reduce memory requirements use a cell size as large as possible

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

23Dr. J.E. Rayas Sánchez

The Box and the Substrate

24Dr. J.E. Rayas Sánchez

Subsectioning

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

25Dr. J.E. Rayas Sánchez

Subsectioning (cont)

26Dr. J.E. Rayas Sánchez

Metalization Levels and Dielectric Layers

Sonnet Professional can handle any number of metalizationlevelsMetalization is refered to as “levels” and dielectric as “layers”Each metalization level is sandwiched between two dielectric layers

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

27Dr. J.E. Rayas Sánchez

Example 2: A Double Folded Stub Filter

28Dr. J.E. Rayas Sánchez

Example 2: A Double Folded Stub Filter (cont)

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

29Dr. J.E. Rayas Sánchez

Setting up the Structure – Example 2

30Dr. J.E. Rayas Sánchez

Setting up the Analysis – Example 2

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

31Dr. J.E. Rayas Sánchez

Results – Example 2

32Dr. J.E. Rayas Sánchez

Using Adaptive Frequency Sweep – Example 2

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

33Dr. J.E. Rayas Sánchez

Results – Example 2

34Dr. J.E. Rayas Sánchez

Results – Example 2

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

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Increasing Resolution – Example 2

36Dr. J.E. Rayas Sánchez

Increasing Resolution – Example 2 (cont)

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

37Dr. J.E. Rayas Sánchez

Increasing Resolution – Example 2 (cont)

38Dr. J.E. Rayas Sánchez

Increasing Resolution – Example 2 (cont)

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

39Dr. J.E. Rayas Sánchez

Increasing Resolution – Example 2 (cont)

40Dr. J.E. Rayas Sánchez

Vias

A special kind of subsection which allows current to flow in the z-direction between metals“Ground via” connect metal on the surface of the substrate to the groundplane beneath the substrate“Level-to-level via” connect metalization between any two adjacent levelsThe length of the via is one cell size

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

41Dr. J.E. Rayas Sánchez

Vias (cont)

42Dr. J.E. Rayas Sánchez

An Air Bridge

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Signal Integrity and High-Speed InterconnectsJanuary-May 2006

43Dr. J.E. Rayas Sánchez

Example 3: Square Spiral Inductor

44Dr. J.E. Rayas Sánchez

Setting Up the Structure – Example 3

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

45Dr. J.E. Rayas Sánchez

Square Spiral Inductor – Example 3

46Dr. J.E. Rayas Sánchez

Vias (Lower Level) – Example 3

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

47Dr. J.E. Rayas Sánchez

Vias (Upper Level) – Example 3

48Dr. J.E. Rayas Sánchez

Simulation Time – Example 3

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Signal Integrity and High-Speed InterconnectsJanuary-May 2006

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Results – Example 3

50Dr. J.E. Rayas Sánchez

Lumped Circuit Models for Spiral Inductors

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Signal Integrity and High-Speed InterconnectsJanuary-May 2006

51Dr. J.E. Rayas Sánchez

Example 4

ε r

W1

W2

W0

L1

HL2

W1

L0

L0

Bandstop Microstrip Filter with Quarter-Wave Open Stubs

H = 25 milεr = 9.4 (alumina)W0 = 25 milW1 = 9 milW2 = 19 milL0 = 95 milL1 = 115 milL2 = 114 mil

52Dr. J.E. Rayas Sánchez

Setting-up Structure – Example 4

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Signal Integrity and High-Speed InterconnectsJanuary-May 2006

53Dr. J.E. Rayas Sánchez

Structure – Example 4

54Dr. J.E. Rayas Sánchez

Simulation Time – Example 4

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Signal Integrity and High-Speed InterconnectsJanuary-May 2006

55Dr. J.E. Rayas Sánchez

Results – Example 4

56Dr. J.E. Rayas Sánchez

Current Density – Example 4

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

57Dr. J.E. Rayas Sánchez

Current Density – Example 4 (cont)

58Dr. J.E. Rayas Sánchez

Aplac Model – Example 4

L=L1W=W1

W=W2L=L2

outin

L=L1W=W1

L=L0W=W0

L=L0W=W0

Sweep "S-Parameter Analysis"LOOP 1000 FREQ LIN 5GHz 15GHzgrid

Show Y Mag(S(2,1))EndSweep

L=1milW=W0

L=1milW=W0

MSub Alumina_25milER=9.4H=25mil

Declare iaplacvar W0 25milW1 9milW2 19milL0 95milL1 115mil L2 114mil

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

59Dr. J.E. Rayas Sánchez

Results using Aplac – Example 4

5.000G 7.500G 10.000G 12.500G 15.000G0.00

0.25

0.50

0.75

1.00

S-Parameter AnalysisAplac 7.70 User: Evaluation Customer: ITESO Apr 09 2003

f/HzMag(S(2,1))

60Dr. J.E. Rayas Sánchez

h

w

Characteristic impedance for microstrip transmission lines

(assumes nonmagnetic dielectric)

Example 5: A Simple Microstrip Line

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Dr. J. E. Rayas Sánchezhttp://iteso.mx/~erayas [email protected]

Signal Integrity and High-Speed InterconnectsJanuary-May 2006

61Dr. J.E. Rayas Sánchez

Microstrip Line Set Up – Example 5

62Dr. J.E. Rayas Sánchez

Microstrip Line Set Up (50Ω line) – Example 5

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Signal Integrity and High-Speed InterconnectsJanuary-May 2006

63Dr. J.E. Rayas Sánchez

Terminating Port 2 with 50Ω – Ex. 5

64Dr. J.E. Rayas Sánchez

Terminating Port 2 with 25Ω – Ex. 5

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Signal Integrity and High-Speed InterconnectsJanuary-May 2006

65Dr. J.E. Rayas Sánchez

Terminating Port 2 with an Open Circuit – Ex. 5