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An introduction to SiC power device research in the School of Engineering
Dr Peter Gammon
27th April 2018
Power Electronics
and the legacy of silicon.
MV AC –
HV AC
Conversion
AC-DC
conversion on the
majority of
domestic
appliances.
AC-HVDC
Conversion
HVDC-AC
Conversion
Siemens/TenneT HelWin 2
690 MW Wind Power ≡ 1 Coal powered Station
Energy for around 900,000 homes
Power Conversion
90 % converter efficiency??
= 34% Wasted Energy
(237 MW in German
example)
DC
AC
DC
AC
AC
DC
Power Converter Efficiency
Converter efficiency ∝ device efficiency
An ideal power semiconductor device
On State: RON = 0
VON = Small, positive V
ILimit = ∞
Off State: ROFF = ∞
VBD = ∞
ILeakage = 0
Also: FSW = ∞, PSW,PON,POFF = 0,
TMAX = ∞, £ = 0
Weight, size = 0, MTTF = ∞
RON = 0
VBD = ∞
A real power semiconductor device
On State: RON > 0
VON > 0
ILimit < ∞
Off State: ROFF < ∞
VBD < ∞
ILeakage > 0
Also: FSW < ∞, PSW,PON,POFF > 0,
TMAX < ∞, £ > 0
Weight, size > 0, MTTF < ∞
RON > 0
VBD < ∞
On-Resistance versus Breakdown voltage (Simple Diode)
N+ .N- P+
WD
X [cm]
Ele
ctr
ic F
ield
[V
/cm
]
WD
Emax,Si
OFF-STATE
To maximise breakdown voltage:
𝑉𝐵𝐷 = 𝑊𝐷 𝐸𝑚𝑎𝑥,𝑆𝑖 −𝑊𝐷
𝑞𝑁𝐷2𝜀𝑠
𝑉𝐵𝐷
++−−
Drift doping, 𝑵𝑫, should be minimised
Drift Region width, 𝑾𝑫, should be maximised
On-Resistance versus Breakdown voltage (Simple Diode)
N+ .N- P+
WD
ON-STATE
𝑅𝑂𝑁
−−++
To minimise resistance:
𝑅𝑂𝑁 =𝑊𝐷
𝐴𝑞𝑁𝐷𝜇𝑛
Drift doping, 𝑵𝑫, should be maximised
Drift Region width, 𝑾𝑫, should be minimised
On-Resistance versus Breakdown voltage (MOSFET)
The same situation:
To minimise resistance,
• Drift doping, 𝑵𝑫, should be maximised
• Drift Region width, 𝑾𝑫, should be
minimised
To maximise breakdown voltage,
• Drift doping, 𝑵𝑫, should be minimised
• Drift Region width, 𝑾𝑫, should be
maximised
𝑊𝐷
Unipolar Limit of Silicon
• The trade-off in WD imposes a
material-based limit on all
power devices.
• This unipolar limit of silicon
imposes a minimum RON
achievable at each VBD.
• Bipolar devices cheat this limit
by injecting charge, but suffer
greater switching losses.
Unipolar Limit of Silicon
Silicon Carbide
Efficient. Fast.Hot. Small.
Silicon Carbide• Natural Oxide – SiO2
• Wide Bandgap: 3.26 eV
• High Critical Electric Field: 2.2 MV/cm
• Very high Temp Performance ( potentially > 300 oC )
• 4” Wafer cost > $2-5k
Another way… Introducing the wide bandgap semiconductors
To maximise breakdown voltage:
𝑉𝐵𝐷 = 𝑊𝐷 𝐸𝑚𝑎𝑥,𝑆𝑖𝐶 −𝑊𝐷
𝑞𝑁𝐷2𝜀𝑠
Si SiC GaN
Bandgap, EG (eV) 1.1 3.26 3.45
Critical Electric Field, Emax (MV/cm) 0.25 2.2 3
Thermal Conductivity (W/cmK) 1.5 3.8 1.3
http://www.alpha-powers.com/en/service/silicon-carbide/sic-characteristics
Unipolar Limit of Silicon Carbide
• The increase in critical field
imposes a new unipolar limit.
• Now, much lower RON is
possible at every VBD.
• Fast switching SiC unipolar
devices can now compete with
slow Si bipolar devices.
Unipolar Limit of Silicon Carbide
A brief history of Silicon Carbide
• Until 2002 the SiC material quality
was not good enough for
commercial device manufacture.
• In 2002 SiC Schottky diodes
became commercially available,
• MOSFETs followed in 2011.
• Both are commercially available
from 600-1700 V.
A brief history of Silicon Carbide
http://www.yole.fr/iso_album/illus_sic_marketsize_yole_aug2017.jpg
• Now, the market is growing…
A brief history of Silicon Carbide
• …and the applications are becoming more and more exciting.
http://www.rohm.com/web/global/news-detail?news-title=rohm-supplies-full-sic-power-modules-to-formula-e-racing-team-venturi&defaultGroupId=false
ROHM supplies Full SiC Power Modules to Formula E racing team Venturi
Silicon Carbide: Outstanding Challenges
Several challenges remain before SiC will achieve major market
penetration. These include:
• Long term reliability, particularly in terms of the MOSFET gate.
• Development of high voltage devices (≥3.3 kV), particularly bipolar devices (IGBT,
thyristors). Development of devices for harsh environment.
• Reduction of defects in substrates and epitaxy processes; development of 3C-SiC.
• Scaling up of wafers to ≥200mm diameter; the reduction of substrate/epi cost.
• Industry adoption, achieved through increased case studies, demonstrators, mainstream
articles and reduction in cost.
Silicon Carbide
@ Warwick
Silicon Carbide Projects at Warwick
Developing bipolar SiC devices, such as IGBTs.
Underpinning Power Electronics: Switch Optimisation ThemeEPSRC Project: EP/R00448X/1
Warwick Team: Peter Gammon (PI), Phil Mawby, Tianxiang Dai, Guy Baker.With Cambridge, Newcastle and Coventry Universities
• >15kV SiC IGBTs are being developed for grid
applications.
• Unconventional processing is required to develop
the materials due to no available P+ substrates.
• Only 4 groups worldwide have ever developed
these, none yet in the EU.
• Significant IP generation expected.
Silicon Carbide Projects at Warwick
Improving SiC epitaxial growth processes.
Ultra-high voltage (>30 kV) power devices through superior materialsEPSRC Project: EP/P017363/1
Warwick Team: Vishal Shah (PI), A. Ben Renz.With Dynex Semiconductor and Cambridge Microelectronics
• SiC materials focus: developing >30 kV rated materials
• >30 kV devices (Schottky, PiN, MOSFET) to be developed
with large areas for large current capability.
• Switching efficiency improvements by improving materials
carrier lifetime >10 µs.
• Feeds back into SiC materials
chain, allowing practical mass
production. Industrial exploitation
expected.
Silicon Carbide Projects at Warwick
Improving the long term reliability of SiC power devices.
Underpinning Power Electronics: Reliability and Health ManagementEPSRC Project: EP/R004366/1
Warwick Team: Layi Alatise (PI), Li Ran, Jihong Wang, Jose Ortiz Gonzalez.With Bristol, Newcastle and Nottingham Universities
• Predicting device failure and managing the
remaining usable life of a power converter
• Developing technologies that can improve the
reliability of SiC power devices and monitor their
health on-line
• De-risking SiC uptake in conservative applications:
automotive, traction, aerospace,
and grid connected converters
Silicon Carbide Projects at Warwick
Developing the 3C polytype of SiC.
H2020 Project: 720827 Warwick Team: Mike Jennings (PI), Phil Mawby, Fan Li.
13 Partners in total incl. CNM-IMM, ST Microelectronics and Silvaco
• 3C can be grown directly on Si, lending itself to mass production.
• Its 2.3eV bandgap lends itself to MV applications such as
automotive
• Warwick involved with the design of novel 600-1200V device
architectures.
• Development of Gate Oxide Reliability test methods
Silicon Carbide Projects at Warwick
Developing SiC devices for Space Applications.
Si on SiC for the Harsh Environment of Space (SaSHa)H2020 Project: 687361
Warwick Team: Peter Gammon (PI), Fan Li, Chunwa ChanWith Cambridge Microelectronics, UCL Belgium and Tyndall Ireland
• Si-on-SiC substrates developed to exploit both materials.
• Highly radiation tolerant design.
• Designed for use in Space missions and satellites
• New H2020 grant recently submitted developing all-SiC
power devices for Communication Satellites.
• Potential 15% weight saving using all SiC
power conditioners.
P body
P+ N+
Gate Source
Field Oxide
N drift region (linear-doped)
Semi-insulating 6H-SiC Substrate
Drain
N+
Future Silicon Carbide Projects at Warwick
SiC@
Warwick
2018 on…
Scale it up…
10, 15, 25kV…100, 500, 1000 A…
Send it to Space
High Rad, High Rel
Novel Devices
Bidirectional switch,Circuit breakers
Wireless Power Transfer
Power + GHz
Ga2O3?Diamond?
Al2O3?
Silicon Carbide
On Tour.
£2m Class 1000 cleanroom built in 2010 and
extended in 2013.
• High temperature SiC furnace <1600oC
• Several tube furnaces and RTA annealing
• ICP/RIE Etcher
• TEOS Furnace
• Metal evaporator and sputterer
• Several wet benches
Silicon Carbide Facilities at Warwick
ISO class-8 packaging cleanroom built in 2012.
• ATV SRO-704 Solder reflow / thermal processing /
RTA oven.
• Cammax Precima EDB65 eutectic pick and place
die bonder
• Dage Series 4000 bond tester
• Orthodyne model 20 wire bonder
• Mascoprint S200HFC semi-
• automatic screen printing
Silicon Carbide Facilities at Warwick
State of the art Characterisation Facilities.
• Brand new probe station and parameter analyser capable of
electrical characterisation on-chip and in package:
– up to 10kV/500A
– up to 300°C
• Cryogenic characterisation down to 20 K.
• 20kV Inductive Switching Test Rig
• Power Cycling Test rig
• Physical characterisation in MAS building, including TEM,
AFM, FIB, AFM, XPS, XRD techniques.
Silicon Carbide Facilities at Warwick
Material Growth
UK’s only SiC CVD Reactor installed in 2015.
• Industry standard; Sizes up to 150mm wafer
• Thin , thick and super thick epitaxial layers
• Multilayer (p (Al) and n (N)) in one run
• Reduced pressure process capability
• Hi – temperature robotized handling
• Industry’s shortest heat up / cool down
• Growth rate: up to 90 µm/h
Silicon Carbide Facilities at Warwick
Silicon Carbide
Over and Out.
