Testing and Modeling Electrical Characteristics of Novel Silicon Carbide (SiC… · 2017-04-23 · 210 Testing and Modeling Electrical Characteristics of Novel Silicon Carbide (SiC)

Journal of the Arkansas Academy of Science

Volume 57 Article 33

2003

Testing and Modeling Electrical Characteristics ofNovel Silicon Carbide (SiC) Static InductionTransistors (SITs)Avinash S. KashyapUniversity of Arkansas, Fayetteville

Sharmila D. Mangan LalUniversity of Arkansas, Fayetteville

Ty R. McNuttUniversity of Arkansas, Fayetteville

Alexander B. LostetterUniversity of Arkansas, Fayetteville

H. Alan MantoothUniversity of Arkansas, Fayetteville

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Recommended CitationKashyap, Avinash S.; Mangan Lal, Sharmila D.; McNutt, Ty R.; Lostetter, Alexander B.; and Mantooth, H. Alan (2003) "Testing andModeling Electrical Characteristics of Novel Silicon Carbide (SiC) Static Induction Transistors (SITs)," Journal of the ArkansasAcademy of Science: Vol. 57 , Article 33.Available at: http://scholarworks.uark.edu/jaas/vol57/iss1/33

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Testing and Modeling Electrical Characteristics of Novel SiliconCarbide (SiC) Static Induction Transistors (SITs)

Avinash S. Kashyap, Sharmila D. Magan Lai,Ty R. McNutt, Alexander B.Lostetter and H. Alan Mantooth*

Silicon Carbide Research GroupDepartment of Electrical Engineering

University of Arkansas3217 Bell Engineering Center

Fayetteville, AR 72701

¦"Corresponding Author

Introduction gate resistance (rg) is used for minimum high frequencysignal loss. SITs have high input impedance and are voltage

The static induction transistor (SIT) was invented by controlled devices, and therefore only a low drive power isProfessor Junichi Nishizawa of Tohoku University in 1950. required at the gate. SiC has very high voltage breakdownOne of the main advantages of the SIT device is its high (2MV/cm), thermal conductivity (4.8W/cm-K), andspeed switching characteristics. Since no carriers are saturation velocity (2xlO7 cm/s) compared to Si devices,

injected from the gate, switching can be performed at an Thus, SiC SITs are highly suited for high power applicationsextremely high speed (without storage effects) and a small (Lostetter, 2003).

r -0V + +0V~~*

~O Onmetal

1—

m,, * * ——

HlimJe Ie e

n : : vdsV ?e ee e _|_e e

* |

metal T>

Fig. 1. The SIT operating in a unipolar forward conduction mode.

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Journal of the Arkansas Academy of Science, Vol. 57 [2003], Art. 33

Published by Arkansas Academy of Science, 2003

210

Testing and Modeling Electrical Characteristics of Novel Silicon Carbide (SiC) Static Induction Transistors (SITs)

Fig. 2. The SIT fullypinched-off.

SITs can be defined as a type of v-channel field effecttransistor (FET) in which the distance between the sourceand depletion layer of the drain is so reduced that thenegative feedback of the channel resistance willnot affectthe direct current characteristics. SITs require a negativevoltage signal inorder to turn off since they are normally-ondevices. SiC SITs have potentially important applicationsmainly in the power and aerospace industry due to theirhigh-temperature and high-current handling capabilities(Neudeck et al, 2002).

Operation of SITs.-The SIT can operate as a unipolaror bipolar device. Figure 1 shows the unipolar mode of theSIT. In this mode, the SIT acts as a majority carrier(electrons) device. The electrons are the only means ofcurrent flow. Consider an n-channel device in which thedrain and source are shorted. There is a depletion region inthe gate-source interface and when a voltage is applied

across drain and source, the majority carriers aretransported from source to drain. The depletion regioncontinues to increase in size as the negative voltage isapplied. The channel width is consequently reduced, andthe channel length is increased. This causes the on-resistance to increase as the flow of electrons is restricted.When the reverse voltage is very large, the depletion regiongrows large enough to meet, thereby "pinching off" the flowof current as shown inFig. 2.

Inthe bipolar mode ofoperation, the gate-source regionis forward biased, which has the effect of turning on the p-njunction (a diode) into conduction mode between the p+

and n- region. As a result, holes are injected into the bodyof the device and the channel, reducing the on resistance.Both electrons and holes conduct, resulting in a bipolarmode as seen in Fig. 3. Generally, the unipolar mode isused for high frequency applications whereas the bipolar


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Avinash S. Kashyap, Sharmila D.Magan Lai, Ty R. McNutt, Alexander B. Lostetter and H.Alan Mantooth

IFig. 3. The SIT operating in bipolar mode.

Eodeis utilized for circuits handling high power. The

ason is that, the bipolar mode requires the removal ofinority carriers from the bulk substrate, which takes morene, thus maximum frequency is reduced.

Testing Electrical Characteristics.-- Currently therere no SiC SITs commercially available, however theseomponents are under research and development by several

manufacturers, including Northrop Grumman, Cree,nfineon, and Rockwell. Fortunately, the University of

Arkansas (UA) obtained a few experimental NorthropGrumman static induction transistors and Cree Schottkyiodes. The UA Silicon Carbide group has begun to utilizelese components bybuilding a SiC SIT half-bridge as seen

n Fig. 4.Figure 5illustrates the experimentally obtained turn- On

characteristic curves of one of the SIT devices. These SiCSITs were developed byNorthrop Grumman for use inlowvoltage, high frequency radar applications. Note that in thisfigure the transition region consists of the cut-off area (Off

state) and the activation area. When the drain and sourcejunctions are inversely biased (due to negative gate voltage),the SIT device is off. The SIT is activated when the sourcejunction is forward biased and the drain junction is reversedbiased. The saturation area (On state) takes place when thegate voltage is made positive or zero resulting in both thedrain and source junctions being forward biased (Lostetter,2003).

By using a basic switching circuit (as seen in Fig. 6) theOn characteristic curves of the SIT device are obtained.Note that the driving circuit in Fig. 6 determines theswitching speed of the circuit. RS is the output resistance inthe drive circuit and it is necessary to make RS small inorder to obtain fast switching (Tatsuta et al., 1995).

Using Ohm's Law and the measurement ofVDs vs - IDfor different values of VGS and temperature, the on-resistance can be obtained. For instance, based on the ONcharacteristic curve in Fig. 5, the on-resistance for this SITdevice at room temperature willbe 2Q. Theoretically, the

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Powertrace

Northrop GrummanSiC SIT

coupling cap

die diode

Fig. 4. SiC SIT Half-Bridge (500 Watts).

SIT #1203 Device ResultsSIT #1203 I-V Characteristic Curve

boundary | y^-W Vfrs=-3V \6s^-2V Vfrs=- 1V V^-(W \£s= 1V •Vfes=2V \^s=3 V|

Fig. 5. SIT #1203 IVONcharacteristic curve

on resistance willgo down as temperature increases becauseof the negative current/temperature characteristics.

potential change of Vps and Vq§.

The voltage amplification ratio (u) is the ratio of the


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Avinash S. Kashyap, Sharmila D.Magan Lai, Ty R. McNutt, Alexander B. Lostetter and H. Alan Mantooth

Fig. 6. Basic Switching Circuit used to find the ON resistance of the SIT.

Another basic circuit, as seen in Fig. 7, is underonstruction in order to determine the mutual

ransconductance of the SIT device. The drain current,IDi,

an be obtained when Switch 1 is placed at Position 1, andSwitch 2 is placed inPosition 2;1^2 is obtained when Switch

is placed at Position 2,and Switch 2 is placed at Position 1.he mutual transconductance can then be found bypplying the measured values of IDj and ID2 into thebllowing formula:

!di'!d2AVGS

The SIT's response time (that is, delay time, rise time,torage time, and fall time) can be obtained by examiningle measured input current and voltage versus the output,'he delayed time is the timerequired for the output to reach0% of the maximum amplitude starting at the time of thepplication of the input pulse. The rise time is the timeequired for the output to go from 10% to 90% of the

maximum amplitude. The storage time is the time requiredor the output to decrease to 90% of the maximummplitude after the input pulse disappears. Finally, the fallme is the time required for the output to decrease from0% to 10% of the maximum amplitude.

tModeling Characteristics.-Given the increasing

mlarity of SiC devices, compact circuit simulationdels are in great demand so that commercial simulators

include them in their model libraries. The MSCAD

Laboratory at the University of Arkansas uses the MASTHardware Description Language (HDL) (Vlach., 1992) tomodel these devices. MAST is a flexible language that canbe used to generate excellent behavioral models. The modelparameters and means of extraction for the SiC SITs havebeen identified (Scozzie et al., 1994). As stated previously,some of the primary electrical parameters aretransconductance (gm), the drain/source saturation current(IDSs)> the threshold voltage (VJ, the lumped resistanceparameter (rs), gate-source junction capacitance at zero bias(cgs), and gate-drain junction capacitance at zero bias (cgd).The term gm is defined as the maximum transconductanceat zero gate voltage and uses a value of Irjss that is theaverage of the current in the saturation region of the devicefor zero gate voltage. Figure 8 shows the equivalent circuitfor the SIT model that can be used for analyses. Vt wasextracted from the data using the square-root of the ID VS.Vq§ curve, inwhich the slope of the curve is extrapolated tothe x-axis, and Vt is defined as the intercept. Vt is theexternally applied voltage to achieve pinch-off. The lumpedresistance parameter (rs) will be modeled using theEMPEROR technique (Wen et al., 1992). The characteristicequations that are used to model the SIT are as follows:Cut-offregion (VGS-Vto

<0) :id= 0

Linear region (0<VDS<VGS -Vto):id =gmiVDS*[2(VGS-

vto)-vDS]Saturation region (0< VGS-Vto <VDS):id =gms

* [VGS-Vto]2 *[1+ CVDS]


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Fig. 7. Basic switching circuit used to find the mutual transconductance of the SIT.

Fig. 8. Equivalent circuit for the SIT model.


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Avinash S. Kashyap, Sharmila D. Magan Lai,Ty R. McNutt, Alexander B.Lostetter and H.Alan Mantooth

where £ is the pinch-off parameter that has been introducedin the model, for modeling the the SIT pinch-off effect. Thetransconductance of the SITs varies at the active and thesaturation regions. These parameters and their extractionaid in making a robust model that can be used extensivelyn simulators. Temperature dependent modeling is alsoneeded, since the SITs operate at high temperaturestheoretically up to 600°C). Repeated testing of the SITs at

oom temperature has already been performed at theVISCAD Laboratory. High-temperature study will be

carried out at the HiDEC facility. The models willthen bevalidated with actual device measurements with the SITsprovided by the UA collaborators.

Conclusions

Currently, the SiC research that is being performed byleUA is increasingly demonstrating the versatility of these

wide band gap devices. Before SiC SITs can beommercially launched, issues such as modeling and devicejhysics need to be demonstrated. The characterizationtudy currently under investigation has shown the excellent>ower density handling capabilities of these devices. The

model of the SIT under development willbe a very usefulool for power electronic circuitdesigners.

Literature Cited

.ostetter, A.B. 2003. The design, fabrication and analysisof half-bridge multichip power modules (MCPM)utilizing advanced laminate, silicon carbide anddiamond-like carbon technologies. Published by Univ.Arkansas. Ph.D. Dissertation. Univ. Arkansas,Fayetteville. 450 pp.

Neudeck, P. G., Liang-Yu Chen., and R. S. Okojie. 2002.High-temperature electronics -

a role for wide bandgapsemiconductors? Proc. IEEE, 90:1065 -1076

Scozzie C. J., C. W. Tipton, W. MDeLancey, J. M.McGarrity, and F. B. McLean. 1994. Hightemperature stressing ofSiCJFETs at 3000C, ReliabilityPhysics Symp. 32:351-358.

Tatsuta M.,E. Yamanaka, and J. Nishizawa. 1995. Highfrequency - High Power Static Induction Transistor,IEEE Industry Applications Magazine l(2):40-45.

rch, M. 1991. Analogy Inc. Application Notes-ModelFundamentals. Analogy Inc. Beaverton, OR. 346 pp.

Wen C. S., M.Guldahl, L.P. Sadwick, R. Kent, and H.Gaffur. 1992. Measurement and parameter extractionofsub-micron VLSIMOSFET test structures. Proc. Int.Conf. Microelectronic Test Structures 5:196-201


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Testing and Modeling Electrical Characteristics of Novel Silicon Carbide (SiC… · 2017-04-23 · 210 Testing and Modeling Electrical Characteristics of Novel Silicon Carbide (SiC)