View
68
Download
5
Category
Preview:
Citation preview
CNU EE 10.2-1
Microelectronic Circuits II
Ch 10 : Operational-Amplifier Circuits
10.3 The 741 OP-Amp circuit10.4 DC Analysis of the 74110.5 Small-Signal Analysis of the 74110.6 Gain, Frequency Response, and Slew rate of the 741
CNU EE 10.2-2
§BJT op amps à 741 op-amp- a large number of transistor, relatively few resistors & only one capacitor à IC design philosophy foreconomics (silicon area, ease of fabrication, quality of realizable components) of the fabrication on IC- Two power supplies : VCC = VEE = 15V - No circuit node is connected to ground, the common terminal of the two supplies
§741 op-amp : identification of its recognizable parts and their function- Bias circuit- Short-circuit protection circuitry- The input stage à input differential stage- The second stage à intermediate single-ended high-gain stage- The output stage à output-buffering stage- Device parameters
1) for standard npn and pnp transistors :npn : IS =10-14A, b=200, VA=125Vpnp : IS =10-14A, b=50, VA=50V
2) Q13 is equivalent to two transistors, Q13A & Q13B, with parallel base-emitter junctions and havingthe following saturation currents :
ISA=0.25x10-14A ISB=0.75x10-14A3) Q14 & Q20 (output transistor) have an area three times that of a standard device.4) Output transistors have relatively large areas à supply large load current & dissipate relatively
large amount of power with only a moderate increase in device temperature
741 OP-Amp Circuit
CNU EE 10.2-3
742 OP-Amp Circuit
Q11, Q12, R5 : reference bias current IREF; Q10, Q9 , Q8 bias input stage; Q1 ~ Q7 : input stage; Q16 , Q17 : 2nd
gain stage (Q13B : active load); Q14 , Q20 : class AB output stage (Q13A, Q18 , Q19 : bias, , Q23 : input buffer); Q15, Q21, Q24, Q22 : protect amplifier against output short circuits & are normally cut off
CNU EE 10.2-4
Q11, Q12, R5 generates reference bias current IREF; Q11, Q10, R4 à Widlar current source; Q8, Q9 : biasQ12, Q13 : two-output current mirror à Q13B biases Q17 & Q13A biases output stageQ18, Q19 for dc bias à establishes two VBE drops between the bases of the output transistor Q14, Q20
Bias Circuit
CNU EE 10.2-5
741 OP-Amp Circuit
Input stage Second stage Output stage
Short-circuit protection
Bias circuit
CNU EE 10.2-6
Input Stage, Second Stage§Input stage- Input stage : Q1 ~ Q7 (biased by Q8, Q9, Q10 )- Q1, Q2 : emitter follower (CC) for high input resistance & delivering differential input signal to differential
common-base (CB) amplifier formed by Q3, Q4 à differential CC-CB configuration- Q5, Q6, Q7 & R1, R2, R3 : current-mirror load circuit à high-resistance load & conversion of signal from
differential to single-ended form with no loss in gain or common-mode rejection- Output of the input stage is taken single-endedly at the collector of Q6- Lateral pnp transistor Q3, Q4 : 1) Level shifter whose function is to shift the dc level of the signal so that the signal at the op-amp output
can swing positive and negative,2) Protection of the input-stage transistors Q1, Q2 against emitter-base junction breakdown (emitter-base
junction breakdown of an npn transistor : 7V of reverse voltage, pnp transistor à 50V)
§Second stage- Second or intermediate stage : Q16, Q17, Q13B & R8, R9- Q16 : emitter follower à high input resistance à minimize the loading on the input stage & avoids loss of
gain- Q17 : common-emitter amplifier with a 100-W resistor in the emitter à load = high output resistance of the
pnp current source Q13B // input resistance of the output stage (seen looking into the base of Q23)- Output of the 2nd stage = Collector of Q17 :: Capacitor CC in the feedback path à freq. compensation using
the Miller compensation technique à dominant pole at about 4 Hz à pole splitting àuniform -20-dB/decade gain rolloff within a unity-gain bandwidth of about 1 MHz
CNU EE 10.2-7
Output Stage- Purpose of the output stage
1) low output resistance2) supply relatively large load currents without dissipating an unduly large amount of power in the IC
à class AB output stage in op-amp 741§Class A output stage (a)- Emitter follower biased with a constant-current source I- Emitter follower transistor conducts at all times, and thus low output resistance à bias current I > largest
magnitude of load current iL à large power dissipation in the transistor§Class B output stage (b)- Transistor turns on only when an input signal is applied à npn source output current & pnp sink the current- Both transistors are cut off when vI=0 == biased at a zero dc current à efficient in terms of power
dissipation but output-signal distortion- If |vI|<0.5V, vO=0 à crossover distortion
CNU EE 10.2-8
Output Stage§Class AB output stage (d)- Crossover distortion is reduced by biasing the output-stage transistor at a low current à QN & QP remain
conducting when vI is small- As vI increase, one of the two transistors conducts more, while the other shut off à class B operation- Two diode-connected transistors Q1 & Q2 with junction areas much smaller than QN & QP- Output stage of 741 = complementary pair Q14 & Q20
1) Q18 & Q19 are fed by current source Q13A & bias the output transistor Q14 & Q20
2) Q23 = emitter follower à minimize the loading effect of the output stage on the second stage
CNU EE 10.2-9
§DC analysis of 741 - determine the bias point of each device à input terminals are grounded
§Reference bias current IREF
For VCC=VEE=15V and VBE11=VBE12~0.7V à IREF=0.73mA
§Input-stage bias- Widlar current source : Q11 is biased by IREF &
the voltage of Q11 bias Q10 w/ series emitter resistance R4- Assume large b
- Assume IS10=IS11 à IC10=19 mA
DC Analysis of the 741
12 11REF
5
V V V ( V )CC EB BE EEIR
- - - -=
41010
4101011 ln RIIIVRIVV C
C
REFTCBEBE ==- >
+VBE11
-
+VBE10 -
101011
10
1010
1111
101011
lnlnln
1011
C
REFTBEBE
S
CTBE
S
REFTBE
VV
SCV
V
SREF
IIVVV
IIVV
IIVV
eIIeIIfrom T
BE
T
BE
=-==
==
R4=5kW
CNU EE 10.2-10
§Input Stage- From symmetry, IC1=IC2=I - If npn b is high, then IE3=IE4~I=9.5mA- Base currents of Q3, Q4 are equal, with I/(bp+1)~I/bp
- Current mirror by Q8, Q9 is fed by 2I
102 CII »
Q1 through Q4, Q8 & Q9 forms a negativefeedback loop à stabilize the value of I atapproximately IC10/2.Current in Q1 & Q2 à current pulled fromQ8 à output current of Q8 - Q9 currentmirror à IC10 remains constant à nodeX forces the combined base current of Q3 &Q4 à emitter currents of Q1 & Q2 , thuscollector currents of Q1 & Q2Negative feedback stabilizes the value of I
For 741, IC10=19mA à I~9.5mA
If bp>>1,
Input-stage Bias
pC
IIb/21
29 +=
AIIII CCCC m5.94321 ==»=
IC10=19 mA
CNU EE 10.2-11
§Remainder of input Stage- If base current of Q16 is neglected, IC6~I - If base current of Q7 is neglected, IC5~I - VBE6 by using the transistor exponential
relationship
- Bias currents of Q7 :
- IC7 =10.5 mA à base current of Q7 (~ 0.05mA) is indeed negligible in comparison tothe value of I
AR
IRVIII BE
NEC m
b5.102
3
2677 =
++=»
)5.9,10(
517ln
14
6
AIAI
mVIIVV
S
STBE
m==
==
-
Input-stage Bias
CNU EE 10.2-12
Neglect IB of Q23 à IC of Q17 ~ current supplied by current source Q13B & IC13B~0.75IREF à IC13B~550mA, IC17~550mA (IREF=0.73mA)
VBE of Q17 :
IC of Q16 :
IC16 =16.2 mA à base current of Q16 (~0.08 mA) is indeed negligible compared tothe input-stage bias I
Second-stage Bias
mVI
IVVS
CTBE 618ln 17
17 ==
9
17817171616 R
VRIIII BEEBEC
++=»
CNU EE 10.2-13
- Q13A delivers a current of 0.25 IREF, (IS of Q13A is 0.25 times the IS of Q12) to Q18, Q19, R10
- Neglect the base current of Q14, Q20 à emittercurrent of Q23 ~ 0.25 IREF (IREF=0.73mA)à IC23~IE23~0.25IREF=180mAà IB of Q23 =180/50=3.6mAà negligible to IC17
- Assuming VBE18 = 0.6V, then IR10=15mA à IE18 =180-15=165mA & IC18~IE18=165mA(VBE18=588mV)IB of Q18 =165/200=0.8mA à IC19~IE19=15.8mA
- Voltage drop VBB by Q18, Q19 : VBB=VBE18+VBE19=588+530=1.118V
- Since VBB appears across the series-combination of the B-E junction of Q14, Q20
By using VBB & IS14=IS20=3x10-14A IC14=IC20=154mA
Bias current of the class AB output stage is small
Output-stage Bias
mVI
IVVS
CTBE 530ln 19
19 ==
20
20
14
14 lnlnS
CT
S
CTBB I
IVIIVV +=
+
VBB
-
CNU EE 10.2-14
§Summary (Table 9.1)
DC Analysis of the 741
- Device parameters1) for standard npn and pnp transistors :
npn : IS =10-14A, b=200, VA=125V pnp : IS =10-14A, b=50, VA=50V2) Q13 is equivalent to two transistors, Q13A & Q13B, with parallel base-emitter junctions and having
the following saturation currents :ISA=0.25x10-14A ISB=0.75x10-14A
3) Q14 & Q20 have an area three times that of a standard device.4) Output transistors have relatively large areas à supply large load current & dissipate relatively
large amount of power with only a moderate increase in device temperature
CNU EE 10.2-15
§Input Stage (Input resistance)- 741 input stage for small-signal analysis- Collectors of Q1 & Q2 are connected to a constant
dc voltage à grounded- Constant current biasing of the bases of Q3 & Q4
à open-circuited common base terminal - Differential signal vi appears across four equal
emitter resistances connected in series (Q1 ~ Q4 )
re : emitter resistance of Q1 ~ Q4
- Q1 ~ Q4 supplies the load circuit with a pair of complementary current signals aie
- Input differential input resistance of the op-amp :
Small-Signal Analysis of 741
e
ie r
vi4
=
)200(1.2)1(4 =W=+= NeNid MrR bb
W=== kA
mVI
Vr Te 63.2
5.925
m
CNU EE 10.2-16
§Input Stage (load circuit fed with the complementary pair of current signals)- Neglect the signal current in the base of Q7 à collector signal current of Q5 ~ aie
- Q5 & Q6 are identical & bases are tied together, and equal resistances in emitters à collector signalcurrents must be equal à collector signal current of Q6 ~ aie à load circuit = current mirror
- Output current io = 2aie == factor of 2 à conversion from differential to single-ended is performedwithout losing half the signal by the use of current mirror
- Transconductanceof input stage, Gm1 :
Small-Signal Analysis of 741
2)1,63.2(/26.5/1
242 1
11m
meeee
e
i
om
gGkrVmArir
iviG =»W===== >aaa
( )
11
1
+=
-=
+=
===
===
==
bba
aab
b
bb
aa
p
p
e
mC
T
B
T
mC
T
E
Te
C
Ao
T
Cm
rrgI
VIVr
gIV
IVr
IV
rVIg
CNU EE 10.2-17
§Input Stage (output resistance Ro1)- Resistance seen “looking back” into the collector terminal of Q6 = output resistance of the current source
supplying the signal current aie || output resistance of Q6
- Ro4 (a): Resistance looking into the collector of Q4 :: common bases of Q3 & Q4 are at a virtual ground when the input signal vi is applied in a complementary fashion à Assuming that base of Q4 is at virtualground, Ro4 is the output resistance of a common-base transistor w/ a resistance (re of Q2) in its emitter
- Ro6 (b): Resistance looking into the collector of Q6 :: assume that the signal voltage at the base is smallenough to make the base grounded à RE=R2, thus Ro6~18.2MWà Ro1=Ro4||Ro6=6.7MW
Small-Signal Analysis of 741
)5.9,50,26.5/,63.2(5.10)]//(1[ AIVVMIVrkrRMrRgrR AAoeEEmoo mp ==W==W==W=+=
Small-signal equivalent circuit for the input stage of the 741 op amp
CNU EE 10.2-18
§Input Stage (output resistance Ro1)- Ro4 (a): Resistance looking into the collector of Q4 ::
Small-Signal Analysis of 741
W=+= MrRgrR Emoo 5.10)]//(1[ p
( ) ( ) ( )
( ) ( )( ) ( )( )( )( )
( )( ) ( ) 1||sin||||
||1||||
||||
2122122
21222
212222122212
21222212
>>»+»
++=++=
+-==-=
pp
p
ppp
pppp
rrgcerrrgrrrgr
rrrgrrrrgrrrR
rrirvgivrrivivR
omoom
oomo
oomooomooo
oxomxxoxx
xo
CNU EE 10.2-19
§Second Stage (Input resistance Ri2)- Input resistance Ri2
§Second Stage (Transconductance)- Transconductance Gm2 = ratio of the short-circuit
output current to the input voltage- Short-circuiting the output terminal to ground
1) signal current through Ro of Q13B = 0 2) output short-circuit current = ic17
Small-Signal Analysis of 741
W»++++= MRrRrR eei 4)])(1//()[1( 81717916162 bb
VmAviG
RrRrRR
RRvv
Rrvi
i
cm
ei
ei
iib
e
bc
/5.6
))(1()//(
)//(
2
172
8171717
16179
179217
817
1717
==
++=+
=
+=
b
a
small-signal equivalent circuit model of the second stage
CNU EE 10.2-20
§Second Stage (Output resistance Ro2 of the second stage)- Ground the input terminal and find the resistance looking back into the output terminal
- Ro13B : Resistance looking into the collector of Q13B while its base and emitter are connected to ground
- Ro17 : Resistance seen looking into the collector of Q17 :: assume that the resistance between the base ofQ17 and ground is relatively small enough to assume that the base is grounded à Ro17~787kW
à Ro2=Ro13B||Ro17=81kW§Second Stage (Thevenin Equivalent Circuit)- The second-stage open-circuit voltage gain = -Gm2Ro2
Small-Signal Analysis of 741
Definition of Ro17
)//( 17132 oBoo RRR =
W== krR BoBo 9.901313
Thevenin form of the small-signal model of the second stage
)]//(1[ 817 prRgrR moo +=
CNU EE 10.2-21
§Output stage- Output stage (AB class) w/o short-circuit-
protection circuitry- Q18, Q19, R10 : bias the output transistors
Q14, Q20 at a low current (0.15mA)- Output stage is driven by an emitterfollower Q23 à added buffering makes theop-amp gain almost independent of theparameters of the output transistors
§Output voltage limit- Maximum positive output voltage limited
by the saturation of current-sourceTransistor Q13A ~ 1V below VCC
- Minimum (negative) output voltage limitedby the saturation of Q17 ~ 1.5V above –VEE
Small-Signal Analysis of 741
2023min EBEBCEsatEEO VVVVv +++-=Output of 2nd stage
14max BECEsatCCO VVVv --=
CNU EE 10.2-22
§Output Stage (Small-Signal Model)- vo2 : open-circuit output voltage of the 2nd stage- Rin3 : input resistance of the output stage determined with the amplifier loaded with RL
1) assume Q20 is conducting 5mA à Rin looking into B of Q20 ~ b20RL = 100kW (b20=50, RL=2kW)2) Ro of Q13A (ro13A~280kW) + R of Q18-Q19(~160W) à total R in E of Q23 ~ 100kW//280kW=74kW3) Rin3 ~ b23 x 74kW = 3.7MW (b23=50) à Rin3 >> Ro2 (=81kW)à little effect of Rin3 on performance of
op amp
- open-circuit overall voltage gain, Gvo3 : gain of emitter-follower output transistor (Q14 or Q20) ~ 1 &gain of Q23 ~ 1 à
Small-Signal Analysis of 741
)81,/5.6( 222222 W==-= kRVmAGvRGv omiomo
VVRR
RRGvv
vv
vvA
oin
inom
o
i
i
o
i
i /51523
322
2
3
2
2
2
32 -=
+-==º
Model of the 741 output stage
12
3 »=¥=LRo
ovo v
vG
CNU EE 10.2-23
§Output resistance of op amp, Rout- Input source feeding the output stage is
grounded (Ro2: Ro of 2nd stage)- Assume vo < 0 à Q20 is conducting most of
the current; Q14 is eliminated- Resistance seen looking into E of Q23
- ro13A (~0.28MW) >> Ro23 à effectiveresistance between the base of Q20 andground ~ Ro23
- Output resistance Rout :
- Add R7 (27W) for short-circuit protection àoutput resistance of the 741 = 75 W
Small-Signal Analysis of 741
W=++
= krRR eo
o 73.11 23
23
223 b
W=+=++
= 395341 20
20
23e
oout rRR
b
CNU EE 10.2-24
§Output Short-Circuit Protection- Limit the current in the output transistors in
the event of a short circuit- R6 & Q15 limits the current flowing out ofQ14 in a short-circuit : if current in E ofQ14 > 20mA à voltage drop across R6 > 540mV à Q15 turns on à Collector of Q15 robssome of the current supplied by Q13A à
reduce the base current of Q14
- This mechanism limits the maximumcurrent that the op amp can source (i.e.,supply from the output terminal in theoutward direction) to about 20mA
- R7, Q21, Q24 & Q22 limit the maximumcurrent that op amp can sink à the currentin the inward direction is limited to about20mA
Output Short-Circuit Protection
CNU EE 10.2-25
§Small-Signal Gain- Cascade of the equivalent circuits of the three stages for the evaluation of the overall voltage gain
(RL=2kW)
- Overall open-circuit voltage gain, Ao :
Gain, Frequency Response & Slew rate of 741
outL
Lvoomiom
o
o
i
o
i
i
i
o
RRRGRGRRG
vv
vv
vv
vv
+--== 322211
22
22 ))(//(
dBVVvvA
i
oo 7.107/147,24397.0)5.526(1.476 º=´-´-=º
§Frequency Response- 741 = internally compensated op amp by 30-pF capacitor (CC) connected in the negative feedback path of
the 2nd stage à Miller compensation technique à dominant low-frequency pole- Effective capacitance due to CC between B of Q16 and ground by using Miller’s theorem
- Total resistance between this node and ground : 515480,15|)|1( 22 -==+= AwherepFACC Cin
W=WW== MMMRRR iot 5.2)4//7.6()//( 21
CNU EE 10.2-26
§Frequency Response- Frequency fP at the dominant pole
- Miller compensation à pole splitting à all nondominant pole are at very high frequency & f3dB= fP
- unity-gain bandwidth ft :- Phase shift at ft = -90°à phase margin = 90° , in practice about 80° due to the nondominant poles
Gain, Frequency Response & Slew rate of 741
HzRC
ftin
P 1.42
1==
p
MHzfAf dBot 11.4147,2433 »´==
CNU EE 10.2-27
§A Simplified Model- high-gain second stage with its feedback capacitance CC à ideal integrator (gain is sufficiently high &
virtual ground at its input)- Output stage à ideal unity-gain follower
- unity-gain frequency at w=wt :
- The model is valid only at f >> f3dB à integrator with a slope of -20dB/decade
Gain, Frequency Response & Slew rate of 741
C
m
C
m
i
o
CjGjA
sCG
sVsVsA
ww 11 )(
)()()( ==º >
)30,/26.5/1(12 1
1 pFCVmAGMHzfCG
Cmt
tC
mt ==»==
pw
w >
A simple model for the 741 based on modeling the second stage as an integrator
CNU EE 10.2-28
§Slew rateUnity-gain follower with a step of 10V applied at the inputBecause of the amplifier dynamics, its output will not change in zero time à entire value of the step will appear as a differential signal between the two input terminals à overdriven input stage à Q2 & Q4 will be cut off & Q1 & Q3 will conduct all the available bias current (2I) à current mirror Q5, Q6, & Q7 will still function à Q6 will produce a collector current of 2I à Q6 will sink a current 2I that will be pulled from CC
A unit-gain follower with a large step input.Since the output voltage can not changeimmediately, a large differential voltageappears between the op-amp input terminals
Gain, Frequency Response & Slew rate of 741
CNU EE 10.2-29
§Slew rate
Since VOV will be two to three times the value of 4VT, a two-stage CMOS op amp with an ft equal to that of the 741 exhibits a slew rate that is two to three times as large as that of the 741
- Model of the 741 op-amp when a large differentialvoltage is applied
- Model of 2nd stage = ideal integrator- Q6 will sink a current 2I that will be pulled from CC- Output voltage will be a ramp with a slope of 2I/CC,
and slew rate, SR :
for the 741, I=9.5mA & CC=30pF à SR=0.63V/ms
§Relation between SR and ft
sVSRVIggGfromV
gI
GISR
Tm
mmtTt
mt
m
mp
www
63.010210254
,2
442
63
11
111
=´´´´=
=====
-
Gain, Frequency Response & Slew rate of 741
( )CC
O CISRt
CItv 22
==
ampopCMOSstagetwoforVSR tOV -= w
Recommended