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_ RELEASE NOTES winIDEA 2012 / 9.12 iSYSTEM, January 2017 1/167 9.12.1 (18.1.2012) CPU Support Renesas 78k RL78 Family On-Chip-Debug support Full debug feature set for G13 and F12 lines is supported on iC5000 platform. isystem.connect Profiler controller classes CProfilerController2 and CProfilerData2 classes provide access to profiler configuration and recorded data access. For more information see Help/SDK/isystem.connect.

winIDEA 9.12 Release Notes

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RELEASE NOTES

winIDEA 2012 / 9.12

iSYSTEM, January 2017 1/167

9.12.1 (18.1.2012)

CPU Support

Renesas 78k

RL78 Family On-Chip-Debug support

Full debug feature set for G13 and F12 lines is supported on iC5000 platform.

isystem.connect

Profiler controller classes

CProfilerController2 and CProfilerData2 classes provide access to profiler configuration and recorded data access.

For more information see Help/SDK/isystem.connect.

iSYSTEM, January 2017 2/167

9.12.2 (31.1.2012)

CPU Support

MPC 5xxx

MPC5676R Cobra Support

Full debug and trace feature set for MPC and eTPU cores.

Preliminary support for dual eDMA trace.

winIDEA

Analyzer

Bookmarks

Any number of bookmarks can be set in the trace and timeline views using the Ctrl+F2 shortcut. The F2 shortcut moves from one

bookmark to another.

Watch window

Expanded watch structure

Watch window retains expanded structure of a complex type even if the expression goes out of scope.

iSYSTEM, January 2017 3/167

When out of scope, the structure is retained, but Value reflects

Note: If the expression is changed or the expression can evaluate to a different type in a changed context, the structure is collapsed.

Binary constants

Binary constants of the form <digits>b are recognized.

e.g. 100b == 4

This format should be used if one intends to modify binary values in the watch window. Other binary display formats cannot be used

to modify the value.

iSYSTEM, January 2017 4/167

isystem.connect

Hot attach/detach capability

IConnectDebug::RunControl provides means to hot-attach the target.

CExecutionController::hotAttach() and hotDetach() can be used from scripts.

Refer to online SDK help for more information.

iSYSTEM, January 2017 5/167

9.12.3 (3.2.2012)

CPU Support

MPC 5xxx

MPC5676R Cobra Support

Dual eDMA trace support.

winIDEA

Analyzer

Profiler XML Export can generate binary timeline file, which is more compact and faster to generate and parse.

XML node indenting is now optional. Indenting can increase file size by up to 15% but yields no benefits for automatic parsers.

iSYSTEM, January 2017 6/167

9.12.4 (15.2.2012)

CPU Support

Incremental FLASH programming

When a download is performed into an already programmed device, (optionally) only the FLASH sectors which have been modified,

are be programmed. This speeds up download times when only small changes are performed.

Incremental FLASH programming is supported on these CPUs:

MPC5xxx

TriCore

XC2000

User configurable Reset duration is provided. This may be required by target specific configuration.

TriCore

User configurable Reset duration is provided. This may be required by target specific configuration.

iSYSTEM, January 2017 7/167

winIDEA

Analyzer

Session duration limit

Profiler session duration can be limited to millisecond range.

Multiple IRQ level support

Multiple IRQ levels can be configured for OS objects. This allows profiling of nested interrupts.

See ProfilerConcepts.pdf for more information.

Download in Hot Attach configuration

Optionally, winIDEA can upon Debug/Download command, disable Hot Attach and perform regular download.

Intialize debugger, load symbols: initialize debugger hardware and loads symbols. This is the default setting.

Initialize, attach to CPU, download code: performs regular download, bypassing hot attach configuration.

After download the Hot Attach capabilities are restored.

iSYSTEM, January 2017 8/167

Location: Debug/Files for Download/Options

Watch expressions

Full SFR path is supported in watch expressions. This allows display of SFRs with identical names belonging to different CPU

modules.

Same syntax can be used to access SFR registers via isystem.connect.

iSYSTEM, January 2017 9/167

9.12.6 (19.2.2012)

CPU Support

MPC 5xxx

Mass erase before download

Program and Data FLASH can be (optionally) erased before download.

Location: Hardware.Emulation Options/CPU/Setup/MPC5xxx

Default: OFF

Bolero3M device unsecure

Unsecure with password is implemented.

winIDEA

Analyzer

Context re-activation support

Per default the profiler ignores repeated task IDs and considers that the same task/IRQ continues without interruption.

iSYSTEM, January 2017 10/167

Optionally, re-activation can be considered as a separate activation of the context. The changed interpretation will be reflected in the

statistics for the task.

Location: Analyzer/Profiler/Advanced/Ignore context reactivation

Default: ON

Neutral value for task level objects

For Task level objects the neutral value can be specified (like for IRQ objects).

Typically the NO_TASK state can be specified as 'neutral' and is indicated with a fatter line in the timeline.

iSYSTEM, January 2017 11/167

9.12.7 (24.2.2012)

winIDEA

Slow Run

Execution of the target application can be performed one instruction at a

time, which allows acquisition of full program trace. This allows all

Analyzer analyses also on CPUs without trace.

Location: Debug/Use Slow Run

Default: OFF

When CPU is running, the status shows the number of executed instructions.

The Analyzer will show all executed instructions, the time stamp for every instruction advances by 1 ns.

iSYSTEM, January 2017 12/167

Analyzer

Min / Max / Average statistics for regular variables and analog AUX

For regular variables and analog AUX who can assume arbitrary number of values, these statistics are provided:

Minimum value

Maximum value

Average value

Note: average value considers also the durations of a particular value. e.g. if a variable keeps a value of 0 for 9 seconds and a value

of 10 for 1 second, the average value will be 1.

iSYSTEM, January 2017 13/167

9.12.8 (5.3.2012)

CPU Support

HCS08

MC9S08MP16R support

Full feature set implemented.

winIDEA

Analyzer

Navigation to Min/Max extremes sets markers

Marker 1 is set to the beginning of the extreme, and Marker 2 to the end. Caret is also set to the end.

isystem.connect

Trace control

CTraceController is the new class for trace recording and export.

CTraceData can be used to read XML or binary trace export files.

For further information and examples refer to online SDK documentation.

iSYSTEM, January 2017 14/167

9.12.9 (7.3.2012)

CPU Support

HCS12

MC9S12XHY support

Full feature set implemented.

TriCore

TC1791 support

Full feature set implemented.

winIDEA

Debug

Ambiguity resolution dialog now displays also the address of possible symbols.

iSYSTEM, January 2017 15/167

9.12.11 (14.3.2012)

winIDEA

Analyzer

Profiler execution in RTOS application

Before a Task/IRQ context is known, the code execution can be ignored. The recorded code is attributed to an unknown context

which doesn’t exist in the application.

If on the other hand the application is profiled from CPU start, the OS is not active yet and the unknown context is a valid state, the

option should be disabled.

iSYSTEM, January 2017 16/167

9.12.12 (16.3.2012)

winIDEA

Symbols

winIDEA per default saves the symbol table from the previous download session alongside the workspace file.

This allows symbol navigation and reconstruction of analyzer recordings immediately when workspace is opened.

If saving of symbols is not desired, the option can be switched off.

Location: Debug/Options/Symbols/Preserve symbols between winIDEA sessions

Default: ON

Analyzer

Custom defined filters can use bitwise operators

Filters can use standard C bitwise operators & | and ^.

iSYSTEM, January 2017 17/167

9.12.13 (21.3.2012)

CPU Support

HCS08

HCS08JM8, HCS08JM16,HCS08JM32, HCS08JM60, full feature set.

winIDEA

Build Manager

For assembler includes winIDEA can optionally (not) search the source file folder.

If the Search also source file folder option is set (default), then first the folder of the source file is checked before all listed includes

search paths are checked. This is equivalent to C’s: #include “filename”

If this option is disabled, the source file folder is not checked and is equivalent to C’s #include <filename>

Location: Project/Settings/Includes/Search also source file folder

Default: ON

Note: always verify that the thus specified algorithm is the same as the assembler implements.

iSYSTEM, January 2017 18/167

Analyzer

Analyze only events after start point

Profiler will per default analyze the entire session, including events which occur before the starting point. To limit the analysis to

events after starting point, set this option.

iSYSTEM, January 2017 19/167

9.12.14 (27.3.2012)

CPU Support

S12Z

The new Freescale S12Z family of CPUs is supported.

eTPU

Data profiler is available. Up to 4 data areas can be profiled.

winIDEA

Disassembly window

Disassembly window provides a toolbar, including new navigation functions.

Disassemble to disk

Go to execution point

Go back to previous indicator position

List from branch target. This command is available only on direct branches.

List from start of the current function.

List from end of the current function.

Shows the function and offset of the indicator to the start.

Browse a function and list from its start.

isystem.test

R8C Stub support

Stubs are supported on R8C IAR and Renesas compilers.

iSYSTEM, January 2017 20/167

9.12.15 (28.3.2012)

winIDEA

isystem.test

HC12 Cosmic compiler support for +nowiden option

This information cannot be determined from the Elf file and must be explicitly configured in Test/Options…

Note: per default the compiler widens the char and float parameters to int and double respectively.

iSYSTEM, January 2017 21/167

9.12.18 (4.4.2012)

winIDEA

Analyzer

Bit level data profiling

If a data object is composed of several distinct sub-items (bit fields,…), a part of the data object can be extracted by specifying its bit

size and bit offset within the parent data object.

Several data objects can be defined on top of a parent data entity.

Refer to ProfilerConcepts.pdf for more information especially on big endian systems.

Data profiling unlimited variables

Per default the analyzer will attempt to use one hardware data comparator per data area. On most on-chip trace systems, the number

of these comparator is small and insufficient.

The profiler can merge multiple data areas in a single range, thus recording many using just a single comparator.

Note: If the data areas of interest are far apart in terms of address locations and frequently written variables lie between them, this

technique will increase the data trace bandwidth and could lead to trace port overflow. In such case the data variable layout in the

application could be rearranged so that variables of interest are closer together.

iSYSTEM, January 2017 22/167

Location: Analyzer/Profiler/Advanced/Merge data areas

Default: OFF

iSYSTEM, January 2017 23/167

9.12.19 (9.4.2012)

CPU Support

ECC Corruption

ECC corruption can be induced on some devices via Hardware/Tools/Memory dialog.

Currently supported devices

MPC5xxx

Note: ECC corruption is typically realized by overwriting FLASH locations. If this is done indiscriminately, the device can be

rendered permanently unusable.

winIDEA

Analyzer

Explicit OS signaling of context termination

To allow the profiler to discern context preemption (ISR preempting a task) from context deactivation (task entering a Wait or

terminating), the OS can signal mode of deactivation.

The availability of explicit signaling is reported by the OS plugin.

iSYSTEM, January 2017 24/167

OSEK

Explicit OS signaling of context termination

A vendor extension is used to report explicit OS signaling.

The vs_OSSIGNAL property is used to signal:

RET (0) when a context is returning to previously preempted context. Typically:

When ISR exits normally via RFI

RET_OS (1) when a context is returning to the scheduler.

When task is terminated (inside TerminateTask function)

When task enters a wait (inside WaitEvent function)

When ISR exits to scheduler

The ORTI must be adjusted accordingly.

OS

{

ENUM [ "RET" = 0, "RET_OS" = 1] vs_OSSIGNAL, "OS Signaling";

OS XPC560XP

{

vs_OSSIGNAL = "g_vs_SIGNAL"; // this variable is written for signaling

iSYSTEM, January 2017 25/167

9.12.21 (16.4.2012)

CPU Support

RL78

RL78G14 Support

Full feature set.

ARM

LM4F Support

Full feature set.

winIDEA

Analyzer

Text1 Export can include area name in the timeline section.

This allows easier review of activity, but slows down the export and makes the exported file larger.

Name is added by adding the %NAME% tag to the TimelineEntry format item.

iSYSTEM, January 2017 26/167

9.12.22 (26.4.2012)

CPU Support

PowerPC

QorIQ

QorIQ 3041 support.

MPC5xxx Information Plugin

In addition to execution history, the core information view provides:

Last RESET cause

ECC status: offending address and cause

winIDEA

Download Report

winIDEA can generate an XML formatted load report after download.

The report can include:

Loaded regions

Regions where code from different download files overlaps

Regions where verify errors occurred.

Every region reports:

Starting address

Last address in the region

iSYSTEM, January 2017 27/167

Size of the region

Location: Debug/Files for download/Options/Load Map

Default: OFF

Source Control

Subversion 1.7 supported.

iSYSTEM, January 2017 28/167

9.12.23 (6.5.2012)

CPU Support

PowerPC

Analyzer Entry/Exit mode removed. Range mode is used always.

winIDEA

Memory Region Actions

Beside download exclusions, further memory actions on loaded code can be performed before it is moved into target.

Exclude for download – the specified region is not loaded to target

Ignore in Verify operation – the region is not verified

Mirror – the region is either copied (duplicated) or moved to another address.

Location: Debug/Files for download/Options

The configured items are displayed with a 3 letter prefix indicating the operation:

First position

x – the region is excluded from download

_ - regular/no exclusion

Second position

v – the region is skiped in verify

_ - regular verify

Third position

c – the region is copied to another location

m – the region is moved to another location

_ - no mirroring

iSYSTEM, January 2017 29/167

iSYSTEM, January 2017 30/167

9.12.25 (11.5.2012)

Platforms

iC5000 I/O Module

IOM-D introduced

IOM-D features:

24 digital inputs

8 digital outputs

2 analog outputs

CPU Support

ARM

Fujitsu FCR4 Support

Debug and FLASH support

Fujitsu FM3 Support

Debug and FLASH support

TriCore

TC1796 Support

Debug and FLASH support

iSYSTEM, January 2017 31/167

winIDEA

Modify Expression

Debug/Modify expression allows setting real-time or non-real-time access to evaluation and modification.

Watch expressions keep min/max statistics

For simple integer and float types, the min and max values sampled are kept. The values can be viewed using context menu /

Properties command.

Automatic source position ambiguity resolution

When resolving source position ambiguity within the same module, winIDEA can automatically select either the lowest address of

compliant lines, or the highest:

iSYSTEM, January 2017 32/167

Location: Debug/Options/Debugging

Default: Use Lowest

isystem.connect

Tcl/Tk 8.6 support

isystem.connect DLL for Tcl 8.6 was added to Tcl SDK.

iSYSTEM, January 2017 33/167

9.12.26 (15.5.2012)

CPU Support

ARM

Fujitsu FM3 Support

On chip trace support.

HCS08

HCS08RNSupport

MC9S08RN60, MC9S08RN48, MC9S08RN32 support.

winIDEA

Target Download

Menu Access

Target download can be initiated from the Debug/Target Download menu:

The All command loads all configured target download files.

To load an individual file, select its name from the list. The files which were already loaded are marked with a check mark.

Note: only files which are enabled in the Debug/Files for download/Target download list are shown.

iSYSTEM, January 2017 34/167

Breakpoint setting

A target download may add additional information to the symbol table. Some breakpoints configured to source code locations or

labels could now be resolved to more addresses.

In this example a BP is set in a file which doesn’t participate in the original download file. After download, the BP is temporarily

disabled, but re-enabled after target download.

To reevaluate breakpoints after target download, select the Reapply BPs after target download.

Location: Debug/Options/Debugging

Default: OFF

iSYSTEM, January 2017 35/167

9.12.30 (4.6.2012)

CPU Support

TriCore

TriCore is suppoted on iONE platform.

XC2000

XC2000 is suppoted on iONE platform.

XC800

XC2000 is suppoted on iONE platform.

winIDEA

Analyzer

Trace location toolbar

Trace pane toolbar shows the function of the execution location at caret position.

The two buttons will move the caret, considering the recorded program flow, in the following fashion:

GoTo First Function Sample

Caret is moved to the first op-code executed in the current function body – i.e. when execution entered the range, either as it was

called or a called function returned to it.

If the caret is already located on the first sample in a function, then the caret is moved to the previous last sample in the current

function – i.e. when the function exited or called another function.

GoTo Last Function Sample

Caret is moved to the last op-code executed in the current function body – i.e. before the execution moves to a different function

wither as a call or return.

If the caret is already located on the last sample in a function, then the caret is moved to the next first sample in the current function

– i.e. after the called function returns or the function is called again.

iSYSTEM, January 2017 36/167

9.12.31 (5.6.2012)

CPU Support

Renesas 78k

RL78 on-chip trace support.

winIDEA

Templates

Available templates for workspace and trace are merged from winIDEA’s distribution directory and the user specified template

location.

Build Manager

Include paths are available in the command line

The include search paths can be used in the compiler command line as a macro $(INCLUDES).

This macro is substituted by a sequence of entries, which are constructed from Include search paths and the Compiler cmd. line

prefix.

In this example the commonly used –I prefix is defined (default). For every specified path a separate item preceded by –I will be put

in the compiler command line.

iSYSTEM, January 2017 37/167

iSYSTEM, January 2017 38/167

9.12.33 (14.6.2012)

CPU Support

Freescale HC08

S08RN60 supported. Full debug feature set.

V850

V850E2/Dx4 devices supported on ActiveGT platform

Full feature support for: 70F3522, 70F3523, 70F3524, 70F3525, 70F3526

V850E2/FL4-H device supported on ActiveGT and iC5000 platform

Full feature support for: 70F3564

winIDEA

CPU Selection Filter

The CPU filter allows locating the desired CPU easier. Only CPUs whose name contains any of the filter tokens will be displayed.

iSYSTEM, January 2017 39/167

Hot Attach

Hot attach to target is performed automatically with some run control commands. These tables list actions taken by winIDEA if Hot

Attach is configured.

Command Actions End State

Attach Initialize, Load symbols, Attach Running

Download

(initialize/load symbols)

Initialize, Load symbols Attach

Download

(initialize/attach/download)

Initialize, Load symbols, Reset CPU, Load code Stop

Load Symbols Only Initialize, Load symbols, Reset CPU Stop

Reset Initialize, Load symbols, Reset CPU Stop

Run Initialize, Load symbols, Attach Running

Run Until Initialize, Load symbols, Attach, set Run Until Running/Stop

Stop Initialize, Load symbols, Attach, Stop Stop

iSYSTEM, January 2017 40/167

9.12.34 (21.6.2012)

CPU Support

ColdFire

Profiler range mode is supported.

winIDEA

Analyzer

Download file display

In profiler the download file to which the symbol belongs can be displayed.

Location: Analyzer Toolbar/Options

Default: OFF

isystem.connect

Stack frame access

CDataController provides access to current CPU stack frame via getStackFrames() function.

For more information see Help/SDK/isystem.connect.

iSYSTEM, January 2017 41/167

9.12.36 (28.6.2012)

winIDEA

Watch expressions

64-bit type modifiers are supported:

,ll enforces 64-bit signed integer

,ull enforces 64-bit unsigned integer

Both modifiers are accessible via watch context menu.

iSYSTEM, January 2017 42/167

9.12.37 (9.7.2012)

winIDEA

Editor watch tips

Tooltips show full expression value: the expression under the mouse is resolved to its beginning and then evaluated.

Analyzer

Stack Killers are supported for Entry/Exit mode. This is typical on ICE systems.

iSYSTEM, January 2017 43/167

9.12.38 (23.7.2012)

CPU Support

ARM

Kinetis

FLASH support for K70 devices.

National CR16

DA6821AA support.

PowerPC

MPC5xxx Pictus 1M

Active GT POD introduced.

Renesas 78k

RL78 iCARD introduced.

iSYSTEM, January 2017 44/167

9.12.39 (29.7.2012)

CPU Support

ARM

LPC1800

LPC 1800 supported, full feature set.

PowerPC

QorIQ

QorIQ 2040, 2041 support.

iSYSTEM, January 2017 45/167

9.12.42 (13.8.2012)

CPU Support

CoolRISC

Data Profiler

The profiler can now profile data combined with execution profiling. Up to 4 data areas are supported.

winIDEA

Analyzer

Profiler tail-call optimization support

Compilers perform several kinds of optimizations on the function exit code. Profiler must recognize:

tail-merge: this optimization effectively moves part of function (A) code body into another function (B). In range mode,

execution in function B would be attributed to function B, instead of the optimized function A.

tail-call: this optimization occurs when function(A) calls another function(B) just before it exits. Instead of using a call op-code,

a branch is used. When function B returns, effectively function A returns too.

If this option is enabled, profiler performs analysis of tail optimizations on the fly. This analysis requires a higher level of debug

information quality and it relies on object code analysis.

SFRs

SFR window shows register descriptions and value descriptions

Description column

The Description column displays a description of the peripheral group, register or a field.

Note: description is available only if the SFR specification file provides it.

iSYSTEM, January 2017 46/167

Register value description

For terminal registers or fields (those without sub-fields) the Values column displays a description of the current value.

Note: value description is available only if the SFR specification file provides it and if the current value fits one of the specified

values for the field.

Register properties

The Properties dialog (invoked from context menu) displays full information about a register. New additions are

Register description (see above)

Value description (see above)

iSYSTEM, January 2017 47/167

9.12.43 (24.8.2012)

winIDEA

SFRs

External definition for SFRs

In addition to built-in SFRs, winIDEA can load external SFR definitions.

The SFRs… button in the CPU configuration dialog allows specification of external description file.

Load External

If checked, external SFRs will be loaded. Otherwise all other options in this dialog are ignored.

Keep internal SFRs

If checked, the externally defined SFRs will not overwrite the internal winIDEA definitions.

This should be used when the external definition is incomplete (e.g. no core registers)

Format

Defines the format of the external description file.

Path

Specifies the path to the external description file. The path is kept relative to winIDEA installation folder.

iSYSTEM, January 2017 48/167

CMSIS-SVD SFR description file format support

Cortex Microcontroller Software Interface Standard, System View Description format can be read by winIDEA.

iSYSTEM, January 2017 49/167

9.12.44 (31.8.2012)

CPU Support

PowerPC

QorIQ

QorIQ 1010 support.

SDK

Code comments are translated from C++ classes to Java and Python code. Eclipse can be configured to show Javadoc documentation

and code comments on mouse cursor. Please see document isystem.connectInstallationAndUsage.html which comes with SDK for

details.

Javadoc example:

iSYSTEM, January 2017 50/167

9.12.46 (6.9.2012)

CPU Support

PowerPC

MPC5xxx

MPC5744M / McKinnley support.

MPC5744P / Panther support.

MPC5xxx Hardware Breakpoints

Hardware Breakpoints can generate EVTO only (without stopping the CPU).

Location: Hardware/Emulation Options/CPU/Setup/MPC5xxx

Default: OFF

iSYSTEM, January 2017 51/167

9.12.47 (14.9.2012)

CPU Support

HC08

S08PT60/32 support

Full feature set.

winIDEA

Editor

Line numbers can be displayed.

Location: Edit/Options/Editor

Default: OFF

iSYSTEM, January 2017 52/167

Analyzer

Download file name can be added to area name in profiler export.

Location: Analyzer/Export

Default: Auto

iSYSTEM, January 2017 53/167

9.12.48 (21.9.2012)

CPU Support

V850

V850 Fx4

On V850E2/xx4 write-access breakpoint is pre-execution, which can prevent resume of execution. If such a BP hits, a forced

instruction step is performed before resuming execution.

isystem.connect

Analyzer WAITING status can be detected via function:

bool isys::CAnalyzerStatus::isWaiting()

winIDEA

Call stack window

The current call stack can be viewed in the Call Stack window.

A double click on a frame will preset the reconstructed context.

For every frame the function name is displayed, optionally also the source code around the call site is displayed.

The pointer indicates the current context.

The pointer indicates the call/return site.

Note: reconstruction of the call stack requires several target memory accesses and can slow down the debugging as the window is

refreshed after every PC movement. Memory read access caching can be enabled in Debug/Options/Memory Access do aleviate this

effect.

iSYSTEM, January 2017 54/167

Display mode is controled via Options/Callstack Window.

Analyzer

Missing program code handling

When tracing on an on-chip-trace architecture, program

code must be known in advance. If CPU executes

from an area where code was not loaded by winIDEA,

missing program code error is reported.

Optionally, winIDEA can load such code at run-time,

using real-time memory access.

Location: Hardware/Analyzer Setup

Default: ON

iSYSTEM, January 2017 55/167

Continuous Trace Session

The analyzer can remain active when CPU stops. This allows tracing over several breakpoint stops.

Note: the ability to correctly resume trace stream analysis is CPU specific. On some CPUs the initial op-codes will not be shown.

Also note: the trace recorder timestamp continues to run while CPU is stopped. The overall session timing does not correspond to

real-time.

Location: Analyzer/Configuration

Default: ON (trace stops when CPU stops)

iSYSTEM, January 2017 56/167

Workspace

Optionally, winIDEA can report mismatch of winIDEA version and the version of winIDEA used to create the workspace file.

If a mismatch is detected, user can choose to abort loading of the workspace.

Location: Tool/Options/Environment

Default: OFF

iSYSTEM, January 2017 57/167

9.12.49 (28.9.2012)

CPU Support

V850

V850 Fx4

On V850E2/xx4 write-access breakpoint is pre-execution, which can prevent resume of execution. If such a BP hits, a forced

instruction step is performed before resuming execution.

isystem.connect

Analyzer WAITING status can be detected via function:

bool isys::CAnalyzerStatus::isWaiting()

winIDEA

Analyzer

Data Profiling

State variables can be configured to consider or ignore every write as a state transition, even if the value written is already contained

in the variable.

Location: Profiler/Data Area

Default: ON(Ignore)

iSYSTEM, January 2017 58/167

Debug

Compiler debug info reliability

Compiler debug information on source lines is used for debugging and tracing. Several quality improvements are possibly by relying

on it, but if the information wrong it will break the operation of some functions.

In such case, and on advise of technical support, disable the Trust source line debug info option.

Location: Debug/Options/Debugging

Default: ON

iSYSTEM, January 2017 59/167

9.12.51 (5.10.2012)

CPU Support

V850

V850 Fx4

V850E2/xx4 access breakpoints can be set when application is running.

HCS12

S12Z

MM9Z1_638 support. Standard feature set.

winIDEA

Debug

Execution breakpoint type display

Type of execution breakpoint (hardware or software) is displayed in the breakpoint dialog.

Along with the actual address either the HW or SW prefix is used to indicate the type.

iSYSTEM, January 2017 60/167

Analyzer

Data Profiling

Variables which are written in multiple accesses can be profiled. This allows profiling 16-bit variables on an 8-bit CPU.

Since access to a variable is not atomic, the profiler will consider a new value being written to a variable when either lowest or

highest location of the variable is written. This behavior is compiler specific.

Note: to determine the correct setting of the access completion, review the object code generated by the compiler.

Note that multiple-access variable option cannot be used with the sub-field option.

Location: Profiler/Data Area

Default: OFF

Slow Run Profiling

Profiler is now enabled for slow-run operation.

Note: the acquired timestamps are derived from the number of op-codes executed.

iSYSTEM, January 2017 61/167

Coverage

Function and Call Coverage

Function coverage displays which functions have (not) been executed.

The data is found in the coverage window’s:

Function coverage column – a bar graph displaying the percentage of executed functions vs. all functions in respective

scope

Functions column – numerical display of executed vs. all functions.

Call coverage displays which function calls have (not) been executed.

The data is found in the coverage window’s:

Call coverage column – a bar graph displaying the percentage of executed calls vs. all calls in respective scope

Calls column – numerical display of executed vs. all calls.

iSYSTEM, January 2017 62/167

9.12.52 (10.10.2012)

CPU Support

78k

RL78

F13/F14 series OCD support, standard feature set.

iSYSTEM, January 2017 63/167

9.12.53 (12.10.2012)

CPU Support

78k

RL78

F13/F14 series OCT support.

isystem.connect

64-bit Python support.

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9.12.54 (17.10.2012)

CPU Support

PowerPC

e500

External FLASH programming support.

winIDEA

Setup

New winIDEA installer is introduced.

Full Setup

The full setup will detect if an older installation is present on the system and report:

Previous winIDEA 2012 installation found. This setup will create a new installation, ensure that any shortcuts used are

appropriately adjusted.

The default installation path is C:\iSYSTEM\2012\

Update Setup

The update setup first looks for an existing (new) full installation.

Next, an older winIDEA 2012 is searched.

If no previous installation is found, setup will abort with the message:

No previous installation of winIDEA 2012 found.

iSYSTEM, January 2017 65/167

9.12.56 (23.10.2012)

isystem.connect

Analyzer off-line analysis can be restarted using CDocumentController::start1() function.

winIDEA

Debug

SFR window search

Search for a register supports substring search. This search will find the first register which contains substrings time and int.

Selecting Edit/Find Next, or using the F3 shortcut, the next matching register is found.

iSYSTEM, January 2017 66/167

9.12.57 (2.11.2012)

CPU Support

PowerPC

e200

The MMU plugin shows conflicting MMU TLB entries in red color.

EPADIMD

Decision coverage supported.

winIDEA

Coverage

Manual trigger configuration

For coverage operation a manual trace trigger/qualifier configuration can be used. This provides a possibility of more efficient on-

chip trace buffer usage on some CPUs.

Location: Hardware/Analyzer Setup

Default: OFF(use automatic configuration)

iSYSTEM, January 2017 67/167

Debug

SFR window search

Search for a register supports search by address.

This search will find the register which is located on address 0x4002200.

Selecting Edit/Find Next, or using the F3 shortcut, the next matching register is found.

Selecting Edit/Find Previous, or using the Shift+F3 shortcut, the previous matching register is found.

Help

Examples directory can be opened using Help/View Example…

iSYSTEM, January 2017 68/167

IDE

Workspace selection

When winIDEA doesn’t load a workspace at startup, workspace select dialog is presented, which lists all recently opened projects

and all winIDEA example projects.

To locate the workspace easier, use the Filter fields. The space-delimited strings entered there, must be present in the file name.

To open the workspace, double click in the list or click the Open button.

Location: File/Select Workspace…

iSYSTEM, January 2017 69/167

9.12.60 (13.11.2012)

CPU Support

PowerPC

e500

P3041 Reset Configuration Word override supported.

HCS08

MC9S08QA2/4 and MCS908QB4/8 support. Standard feature set.

HCS12

Data flash programming supported on S12XHY.

ARM

LPC18xx

FLASH programming support.

winIDEA

Coverage

Manual trigger configuration with a trigger template

Manual configuration of trace trigger for

coverage allows usage of existing trace

trigger templates.

iSYSTEM, January 2017 70/167

Elf/Cosmic

Command line parameters +nowiden and +sprec options which affect function parameter types are configurable.

These options must be configured accordingly to compiler command line used.

Note: this option replaces the Test/isystem.test Options… configuration.

Location: File for download/Propertis/Advanced

Default: OFF, OFF

isystem.connect

External FLASH programming via iConnect can be invoked using

serviceCall("/IDE/ExtFLASHProgram")

iSYSTEM, January 2017 71/167

9.12.65 (29.11.2012)

CPU Support

Software breakpoint group setting

Software breakpoints which are set into FLASH memory cause a possibly lengthy FLASH reprogramming whenever a single BP is

set or cleared.

A single grouped operation can be performed instead, thus reducing the number of FLASH reprogramming cycles to only one.

This option is best suited for use under testIDEA when a large number of stubs are used.

Note: initial setting of a breakpoint will thus always succeed. Only when CPU is set to running, is the BP actually set. If at that

moment setting fails, the debug session must be reinitialized with a download.

Location: Hardware/Emulation Options/CPU/Setup/Debugging

Default: OFF

V850

RH850 FLASH programming

Data FLASH programming supported via serial programming protocol.

Note: External oscillator clock must be specified correctly in Hardware/Emulation Options/CPU/Setup/Debugging to ensure

correct operation.

ARM

Cortex M external FLASH programming

External NOR FLASH programming support.

iSYSTEM, January 2017 72/167

winIDEA

Coverage

isystem.connect

Execution breakpoints can be reapplied using :

CBreakpointController.reapplyAll()

Note: only currently active breakpoints are affected.

iSYSTEM, January 2017 73/167

9.12.68 (7.12.2012)

CPU Support

PowerPC

e300

PowerQUICC II Pro MPC8315E support.

e200

General purpose registers are always considered 32-bit size. To view 64-bit values valid in SPE operations, use SFR window

core/General/64-bit General Purpose Registers group.

R8C

Offline coverage mode (statement and decision) is implemented.

Range mode profiler is implemented.

isystem.connect

Profiler capabilities can be obtained via isystem.connect using serviceCall function:

ideCtrl.serviceCall('/iOPEN/Core.GetProfilerCapabilities', '')

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output:

Result: TRUE, NumExecAreas: 4294967295, NumDataAreas: 4, NumAUX: 69, SingleData: OTM, SingleData1: DQM

Refer also to serviceCall SDK example.

winIDEA

Analyzer

Data areas can observe writes from all SoC cores.

Location: Analyzer/Profiler/Profiler Data Area

Default: OFF

Note: this functionality is CPU core and SoC specific. At this time it supported on MPC e200 cores only.

Note: analyzer start will fail if any SoC core is in a state which does not permit trace operation (RESET).

iSYSTEM, January 2017 75/167

Expression evaluator constants

winIDEA recognizes these built-in constants:

Symbol Value Type

#NAN NaN float

#INF +Inf float

#MAX_U8 256 unsigned 8 bit

#MIN_S8 -128 signed 8 bit

#MAX_S8 127 signed 8 bit

#MAX_U16 65536 unsigned 16 bit

#MIN_S16 -32768 signed 16 bit

#MAX_S16 32767 signed 16 bit

#MAX_U32 4294967295 unsigned 32 bit

#MIN_S32 -2147483648 signed 32 bit

#MAX_S32 2147483647 signed 32 bit

#MAX_U64 18446744073709551615 unsigned 64 bit

#MIN_S64 -9223372036854775808 signed 64 bit

#MAX_S64 9223372036854775807 signed 64 bit

#MIN_F32 1.1754944e-038 float

#MAX_F32 3.4028235e+038 float

#MIN_F64 1.7976931348623157e+308 double

#MAX_F64 2.2250738585072014e-308 double

iSYSTEM, January 2017 76/167

Data Acquisition

The emulator can perform a high-frequency data acquisition using real-time access of the connected CPU.

Up to 256 DAQ items can be configured on an iC5000 or iC3000.

Each DAQ item can monitor a location of 1-8 bytes.

Processing time of one DAQ item (reading it from memory) varies on the CPU architecture and debug port speed, but ranges from

50us-500us.

DAQ sampling periods can be configured (per individual DAQ item) for maximum, 1ms, 10ms, 100ms and 1s.

Note: a large number of DAQ items will extend the time required to process one DAQ loop and may breach the configured sampling

period.

Access to DAQ functionality is provided via isystem.connect SDK.

Example:

daqCtrl = ic.CDAQController(cmgr)

# reset the DAQ configuration

daqCtrl.configReset()

#monitor variable g_nStep at maximum sampling rate

itemIndex_g_nStep = daqCtrl.configAdd('g_nStep')

# enable DAQ on the entire SoC

daqCtrl.enableGlobal(True)

while True:

daqStatus = daqCtrl.status()

# if any sample is available, display the status and print the samples

if daqStatus.getNumSamplesAvailable() > 0:

# read available samples into daqSamples

daqSamples = ic.DAQSampleVector()

daqCtrl.read(daqSamples)

for S in range(daqSamples.size()):

daqSample = daqSamples[S]

# print data as a hexadecimal integer

print ' D=', hex(daqCtrl.getDataValue(daqSample).getLong()), \

' T=', str(daqSample.getTime())

iSYSTEM, January 2017 77/167

9.12.70 (18.12.2012)

CPU Support

8051

Infineon SP37 support

Full debug feature set supported.

78k

78k0R FLASH erase

Mass device erase is supported on serial debug interface.

CR16

SC14110A and SC14111A support. Full feature set.

HCS08

S08PT16 and S08PT8 support. Full feature set.

winIDEA

Call Stack

Call stack unwind in ARM exception handlers is supported.

isystem.connect

CDataController::eraseFLASH operation is available also for UMI based devices.

iSYSTEM, January 2017 78/167

9.12.72 (4.1.2013)

CPU Support

PowerPC

e200 MMU refresh

MMU refresh consumes

considerable amount of time, but

is required for correct debugging.

isystem.test operations however

can be accelerated considerable if

MMU configuration is

considered to be preserved by a

test execution.

Location: Hardware/Emulation

Options/CPU Setup/Specific

Default: OFF

Software Breakpoint caching

When software breakpoints are used in

FLASH memory, lengthy FLASH

operations are performed for every

breakpoint.

winIDEA can keep the requested changes to

breakpoints cached, and commit them only

before CPU is set to running. These are

then performed in a single FLASH

operation, which reduces the operation time

and stress on the device considerably.

The benefit is most notable in isystem.test

operation when a large number of stubbed

functions are used.

Location: Hardware/Emulation

Options/CPU Setup/Debugging

Default: OFF

iSYSTEM, January 2017 79/167

winIDEA

IDE refresh in isystem.test mode

winIDEA refreshes debug windows whenever the CPU is stopped. This can slow down the isystem.test operation notably.

To inhibit refresh during isystem.test, enable this option:

Location: Test/isystem.test Options

Default: ON

iSYSTEM, January 2017 80/167

9.12.73 (9.1.2013)

CPU Support

STM8

STM8S003F3/K3 support. Full debug feature set.

PowerPC

e200 Lower Power Mode

The Measurement plugin now provides

the LPM event counter. This indicates the

number of low power mode entries since

download.

winIDEA

External SFR configuration

External SFR register definitions can

be configured in winIDEA.

Location: Debug/Options/SFRs

Load External

If checked, external SFRs will be

loaded. Otherwise all other options in

this dialog are ignored.

Keep internal SFRs

If checked, the externally defined

SFRs will not overwrite the internal

winIDEA definitions.

This should be used when the

external definition is incomplete (e.g.

no core registers)

Format

Defines the format of the external

description file.

Path

Specifies the path to the external description file. The path is kept relative to winIDEA installation folder.

isystem.connect

CDocumentController::stopSampling() function provides means to deactive analyzer acquisition of data. The acquired data upload

is not stopped until all data is loaded.

iSYSTEM, January 2017 81/167

9.12.74 (9.1.2013)

winIDEA

Watch window

Watch window retains values of expression which are currently invalid (out of scope, memory access error,…).

Such values are displayed in gray color and the Address reflects the cause of failure.

iSYSTEM, January 2017 82/167

9.12.75 (16.1.2013)

Eclipse

Eclipse 4.2 Juno supported.

winIDEA

External SFR configuration

External SFR configuration now allows usage of winIDEA internal SFR definitions also for 3rd

party isystem.open plugins.

Watch window

Watch and variable windows add the Error column, which display the evaluation error cause.

iSYSTEM, January 2017 83/167

9.12.76 (18.1.2013)

CPU Support

SP41

SP41 CPU support. Debug feature set.

winIDEA

Analyzer

User Trace port support implemented for CPUs without trace port.

See UserTracePort.pdf for more information.

iSYSTEM, January 2017 84/167

9.12.77 (24.1.2013)

winIDEA

Analyzer

Profiler Outside Time

Outside Time indicates the time spent outside

the body of the function or a state – where

the function state is Inactive.

Example

void g();

void f()

{

varF++;

g();

}

void main()

{

for (I = 0; I < 2; ++I)

f();

}

Trace recording:

Area Event Time State of f

main Entry 0 us Inactive

f Entry 1 us Active

g Entry 2 us Suspended

g Exit 3 us Active

f Exit 4 us Inactive

f Entry 5 us Active

g Entry 6 us Suspended

g Exit 7 us Active

f Exit 8 us Inactive

main Exit 9 us Inactive

In this case, this is the sum of intervals (0,1) + (4,5) + (8,9). The Outside Time is thus 3 us.

This criterium is available for functions and data states.

iSYSTEM, January 2017 85/167

9.12.84 (12.2.2013)

Platforms

State Analyzer Trace

CPUs without on-chip trace can rebuild an instrumentation trace port using one of its free ports. The iC5000 can attach to such port

and capture the instrumentation trace stream.

winIDEA trace and profiler can then interpret this stream to reconstruct function and OS event flow.

For more information refer to UserTracePort.pdf

CPU Support

ARM

TI LM4F FLASH programming support.

winIDEA

GDB Server

Memory Access

Real-time memory access can be used to access memory.

Location: Plugin/GDB Server/Configure

Default: ON

Start and stop via isystem.connect

GDB server can be stared and stopped via isystem.conenct call:

ideCtrl.serviceCall("/Plugin/GDB server/Activate", "Activate: TRUE")

isystem.connect

Step and StepOver operations can take a timeout parameter too. Previously these two operations were blocking without a timeout.

iSYSTEM, January 2017 86/167

9.12.88 (21.2.2013)

CPU Support

TriCore/XC2000

DAP adapter with 3-state control supported.

Script switching is provided via

CExecutionController::setBlueBoxTargetConnection(bool isConnected)

V850

R7F701023x, R7F701031x, R7F701032x, R7F701033x, R7F701034x support.

iSYSTEM, January 2017 87/167

9.12.90 (5.3.2013)

CPU Support

PowerPC

PowerQUICC II Pro MPC8309 supported.

winIDEA

Setup/Scripts

Scripts distributed with winIDEA folder are displayed in Tools menu.

OS configuration

OS (and ORTI) configuration is exposed via Option interface. Use URL root: /IDE/Debug.OS.ORTI

iSYSTEM, January 2017 88/167

9.12.92 (13.3.2013)

winIDEA

#define symbol support

Symbols defined with #define pre-processor directives are not visible in the debug symbol table. winIDEA can now scan source

code files to determine values and names of such symbols.

The analysis is enabled in Debug/Files for download/Properties/#define dialog, for every download file individually:

Files which should be analyzed can be specified either by:

Files specified in winIDEA’s project file list

Files referenced in the download file

Additional explictly listed files

To correctly scan the include paths, the order of include paths must be given in the same fashion as the compiler sees it. If

winIDEA’s build manager is used, the Use project include files option should be checked. Otherwise the include search paths and

any command line preprocessor defines should be specified in the Additional pre-processor command line field, using the specified

syntax.

The analysis of source code is performed after download - the progress dialog will display ANALYZING status.

The detected pre-processor symbols, which have non-empty value and are not defined with differing values in different files are

shown in the symbol browser and are considered in expression evaluations.

iSYSTEM, January 2017 89/167

Since the by scanning the source code the definition position is known, the ‘Go to Definition’ (F12 shortcut) can be used in the

source code editor.

Note: analyzing large projects with many files and deep include dependencies can take considerable time. If only globally defined

macros are of interest, the analysis can be accelerated by creating a new header file, which #includes all relevant headers. This file

can then be specified in the Analyze these files additionally and Analyze source files is set to none.

iSYSTEM, January 2017 90/167

9.12.95 (28.3.2013)

CPU Support

ARM

LPC4xxx multi-core and ETB trace support.

ADuC7033 support. Full debug feature set.

S12

S12ZVL support. Full debug feature set.

Tricore

Faster DAP trace upload.

iSYSTEM, January 2017 91/167

9.12.97 (5.4.2013)

CPU Support

RH850

RH850/F1L WS2.0 (silicon version 2.0) device supported.

iSYSTEM, January 2017 92/167

9.12.98 (15.4.2013)

CPU Support

PowerPC

MPC5605BK/MPC5606BK support. Full feature set.

MPC5744K support. Full feature set.

winIDEA

Analyzer

Analyzer now integrates Coverage with Trace and Profiler analysis.

Please refer to Analyzer.pdf for more information.

iSYSTEM, January 2017 93/167

9.12.99 (19.4.2013)

CPU Support

RH850

RH850 proprietary flash programming via serial communication protocol supported also on iC3000.

isystem.connect

Coverage controller classes

CCoverageController2 and CCoverageData2 classes provide access to coverage configuration and recorded data access.

For more information see Help/SDK/isystem.connect.

iSYSTEM, January 2017 94/167

9.12.100 (23.4.2013)

CPU Support

PowerPC

MPC570S50 support. Full feature set.

MPC5668 FPGA variants added.

winIDEA

Analyzer

Coverage can use manual trigger configuration. This allows finer specification of ranges to trace, which reduces OCT bandwidth

requirements.

iSYSTEM, January 2017 95/167

9.12.102 (2.5.2013)

CPU Support

Tricore

TC275 step BA supported (debug protocol was changed).

winIDEA

Support for ADA arrays

ADA arrays, which can start at non-zero offset, are displayed with matching offset.

The watch array modifier allows usage of negative values for starting element of the display.

iSYSTEM, January 2017 96/167

9.12.103 (9.5.2013)

CPU Support

S12

MC9S12XET768 support, standard feature set.

CR16

SC14493 support, standard feature set.

iSYSTEM, January 2017 97/167

9.12.104 (14.5.2013)

CPU Support

Tricore

DAP2 supported on TC275 step B.

iSYSTEM, January 2017 98/167

9.12.106 (22.5.2013)

CPU Support

V850

RH850 LPD interface supported.

iSYSTEM, January 2017 99/167

9.12.107 (31.5.2013)

CPU Support

ARM

XMC1000 supported, standard feature set.

winIDEA

Analyzer

Support for signed type regular variables

Signed integer variables are supported in the analyzer. If a (regular) variable stores signed integer values, it should be marked as

such in order for Analyzer to correctly interpret the raw value reported by the trace.

The range can optionally be specified, so that the value range is rendered accordingly.

iSYSTEM, January 2017 100/167

9.12.108 (6.6.2013)

CPU Support

ARM

Xilinx Zynq live bitstream download support.

iSYSTEM, January 2017 101/167

9.12.112 (24.6.2013)

CPU Support

ARM

Kinetis L Family Support

Only devices with 4kB or more internal RAM allow FLASH programming.

TriCore

OCDS configuration

TriCore 2x OCDS module configuration is provided in Hardware/Tools/OCDS.

On Open the current configuration is displayed.

Refresh button refreshes the configuration.

Apply button applies currently configured options to the CPU.

iSYSTEM, January 2017 102/167

The current configuration can be saved to a template file using the Save… button and can be later loaded with the Load > button.

The templates are saved in the iSYSTEM\winIDEA\Templates\SoC\TriCore\TC2x folder of user home directory.

Use the browse button next to module fields to configure individual modules.

Refer to TriCore OCDS specification for detailed information on OCDS system.

winIDEA

Analyzer

Support for signed type regular variables

Data profiler supports signed integer variables.

XCP

A2L (ASAM) file generation

For easier integration with popular XCP master applications (i.e. Vector CANoe, Vector CANape), simple A2L file generator is

embedded into XCP plugin. Invoke it either by pressing the “gear” icon or, alternatively, from the Plugins/Options/XCP/Generate

A2L file.

Refer to XCP.pdf for more information.

isystem.connect

CDocumentController::saveCopy()

Saves copy of the current document, but document name does not change (similar to method saveAs(), but saveAs() changes also

document name).

Stack Monitoring

API for stack usage monitoring, see class CDataController, methods configureStackUsage(), seedStack(), and getStackUsage().

iSYSTEM, January 2017 103/167

9.12.115 (12.7.2013)

CPU Support

RH850

H850 separated Code and Data Flash Mass Erase functions.

ARM

STM32F0 family support, debug feature set.

winIDEA

Help

All help and documentation is provided as HTML help.

Analyzer

AUTOSAR

Standard stack killers for known OSes are automatically considered by winIDEA. At this time implementations of TerminateTask()

function for Vector and ETAS are added and used if Profiler/Advanced/Standard Stack Killers option is checked.

iSYSTEM, January 2017 104/167

XML export schema

XSD file for Trace, Profiler and Coverage export are included in distribution. Installed into templates\Trace,

templates\ProfilerExport, trace\CoverageExport folders.

Expression evaluator

Expression evaluator allows C storage keywords in expression. The keywords volatile, const, extern and static are allowed in the

parser, as they can occur in macro definitions.

iSYSTEM, January 2017 105/167

9.12.116 (16.7.2013)

CPU Support

TriCore

OCDS configuration

TriCore 2x OCDS module configuration provides automatic initialization after reset.

ARM

EFM32GG CPU support, full feature set.

iSYSTEM, January 2017 106/167

9.12.119 (9.8.2013)

CPU Support

TriCore

Profiler range mode support.

winIDEA

Analyzer

Trigger can be manually configured for profiler

operation mode. When enabled use

Configure button to configure the trigger

manually

Preset button to configure the trigger using

an existing trace template

Note: When manual trigger configuration is

used, the Start at and code/data area

configuration is not used to configure the

trigger.

RTOS

MQX RTOS plugin

Supported features:

Profiler

Tasks

LW semaphores

Mutexes

Task queues

LW timers

Memory Pools

iSYSTEM, January 2017 107/167

9.12.120 (9.8.2013)

CPU Support

ARM

TMS470M CPU support, debug feature set.

TriCore

Breakpoint wizards for TC1.3 and 1.6 cores.

iSYSTEM, January 2017 108/167

9.12.122 (22.8.2013)

CPU Support

ARM

SAMA5D3 CPU support, debug feature set.

TriCore

Trace over CPU reset possible.

Trigger requirements:

Time stamp should be generated frequently

enough to get proper paragraph times (use

wizard to generate program trace trigger)

trace_done should be set to NEVER

Limitations:

Trigger position cannot be determined and it is

always set to beginning,

UWS is not possible.

winIDEA

Analyzer

Legacy coverage documents (ccv) deprecated. They can be imported and viewed, but can no longer be used for new sessions.

iSYSTEM, January 2017 109/167

9.12.123 (3.9.2013)

CPU Support

78k

RL78/L12 and RL78/D1A CPU families OCD support, debug feature set.

ARM

SWD clock can now be set on Cortex CPUs. This setting can be used to reduce the clock speed if very slow CPUs are used.

iSYSTEM, January 2017 110/167

9.12.124 (10.9.2013)

CPU Support

V850

Trace ring-mode supported on RH850.

S12

AUX card profiler support for S12 ActiveGT PODs.

winIDEA

External Tools

External tools, which are local to workspace can have keyboard shortcuts assigned.

Python scripts can be specified as external tools. The configured python path is used in this case to invoke the script.

iSYSTEM, January 2017 111/167

9.12.126 (17.9.2013)

CPU Support

STM8

STM8AL31xx device support.

winIDEA

Analyzer

Analyzer Trigger type can be changed from Trace to Profiler or Coverage. In such case the Profiler assumes custom trigger

configuration and uses the previous Trace configuration.

The type is changed in the Analyzer Configuration, via local menu.

iSYSTEM, January 2017 112/167

9.12.127 (24.9.2013)

CPU Support

V850

Hot attach mode support.

ARM

RM48Lxxx Hercules support.

winIDEA

Breakpoints

Conditional breakpoint counter can be optionally reset when CPU stops.

Location: Debug/Options/Debugging

Conditional breakpoint counters can also be reset explicitly by selecting Debug/Reset Conditional BP counters menu.

iSYSTEM, January 2017 113/167

9.12.131 (4.10.2013)

CPU Support

TriCore

Trace templates for upload-while-sampling configuration.

ARM

Neon instructions support.

V850

RH850 breakpoint wizard available.

RH850 code and data FLASH can be modified during debug session.

winIDEA

Analyzer

XML export includes information on positions of discovered extremes (min, max occurrences of net, gross, call and period criteria).

XCP

XCP over TCP/IP now supports IPv6.

A2L generator supports array and structured global variables.

iSYSTEM, January 2017 114/167

9.12.134 (17.10.2013)

CPU Support

78k

RL78/F14 devices OCD support.

winIDEA

MQX support

Control block and stack size display in the task list.

iSYSTEM, January 2017 115/167

9.12.135 (24.10.2013)

CPU Support

TriCore

DAP2 protocol support. Speed is configurable but is very target dependent. The Measurement plugin should be used to identify

number of communication faults and reduce the DAP speed accordingly.

V850

LPD4 speed support up to 20MHz. Speed is configurable but is very target dependent. A slower clock should be used if emulation

fails.

iSYSTEM, January 2017 116/167

9.12.136 (6.11.2013)

CPU Support

TriCore

MCDS Continuous mode option provided as a shortcut to disable upload while sampling and force trigger trace_done to NEVER .

iSYSTEM, January 2017 117/167

9.12.138 (20.11.2013)

CPU Support

ARM

OMAP4 Multi-core support.

Altera Cyclone V support.

PowerPC

Matterhorn ED (MPC5777M) support.

Andorra 2M (MPC5642A) support.

winIDEA

Stack usage display

Call stack window displays current and maximum measured stack usage.

Toolbar buttons:

seeds the stack with the specified pattern. User must confirm the seed operation.

opens the stack usage configuration dialog

The usage bar displays:

Maximum usage – the shaded area

Current SP position – the vertical line in the bar

Numerical Current Usage / Max Usage / Total Size

iSYSTEM, January 2017 118/167

SDK

Python 3 support

Python 3 is supported. Installers for Python 3.3, 32-bit and 64-bit are part of SDK now. All samples run in Python 2 and Python 3.

iSYSTEM, January 2017 119/167

9.12.139 (22.11.2013)

CPU Support

PowerPC

Recerunner (MPC5775K) support.

ARM

STM32F051CB support.

V850

Fx4 FLASH access via isystem.connect is available. Security and mask options can be set and queried.

Example:

ideCtrl.serviceCall("/IOPEN/HW.Debug.V850Fx4_FLASH", "WriteMaskOptions:TRUE, FLASHMaskOptions0: 0x12345678");

winIDEA

Analyzer

Coverage Export

CTC++ export can now include assembly level information under Module details and Untested code pages. By default, these lines

are hidden on Module details and visible on Untested code page. By clicking on the source line, assembly info is shown/hidden.

SDK

Demo mode switching

Demo mode can be enabled or disabled via

ideCtrl.serviceCall("/IOPEN/Core.Demo", "Demo: TRUE") ideCtrl.serviceCall("/IOPEN/Core.Demo", "Demo: FALSE")

iSYSTEM, January 2017 120/167

9.12.140 (4.12.2013)

CPU Support

TriCore

TC298TF ED support, full feature set.

Access error reporting can be disabled via Hardware/Emulation Options/CPU/Setup/Debugging/Ignore Access Errors.

winIDEA

Analyzer

Triggers are unified in a single type. Trace analysis is performed always, Profiler and Coverage can be enabled.

Note: if Manual Trigger/Recorded configuration is used, the settings in the Profiler and Coverage pane will be used only in analysis

stage, not in trigger configuration stage.

iSYSTEM, January 2017 121/167

9.12.145 (14.1.2014)

CPU Support

TriCore

Programming

UCB (User Configuration Blocks) programming supported.

Trace

Size of emulation memory used for Trace buffer can be selected

New devices

TC298TF, TC297TP, TC298TP, TC299TP, TC298TE, TC274T step Ax, TC277TP, TC275TP, TC277TF, TC299TF/TC299TE,

TC274DE

PowerPC

New devices

McKinley ED (MPC5746M,SPC57EM80).

SPC56L70 (Leopard 2M single core)

iSYSTEM, January 2017 122/167

V850

RH850 Debug Port Selection

RH850 Option bytes debug interface selection presets available.

ARM

Hot Attach operation

Hot attach enabled for all Cortex devices.

winIDEA

Source Control

Subversion backend replaced. Support for Subversion 1.8 is enabled by updating Tortoise SVN.

XCP

XCP A2L file generator supports:

Multiple download files (multipartition),

Writable Variables,

xINT64 types

iSYSTEM, January 2017 123/167

9.12.146 (24.1.2014)

CPU Support

V850

Programming

RH850/P1x data flash programming supported.

Debug Port selection

Device debug port configuration can be enforced using this option. If checked, the device OPTION bytes will be forced to use the

selected Debug port.

8051

SP41 mask B11 support.

HC12

S12ZVCxx, S12ZVCAxx support.

winIDEA

Python

A dedicated Python run-time is shipped in setup to allow stable operation of Python based components (daqIDEA, A2L,

RMAGenerator).

iSYSTEM, January 2017 124/167

9.12.150 (4.2.2014)

CPU Support

V850

Serial Port speed selection

Device serial port (used in initial communication) can be configured to a lower speed. This allows operations on less stable target

boards.

Real-time access

Real-time access to local RAM on RH850 P1x devices is supported.

On-Chip Trace buffer support

Full feature set of the OCTB module is supported.

iSYSTEM, January 2017 125/167

9.12.151 (7.2.2014)

CPU Support

V850

Renesas XML SFR definition files supported

All RH850 devices now use the Renesas XML definition files.

The Renesas XML format is also available for configuration as external SFR definition.

PowerPC

e200 MPU plugin

The state of the MPU module on e200 cores is shown via Plugin/e200 Memory/MPU.

iSYSTEM, January 2017 126/167

9.12.153 (24.2.2014)

CPU Support

V850

RH850 On-Chip Trace Buffer support

All features of the OCTB are usable. Profiler and Coverage functions operational.

TriCore

New devices

TC234LP

iSYSTEM, January 2017 127/167

9.12.157 (5.3.2014) Verified Build

MPC5xxx, MPC5xx, PPC4xx, HCS12/S12X, V850, RH850, Cortex-M0/M1/M3/M4, Cortex-R4, Cortex-A8/A9, ColdFire,

ARM7/9, XC166/XC2000, TriCore, 68K, CPU32, TMSx70, STM8, HCS08, 78K/78K0R/RL78, R8C, CR16 JOWI, CoolRISC and

Biotronik

CPU Support

ARM

New devices

EFM32LG

PowerPC

MPC57xx

OTP UTEST flash programming supported.

iSYSTEM, January 2017 128/167

9.12.158 (11.3.2014)

CPU Support

S12

New devices

S12ZVHY64 (Lumen2W)

V850

New devices

uPD76F0115

RH850/F1L 48-pin

PowerPC

e200 SPU plugin

The state of the SMPU module on e200 cores is shown via Plugin/e200 Memory/SMPU.

iSYSTEM, January 2017 129/167

9.12.159 (28.3.2014)

CPU Support

V850

RAM Initialization

Fast RAM initialization for V850E2/xx4 and RH850 implemented.

winIDEA

Analyzer

Coverage merge multiple session

Results from multiple coverage sessions can be merged.

Note: all results must have been obtained with the same target code.

Merging can only be performed via SDK call from an external script.

See SDK help for an example.

SDK

Python SDK download

A direct link to Python SDK distributable is provided via Help/SDK/Download Python SDK.

The downloaded ZIP file matches the version of winIDEA. It includes installers for 32-bit and 64-bit Python 2.7 and 3.3.

To install an SDK, open the ZIP file and navigate to isystem-connect-python\installer folder and run the appropriate executable.

iSYSTEM, January 2017 130/167

9.12.161 (8.4.2014)

winIDEA

IPython Console

IPython console is now distributed with winIDEA and can be invoked via Tools/IPython Console menu.

When opened, the standard isystem.connect imports will are pre-imported and a connection to winIDEA is established.

Per default a CDebugFacade dbg object and CIDEController ide object are created.

iSYSTEM, January 2017 131/167

9.12.162 (17.4.2014)

CPU Support

ARM

Kinetis KE02Z support.

ATSAM4E support.

PowerPC

MPC5777C (Cobra55) support.

S08

MC9S08AP16,MC9S08AP8 and MC9S08AP4 support.

Tricore

Key exchange by DAP implemented.

V850

RH850F1H supported OCTB and SFT.

winIDEA

Breakpoints

Execution breakpoints allow definition of a Python script to be

called when a breakpoint hits.

iSYSTEM, January 2017 132/167

9.12.165 (8.5.2014)

CPU Support

ARM

Kinetis KL26 support.

NXP LPC1500, LPC4000 support.

PowerPC

Freescale QorIQ P1021 support.

RL78

RL78/F14 devices supported by AGT POD and OCD.

RL78/F13 (64k) devices supported by OCD.

S08

Internal oscillator trimming implemented for MC9S08AC.

S12Z

MC9S12ZVML32,MC9S12ZVML64,MC9S12ZVMC64,MC9S12ZVML128,MC9S12ZVMC128 support.

STM8

STM8AF52xx, STM8AF62xx support.

XC800

TLE983, TLE9834 support.

iSYSTEM, January 2017 133/167

winIDEA

Symbols

Tail call and tail merge info displayed for a function. These optimization can affect debugging and profiling.

Functions which are tail-called

Address field displays information that the function is tail-called (jumped to its entry point)

Functions which are tail-merged

Address field displays information at what address the function is tail-merged into (jumped to that address)

Exits (tail-call or tail-merge)

Type field indicates the type of the exit. Either a Tail-merge or Tail-call are displayed along with the name of the function into

which they merge/call.

Eclipse

Eclipse plugin now supports the Renesas E1 emulator.

iSYSTEM, January 2017 134/167

9.12.168 (2.6.2014)

CPU Support

ARM

Kinetis KL63, KL64 support.

ATSAM4E boot mode selection added.

PowerPC

Multi core synchronization implemented on McKinley, Matterhorn,K2 and Cobra55 MCUs.

BAF block programming enabled on Calypso (MPC5748G)

V850

Profiler range mode enabled for RH850.

iSYSTEM, January 2017 135/167

9.12.170 (11.6.2014)

CPU Support

ARM

Spansion FM0 (S6E1A) supported

Atmel SAM G devices supported.

Tricore

TC297TE,TC297TF and TC267D.

V850

Profiler range mode enabled for RH850.

SDK

Perl

SDK for Perl 5.14.4 added.

iSYSTEM, January 2017 136/167

9.12.174 (26.6.2014)

testIDEA

Added variadic function support – functions which take a variable number of arguments. At the moment this is limited to compilers

which report such functions correctly.

SDK

Perl

Method CDataController::writeMemoryFast() added.

This method is much faster (sometimes more than 2x) than writeMemory(), because no access info is returned.

winIDEA

SFRs

External SFR support for winIDEA format – files specified in winIDEA format can be used as external source too.

These SFR scenarios are now verified:

1. Default

CPU reported by iOpen is loaded

winIDEA/SFR subfolder (in case it was online updated)

from internal winIDEA DB

iSYSTEM, January 2017 137/167

2. Override internal CPU

Same load algorithm as above, just the name is not what is reported, but picked from a list of all winIDEA internal DB CPUs

3. External SFRs

Use case: existing internal SFRs must be modified.

Procedure:

perform online update

Copy winIDEA SFR folder to

a new location

Modify the SFR/SFG files as

necessary

Configure the dialog to use

external SFRs in winIDEA

SFR format, specify the path

to the SFR file

iSYSTEM, January 2017 138/167

3.1 Example

CPU Vendor provides multiple SVD file for a device.

Create a new SFR folder and copy winIDEA/SFR files there

Open the corresponding .SFR file

Add the SVD file references to it.

HEADER NXP Cortex-M3 LPC1549 FLASH LPC15x9 GROUP "General Purpose Registers" 1 { GROUP "M3 SystemUser" 0 } GROUP "System Control Space" 1 { GROUP "M SCS SCB" 0 GROUP "M SCS SystemControlAndID" 0 GROUP "M SCS NVIC" 0 GROUP "M SCS SysTick" 0 } SVD "LPC1500.svd" SVD "LPC1500_EXTRA.svd"

4. External and internal SFRs

Use case: a 3rd

party SFR description (currently supported formats are ARM SVD and Renesas XML) is provided. Such files are

typically incomplete as they don’t describe GPRs or the FLASH geometry.

Procedure:

Select a generic core CPU which matches the used device. This is loaded as in case #2

Select the external SFR file format and specify the file path

iSYSTEM, January 2017 139/167

9.12.174 (2.7.2014)

CPU Support

Tricore

External BP reservations – any of the 4 BP

pairs can be reserved for external client usage

(Tricore 1.6 only = all AURIX).

Specified breakpoint pairs will not be used by

winIDEA for debug operations and they will

be disabled in the hardware breakpoint dialog.

SDK

Services

Access to emulator reboot function is

provided via:

IDEController.serviceCall("/IOPEN/HW.HW.Reboot", "")

winIDEA

SFRs

Address of SFR register can be obtained in a watch expression (or externally via iConnect) using C address-of operator:

&@register

iSYSTEM, January 2017 140/167

9.12.180 (8.8.2014)

CPU Support

ARM

Kinetis K20D120M trace support.

Kinetis EA family support.

TM4C12xx trace support.

Atmel SAM D family support.

NXP LPC1115 support.

PowerPC

Debug Cache Hardware Coherency supported on Calypso.

Nexus MDO trace supported on Calypso.

HCS08

MC9S08PA16,MC9S08PA8 and MC9S08PA4 support.

winIDEA

Watch

A structured type can be fully expanded by selecting Expand Full

from context menu. This will not expand pointers (to prevent infinite

loops in linked lists).

SFRs

SFR refreshing can be time limited. This prevents

winIDEA from becoming unresponsive in case

large very number of SFRs are shown or access

errors to some SoC module occur.

Full: time after which the window refresh is

aborted

Group: time after which the refresh of a SFR

group is aborted.

Group is access error occurs: if any register

cannot be read from a group, the entire group

refresh is aborted.

Location: Tools/Options/SFR Window

iSYSTEM, January 2017 141/167

SDK

Document control

All open documents can be saved with this function.

IDEController.saveAllDocuments()

iSYSTEM, January 2017 142/167

9.12.185 (22.8.2014)

winIDEA

Analyzer

Coverage HTML export - added expandable conditions coverage data.

CPU Support

V850

Code flash programming for RH850/F1H supports flash bank B + extended user area.

iSYSTEM, January 2017 143/167

9.12.191 (29.9.2014)

CPU Support

ARM

Spansion FM4 trace support.

CMSIS-DAP

ARM CMSIS-DAP interface debuggers supported by winIDEA.

PowerPC

BAF block programming supported on McKinley and Matterhorn.

Calypso 3M support.

MPC5775N (RaceRunner) cut2 support.

SPC574S60 (Sphaero) support.

V850

RH850/F1H dual-core debugging and reset/download synchronization from primary to secondary core.

RH850/F1H PG-FP5 mode flash programming support.

LPD debug interface performance improved.

CPU Break on OCT buffer full trace trigger option.

Tricore

TC222L,TC223L and TC224L support.

iSYSTEM, January 2017 144/167

9.12.195 (14.11.2014)

CPU Support

ARM

STM32L1 EEPROM programming support.

STM32L0 family support.

PowerPC

SPC564A74 support.

V850

OCTB Trace stop CPU/upload/restart mode.

RL78

Support for RL78 version of Renesas sfrx files.

Tricore

SDK

Python scripts can now save test report in format suitable for Jenkins/Hudson

iSYSTEM, January 2017 145/167

9.12.202 (19.11.2014)

CPU Support

Support for multiple SVD files in .SFR file.

ARM

Trace support for Spansion FM4 S6E2C devices.

PowerPC

Real-time access to performance measurement registers (PMCx, PMGCx, PMLCx).

These are read as SFRs. When CPU is stopped regular OnCE access is used, while in running a direct JTAG scan access is used.

winIDEA

Expression evaluator

Expression evaluator reserved keyword decltype_ref. Used for testIDEA temporary variable creation.

C++ overloaded function support – can be discerned by list of parameters.

iSYSTEM, January 2017 146/167

9.12.206 (1.12.2014)

CPU Support

ARM

Tiva C TM4C129 support.

Spansion MB9BFD1xS support.

8051

SP41 mask C supported

winIDEA

Memory dump

When exporting from a FLASH device, Motorola-S and Intel HEX flash export file contains programmed cells only.

SDK

Analyzer

Added methods to obtain exact status of analyzer document and set its dirty status.

CAnalyzerDocController::getAnalyzerSessionStatus()

CAnalyzerDocController::getDocumentStatus()

iSYSTEM, January 2017 147/167

9.12.211 (16.12.2014)

CPU Support

PowerPC

Freescale QorIQ P1014 support.

Tricore

TC234LF support

SDK

Debug

Added method which checks stop address; if CPU did not stop at the given function, an error code is returned or exception is thrown.

CExecutionController::runUntilFunction()

iSYSTEM, January 2017 148/167

9.12.214 (13.1.2015)

CPU Support

ARM

TMS570LC4357 support.

STM32L100 support.

S12

Setting WR BP from watch window provided for S12X.

Tricore

TC21xL/S support

iSYSTEM, January 2017 149/167

9.12.220 (27.1.2015)

CPU Support

ARM

AM335x Sitara support.

STM32F334 support.

SDK

Python

Python 3.4 is now supported.

32-bit and 64-bit versions are supported.

Installers are added to SDK.

iSYSTEM, January 2017 150/167

9.12.225 (9.4.2015)

CPU Support

PowerPC

MPC5746G, MPC5747G support.

MPC6xx, MPC82xx, MPC512x, MPC83xx, MPC85xx and QorIQ P1/P2/P3 supported on iC5500 and iC6000.

winIDEA

Debug

Init scipt extended with COPY command.

RTOS

rcx RTOS plugin updated to support profiling of rcx version 2.1.x.x.

uC RTOS plugin now supports version 3 of the uC RTOS. Old plugin deprecated.

iSYSTEM, January 2017 151/167

9.12.232 (1.4.2015)

CPU Support

Cortex

External trace supported on iMX6Q.

Synchronous trace supported on STM32F303, STM32F358 and STM32F398.

Spansion S6E2DH (FM4) supported.

PowerPC

Unlock with password supported on Monaco, Mamba and Andorra MCUs.

SPC560B50L1 supported.

TriCore

TC26x step B supported.

RH850

RH850 support for ID Authentication mode added.

winIDEA

Debug

Added support for backclash when specifying SFR bitfields. On incomplete SFR paths, backslash can be used to specify a bitfield:

@REG\FIELD

SDK

Added method CProfilerController2::addAuxArea(), which configures recording of AUX inputs by the Analyzer.

iSYSTEM, January 2017 152/167

9.12.241 (10.6.2015)

CPU Support

RH850

RH850/F1H multi-core Relay break supported.

ICU activation and All Erase supported. Improved Option byte preset.

User Trace Port now supports a trigger comparator.

Support for R7F701060, R7F701062, R7F701064 and R7F701071 added.

FP5 programming mode now programs the flash in minimum possible blocks (256-byte for Code Flash and 64-byte for Data Flash).

PowerPC

Support for SPC58EG84 added.

SPT debug supported on Racerunner.

TriCore

Support for TC264DA and TC264DA step Ax added.

Cortex-M

Kinetis KV3x family supported.

Support for LPC541xx, LPC511A added.

Boot mode selection added for XMC1000.

Cortex Access Breakpoints can now be set for data read, write or read / write.

78K

Hardware execution breakpoints disabled on RL78 ICE.

winIDEA

Analyzer

Support for qualified function names added to the coverage configuration tab.

Plugins

Plugin for Pike OS added.

SDK

Added CRemoteFileController class, which supports copying of files from loval host running Python script to remote host running

winIDEA.

Added method CTestLocation::setSrcFileLocation(), which can be used to define source location in the script at test runtime.

iSYSTEM, January 2017 153/167

9.12.252 (19.8.2015)

CPU Support

PowerPC

Support for QorIQ P1022 and P1013 added.

Nexus double data rate supported on Calypso and Calypso3M.

Alternate flash block programming supported on McKinley, Panther and RaceRunner.

SPT debug supported on Racerunner.

Unlock with password enabled on Racerunner.

Aurora Trace supported on SPC58NE emulation devices.

UTEST block programing supported on Eiger.

TriCore

Support for TC1793ED, TC222S, TC223S and TC224S added.

V850

Support for RH850/R1L added.

Support for RH850/E1L added on Renesas E1 plugin.

Added trigger comparator for User Trace Port state analyzer.

Multi-core trace supported on RH850/F1H.

78K

Software breakpoints now automatically used on 78K, 78K0R and RL78 Active PODs.

Cortex

Added support for MK22FN256, MK22FN512, and Atmel SAM4L family.

Segger plugin JLinkARM SDK updated to version 4.98e.

Cortex-M7 supported on Segger.

S12

Support for MC9S12ZVLxx, MC9S12ZVLAxx and MC9S12ZVLSxx (BigKnox) added.

Option 'Use fixed BDM clock' enabled for all HC(S)12 MCUs.

8051

Support for TLE9831 added.

iSYSTEM, January 2017 154/167

9.12.255 (14.9.2015)

CPU Support

Cortex

Support for MB9DF125, STM32F302K8 added.

EFM32LG/GG User data flash area supported.

TriCore

SFRs for HSM added.

RH850

RH850/E1L R7F701205 supported on iC5000.

PowerPC

Freescale MPC5xx Nexus debug and trace supported on iC5000 platform.

Plugins

XCP

IO Module supported through XCP (DIN, AIN0, AIN1).

9.12.256 (20.10.2015)

CPU Support

Cortex

ETM now supported on ETB for AM335x.

Analyzer

Coverage XML export

Node <src><l><al><a> added. It contains address as text.

iSYSTEM, January 2017 155/167

9.12.257 (22.09.2015)

User Interface

Added a link to examples to Help menu and Select Workspace dialog.

CPU Support

Cortex

Support for STM32F303xD and STM32F303xE added.

S12Z

Support for MC9S12ZVMC256 added.

Renesas E1

Renesas E1 plugin EXEC updated to version E2.31.00.02

Renesas E1 plugin RH850 existing device files updated to V1.19

Support for R7F701057 added.

9.12.258 (02.10.2015)

CPU Support

Cortex

Support for Infineon XMC4700 and XMC4800 added.

ETM support added for AM335x ETB.

78K

Support for RL78 F15 added.

iSYSTEM, January 2017 156/167

9.12.259 (14.10.2015)

CPU Support

Cortex

Support for Infineon EFM32G200Fx added.

PowerPC

Support for Chorus 1M added.

RH850

RH850/F1H Nexus port Double-Data-Rate supported.

Support for Renesas R7F701318 (RH850/P1M) added.

9.12.260 (05.11.2015)

CPU Support

Cortex

Support for EFM32G200Fx, XMC1400 added.

S12

Support for MC9S12VR16 and MC9S12VR32 (Tomarino) added.

9.12.262 (09.11.2015)

CPU Support

PowerPC

Support for S32R274 (RaceRunner Ultra) added.

iSYSTEM, January 2017 157/167

9.12.263 (20.11.2015)

CPU Support

PowerPC

Support for MPC5747C, MPC5748C added.

Unlock with password supported on Leopard2M and Pictus.

256bit passwords supported.

9.12.266 (03.12.2015)

CPU Support

PowerPC

Custom RAM initialization supported.

9.12.267 (11.12.2015)

Segger plugin

ARM Cortex-R5 and Renesas RX cores now supported.

Analyzer

Added option to disable timer interpolation.

iSYSTEM, January 2017 158/167

9.12.270 (01.02.2016)

CPU Support

PowerPC

Support for SPC58NE84 cut2, MPC577xN, SPC58EC80, SPC582C54, SPC582C50, SPC584C80, SPC584C74, SPC584C70,

SPC58EC74, SPC58EC70 added.

Unlock with password enabled for Chorus and Eiger devices.

SPTv2 instruction set supported.

Cortex

Freescale Kinetis KL17Z, KL27Z, KL33Z, KL43Z, KE04, KE06, Atmel ATSAM3X, Texas Instrument RM46 supported.

RH850

Renesas E1 plugin support expanded with F1L/512k/176 and F1M 1M5/2M/176 device files

Analyzer

Profiler statistics for regular variables added (average, min, and max value, times of min and max value.)

Conditional instructions can be optionally treated as non-conditional if condition outcome is not possible to obtain from trace.

Watch

C++ references can now be modified.

iSYSTEM, January 2017 159/167

9.12.271 (12.02.2016)

CPU Support

XE16

Infineon XE16xx SFRs added.

Cortex

Support for LS1020 added.

SPI flash Support

Support for Fidelix FM25M32A/64A SPI flash added.

9.12.273 (11.03.2016)

CPU Support

V850

SFRs for 70F3426 added.

Software trace is now supported for the RH850/F1H secondary core as well.

Cortex

Supported cJTAG debug protocol for CC26xx devices.

SWO tracing supported on TI CC2650

Plugins

RH850 Time / performance unit plugin added. It can control the TPU unit and show the measured data.

Watch

Last valid read value is shown, even if access fails later. The same color is used if the access failed to indicate it is not currently

valid.

SPI flash Support

Support for Numonyx M25P128 SPI flash added.

iSYSTEM, January 2017 160/167

9.12.274 (25.03.2016)

CPU Support

S12Z

Support for MC9S12ZVMB48/64 and MC9S12ZVMBA48/64 added.

TriCore

Option "Allow HSM sector (S6, S16, S17) erase / programming" added, which prevents accidental changes of the HSM sectors.

Cortex

Support for XMC4300 added.

NVM User Row programming now supported on Atmel SAM D devices.

PowerPC

SPC58EC SFRs updated.

iSYSTEM, January 2017 161/167

9.12.275 (30.03.2016)

CPU Support

Cortex

Support for Atmel SAM C added.

Disassembly window

Disassembly window can now show the file name and line number of the belonging source files. To use this feature enable it in the

Disassembly view Options.

Debug

Symbol Lines on same address or on same source position can be merged. This means if compiler generates multiple syymbol lines

for the same source line, winIDEA will merge them into one. Similarly, if multiple line symbols are specified for the same address,

winIDEA will try to merge them. Enable Merge line symbols in Files for download / Download files / Properties / Advanced:

iSYSTEM, January 2017 162/167

9.12.276 (19.04.2016)

CPU Support

PowerPC

MPC5748G CAN SFRs updated.

Support for SPC570S50E1/E3 and SPC570S40E1/E3 added.

Cortex

Atmel SAM3X SWO trace supported.

Freescale Kinetis KM3x and KM1x supported.

V850

RH850/F1K Emulation Adapter and User Trace Port supported.

Plugins

Renesas E1 plugin EXEC updated to version E2.40.00.05 for the RH850 family.

9.12.278 (12.05.2016)

CPU Support

Cortex

Kinetis KM34Z and Cypress Traveo S6J328 devices supported.

PowerPC

MPC5745R and MPC5743R supported.

S12Z

MC9S12ZVMA32/16 and MC9S12ZVMAL32/16 supported.

RH850 Time/Performance unit plugin

RH850 devices feature one Time / Performance measurement unit (TMU) per core. This unit can be used to count various events

(CPU cycles, cache accesses…) and measure time (by counting debug clock cycles). The plugin offers a convenient way to

configure and inspect these units.

iSYSTEM, January 2017 163/167

9.12.279 (30.05.2016)

CPU Support

PowerPC

Support for Eiger EMU cut2 added.

It is now possible to program the UTEST memory on Rainier.

Renesas E1 plugin

Renesas E1 plugin RL78 EXEC updated to version V1.05.

9.12.280 (18.06.2016)

CPU Support

Cortex Support for Cypress FM0+ S6E1C3, FM4 S6E2G, FM4 S6E2H, MB9BF564 and MB9BF564 added.

Micro Trace Buffer (MTB) supported on Cypress FM0 family.

PowerPC

Support for Chorus1M EMU added.

RH850

Support for RH850/F1K device R7F701581, F1H-4MB PRE device R7F701527x and RH850/D1M family added.

TriCore

Support for TC297TA added.

Debug

New reset method was added for Cortex-A and Cortex-R devices, called Set BP and wait. It is intended for use with devices, where

the debug module is not accessible immediately after reset. Refer to the documentation for more information on this reset method.

9.12.282 (8.7.2016)

CPU Support

Cortex

Support for Cypress Traveo S6J323/4/5/7 added.

Support for ST STM32F469 and STM32F479 added.

PowerPC

Support for SPC58NN84 (Bernina) added.

iSYSTEM, January 2017 164/167

9.12.284 (29.7.2016)

CPU Support

Cortex

Cypress Traveo S6J3200 family expanded with new variants. Device variant names have changed. Please reselect your device if

workspace was created with older version of winIDEA.

Support for ADuCM33x added.

Support for LS1021A revision 2 added.

Support for Cypress PSoC 5LP and PSoC 4M added.

9.12.285 (04.08.2016)

CPU Support

Cortex

Simplified cross trigger matrix supported on iMX6, which at this point can be used for multicore synchronization. Updates will be

released later.

PowerPC

Support for Chorus4M EMU added.

9.12.286 (25.08.2016)

CPU Support

TriCore

Support for TC234LA, TC234LX, TC234L, TC233L_TC297TB, TC297TY, TC297TX, TC299TX and TC299TY added.

Support for Aurix+ TC39x added.

S12G

Support for S12GNA16, S12GNA32, S12GA48, S12GA64, S12AG96, S12GA128, S12GA192 and S12GA240 added.

RH850

Support for RH850/P1H-C added.

Cortex

Support for TLE984x , TLE986x and TLE987x added.

iSYSTEM, January 2017 165/167

9.12.288 (23.11.2016) Verified build, contains mostly bug fixes.

9.12.289 (9.9.2016)

CMSIS-DAP

Micro Trace Buffer (MTB) supported.

CPU Support

RH850

RH850/E1M support added.

Cortex

Support for STM32F76x and STM32F77x added.

9.12.290 (5.10.2016)

CPU Support

RH850

RH850/F1L/F1K Emulation Adapters supported on iC5500 and iC5700

Cortex

Added support for STM32F767 and STM32F777.

9.12.291 (26.10.2016)

CPU Support

Cortex

Added support for STM32F44, STM32F401 and STM32F4116.

PowerPC

Low Power Debug supported on Chorus1M.

Nexus Double data rate supported on Chorus1M and Chorus4M.

RH850

RH850 Stop After Target RESET option supported.

iSYSTEM, January 2017 166/167

9.12.292 (10.11.2016)

CPU Support

Cortex

Added support for i.MX6UL.

TriCore

Extended Trace Memory (XTM) supported as trace storage memory on Aurix+ devices.

RH850

Reduced the time where CPU is stopped while the breakpoint is being set.

PowerPC

Support for NXP QorIQ P1 platform P1024/P1015 added.

9.12.293 (15.11.2016)

CPU Support

RH850

Added support for RH850/D1L.

iSYSTEM, January 2017 167/167

9.12.294 (7.12.2016)

CPU Support

RH850

Support for RH850/D1M1 added.

Cortex

Support for Cypress S6J331CJ added.

Option to disable reset output added.

External FLASH

Supported Micron MT28EW01G NOR flash.

RTOS

RTOS model changed to support multiple RTOS instances.

Hardware

Removed support for the original iC3000 hardware. iC3000HS and iC3000GT remain supported.

9.12.295 (12.1.2017)

CPU Support

PowerPC

HSM trace supported on Chorus4M.

Support for QorIQ P2 platform P2010 added.