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8/8/2019 VLSI Fab - Lectures
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S. Go alan Amrita Viswa Vid a eetam 24.01.05
VLSI Fabrication
Semiconductor materialsCrystal structuresDefects in crystals
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Classification of Materials Based on mechanical / physical properties:
Metals
Ceramics (compound of metal and non-metal) Polymers (chains of carbon-carbon and carbon-hydrogen bond)
Based on electrical properties:
Conductors ( = 10-4
10-6
ohm.cm) Insulators ( = 10 10 ohm.cm) Semiconductors ( = 10 10 10 -4 ohm.cm) Superconductors
Based on ordering of atoms: Crystalline Amorphous Partially crystalline
Based onatomic natureand bonding
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Periodic TableSemiconducting region
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Ternary compounds: Al xGa 1-xAsElectronics : Si
Optoelectronics : binary (GaAs), and ternary compounds
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(a) Metallic bonding (b) Ionic bonding
Chemical bonding in solids
In sodium chloride (NaCl), Nabeing highly electropositive, givesone electron to chlorine (which ishighly electronegative).
Positive ions in a sea ofelectrons.
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Chemical bonding in solids
In Covalent bonding, the atomsinvolved share the electrons inthe outermost shell equally e.g.
Si, CH4, diamond, etc
In Van der waalls bonding ,coulumbic forces hold moleculesor layers of atoms together.
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Crystalline: ordered arrangement of atoms throughoutthe solidAmorphous: random arrangement of atoms in lattice(no order)Partially crystalline: partial short range order (e.g.some polymers)
Grain boundary
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Crystalline structure can be of two types:
single crystal - planes of atom oriented in thesame direction throughout the solid
Polycrystalline - planes of atoms in adjacent
regions (grains) oriented along different directions Silicon substrates used for VLSI Circuits: single
crystal silicon Gate electrode for MOSFETs:Polysilicon
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y
x
z
c
ba
Structure of crystalline solids
A UNIT CELLis the is the smallest cell in a lattice, whichwhen replicated by transalation, rotation etc., yields theentire soild.
Lattice: 3-dimensional array of points in space
Unit cell is characterized by latticeparameters
a, b, c : edge lengths along x, y, andz directions
, , : inter-axial angles between x-y, y-z, and z-x respectively.
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Structure of crystalline solids
Seven crystal systems exist based on geometry (latticeparameters) of unit cell:
Cubic : a = b = c; = = = 90
Hexagonal : a = b = c; = = 90 ; = 120
Tetragonal : a = b c; = = = 90
Rhombohedral : a = b = c; = = 90
Orthorhombic : a b c; = = = 90 Monoclinic : a b c; = = 90
Triclinic: a b c; 90
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1. Fix coordinate system and choose vector along direction in thelattice.
2. Determine components of vector along axes.3. Reduce to lowest set of integers.4. Equivalent [100] directions indicated as .
Miller Indices for Directions
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Miller Indices for Planes
Take reciprocals of intercepts and reduce to lowest set of integers, unless intercept is fraction of unitcell edge.
Choose coordinate systemwith origin at any latticepoint and orient axes alongedges of cube.
Determine intercepts of
planes with axes in multiples of unit cell edges.
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{ } : used to denote family of planes. {100} : (100), (010), (001), (100), (010), (001)
Equivalent sets of (100) planes by
rotation of the unit cell within the cubiclattice: e.g. {100} planes.
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Basic Crystal Structures
Cubic structures
Hexagonal Close Packed (HCP)
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Crystal structures of Si and GaAs
SiGaAs
Diamond structure
For Si, one silicon atom occupies all FCC positions + one siliconatom occupies tetrahedral sites formed by 1 corner atom and 3adjacent face centered atoms
Can be thought of as two interpenetrating FCC structures
Zinc Blende (ZnS) structure
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Simple Cubic (SC)
Cell parameters
Latticeconstant a
Atomic radius r
Number of atoms per unit cell: 8 corner atoms each shared by 8 adjacentunit cells 8 x (1/8) = 1 atom/unit cell lattice parameter in terms of atomic radius: a = 2r, where r is the radiusof atom.
atomic density = number of atoms per unit cell / unit cell volume = 1/(a3
) Number of nearest neighbors : Each corner atom is in contact with 6adjacent corner atoms
Atomic packing fraction (APF) = Volume of atoms in unit cell/ unit cell vol
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Crystal structures of Si and GaAs
a
43
crystal lattice is face centered cubic (FCC), with two atombasis [at (0,0,0) and (1/4, 1/4, 1/4) ]
- two interpenetrating FCC lattices- lattice constant a: cube side length
silicon (rm temp): 5.43 ; GaAs: 5.65 nearest neighbor distance dn =
Atoms/unit cell:
4 atoms inside cube6 atoms half inside at face centers8 atoms 1/8 inside at cornerstotal of 8 atoms unit cell
atomic density : 8 / a3
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Defects in Crystals
Point defects : missing atoms, extra atoms,impurity atoms
Line defects : Edge dislocation, screw dislocation
(1-Dimensional)
Area defects : stacking faults, etc (2-D)
Volume defects : precipitates of impurities (3-D)
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Point defects vacancyvacancy substitutionalimpuritysubstitutionalimpurity
interstitialimpurityinterstitialimpurity
selfinterstitialselfinterstitial Frenkel defectFrenkel defect
Schottky: cation-anion vacancy (e.g. Na+ and Cl-)
Impurities can eitheroccupy substitutional orinterstitial sites
Interstitials can haveatoms of same type (selfinterstitials) or impurity
atoms
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Defect concentrations
n Natomic
e E 2 k T vacancy-interstitial pair:Frenkel defect
Eformation ~ 1 eV T = 300K:n ~ 1014
T = 1300K:n ~ 1021
n Natomic e E k T
Eformation ~ 2 eV T = 300K:n ~ 0
T = 1300K:n ~ 1015
isolated vacancy:
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Rate constants andArrhenius plots
thermally activated process i.e., process must
thermally overcome anenergy barrier
plot log(y) vs 1/Tif process has the simplethermally-activated behavioryou will get a straight line!
kTE
o
A
eyy
=
0.000 2
0.000 4
0.000 6
0.000 8
400 600 800 1x10 +003 1.2x10 +003 1.4x10 +003
temperature
y EA
= 1eV
EA = 0.5eV
0.001 0.001 5 0.002 0.002 5 0.003
1x10 +005
1x10 +010
1x10 +015
1/[temperature]
log[y] EA = 1eV
EA = 0.5eV
27C250C500C1000C
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Line Defects:
Edge dislocation
Edge dislocation: extra half plane of atoms in lattice Formation energy is high, concentration usually low
Dislocation line is to plane of paper Above dislocation line bonds are stretched Below dislocation line, bonds are compressed Dislocation can move (in this case, left or right) the plane
on which the dislocation moves is called slip-plane
extra plane of atoms
dislocation
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Line Defects:
Screw dislocation
screw dislocations are most commonly formed duringcrystal growth
Burgers vector indicates the magnitude and direction ofdislocation: in this case it is parallel to dislocation line.
Screw dislocation: aportion of crystal is shiftedby a lattice distance byshear stress
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VLSI Fabrication
Defects in crystals
Si wafer fabricationZone refining
28.01.05
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Topics of last class
Crystalline and amorphous materials Single crystal and poly crystal structures
Semiconductor materials Basic crystal structures Crystal parameters and Miller indices Structure of Si and GaAs Defects in crystals
Point, line, area and volume defects
Point defects and line defects Vacancy, interstitial, substitutional impurity, frenkel, schottky Edge and screw dislocations
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Line Defects:Edge dislocation
Edge dislocation: extra half plane of atoms in lattice Formation energy is high, concentration usually low
Dislocation line is to plane of paper Above dislocation line bonds are stretched Below dislocation line, bonds are compressed
Dislocation can move (in this case, left or right) the planeon which the dislocation moves is called slip-plane
extra plane of atoms
dislocation
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Line Defects:Screw dislocation
screw dislocations are most commonly formed duringcrystal growth Burgers vector indicates the magnitude and direction of
dislocation: in this case it is parallel to dislocation line.
Screw dislocation: aportion of crystal is shiftedby a lattice distance by
shear stress
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B B B B
B B B B
C C C C
C CCC
A A A A A
A A A A A
A A A A A
B B B B
B B B B
C C C C
C CCC
A A A A A
A A A A A
A A A A A
B B B B
B B B B B
BBBBB
B
B
If atoms in a particular layer arearranged in positions A, thenthe following layer of atoms cango to position B or position C.
After B, the next layer can beeither C or A
Stacking sequences in crystals
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Area defects: stacking faults
Stacking sequence example :
A B C A B C A B C .. A B A B A B A B
Missing or extra plane causes a 2-D defect or stacking fault A B C A B C A B A B C (missing plane C) A B A B A B C A B (extra plane C)
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Volume defects: precipitates or 2 nd phase
The crystal structure of precipitate could be very differentfrom the original lattice
undesirable in active region of wafer
O 2 precipitates in inactive regions are sometimes beneficialfor gettering (removal of defects)
If impurity atoms in aparticular region getclustered together, then a
2nd phase is formed.
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Gettering Precipitates tend to act as trap sites for dislocations, and other
defects. By having a highly strained regions (such as scratching the
back side of wafer), extrinsic gettering can be achieved. By having O2 precipitates away from the active region (in the
substrate), you can reduce defects in channel region by pull
them away called intrinsic gettering. Denuded zone depth in wafer below which precipitates are
present (20-30m)
Denuded zone depth needs to be optimum.
p-type siliconp-type silicon
poly (gate)poly (gate)
oxide (channel insulator)oxide (channel insulator)channelchannelchannel
n-type silicon n-type siliconsource drain
n-type silicon n-type siliconsource drain
Denuded zone
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Fabrication Starting Point: Step1: Metallurgical grade Si from SiO2 (quartzite)
Quartzite is heated with coke, charcoal, etc in an electricarc furnace to give 98% pure Si
SiO2 (s) + 2C (s) Si (l) + 2CO
Step 2: Pulverized Si is treated with anhydrous HCl at300C to form tri-chloro Silane (SiHCl3)
Si + 3HCl = SiHCl3 + H2
Electrode
Liquid Si
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Fabrication Starting Point:
Step 3: Fractional distillation of SiHCl3 to removeunwanted impurities
SiHCl3 is a liquid at room temperature with a boiling
point of 32C Step 4: Reduction of SiHCl3 in Hydrogen to form
Electronic Grade Si (EGS)
SiHCl3 + H2 = Si + 3HCl Reaction takes place in a reactor containing a
resistance heated Si rod which serves as anucleation point for deposition of Si
Impurity in ppb range
Polycrystalline Si obtained
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Step 5: Czochralski Bulk Crystal Growth
Insert a single crystal Si seed into melt Pull crystal SLOWLY (~ 4 mm/minute) while rotating (for
uniformity).
Container-less process. Results in very few defects.
seed
Grown crystal
silica crucible
Graphite susceptor
meltRF coil
Anticlockwise rotation
Molten Si at 1412 C.
For obtaining single cryustal Si from EGS
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Add dopants to melt, but
incorporation governed bydistribution coefficient or segregation
coefficient , k d = C S /C L. Common impurities areC and O from crucible.
Cs and C L are equilibrium concentrations of dopant insolid and liquid near interface
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Diameter increases as pull rate reduced. Industry growslarge 300 mm diameter boules or ingots .
As molten Si solidifies, it imitates the structure of theseed crystal and hence the process results in a hugesingle crystal
Czochralski Bulk Crystal Growth
images from Mitsubishi Materials Siliconhttp://www.egg.or.jp/MSIL/english/msilhist0-e.html
pull directionseed
rotation
M d li CZ h
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dm/dt = amount freezing per unit time = density Vpull = pull rate A = cross sectional area
Modeling CZ growth
latent heat of fusion (L): heat flux (power) released is
( ) pullvALtd
xdAL
td
mdL ==
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critical factor is heat flow from liquid to solid heat flux (power) balance
( )2
solid1
liquid pull
xd
TdA
xd
TdAvAL =+
Heat released
on solidification
thermal diffusion in liquidfrom hot liquid towards
solidification interface+
thermal diffusion in solid from solidification interfacetowards cooler sides/end of boule
=
Thermal conductivity of liquid Thermal conductivity of solid
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interface between liquid and solid should be an isotherm temperature fluctuations cause problems!
0
xd
Td
1
=
( )2
pull solid
d T L A v A
d xthermal current
= 14424 43
2
pull
solid
d T Lv
d x
= 2
pull
solid
d T Lv
d x
= or
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most of the heat is lost via radiation from the sidesof the boule
thermal current still proportional to cross sectionalarea A (diameter) 2 and v pull
if the heat sink is from sides of boule: thermal resistance inversely proportional to
perimeter diameter,
temperature change (voltage) = I thermal R thermal
( )[ ] pull pull vdiamdiam
constant vdiamconstant T = 2
( ) T vdiam pull 1
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F th ifi ti Fl t Z P
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Further purification: Float Zone Process Also called Zone Refining process
Used to grow Si with lower contaminations than obtained fromCzochralski technique
Start with a solid Si bar with a seedattached to the bottom. An RF coil isused to keep a small region molten.The RF coil is progressively moved
up.
segregation effects used intentionallyto purify semiconductor material
As float zone moves up, the liquidbecome more richer, while impuritiesare removed from the solid
The process is done in ancontrolled ambient using Ar
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Further Steps in (100) Si wafer fabrication:1. Grind boule into cylinder and put notch on {110}orientation.
2. Saw into wafers, and grinding/ polishing of damage.
3. Chamfer edges and chemical-mechanical polish front.
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desire is to keep number of chips (die) per wafer high, even as die size increases Several challenges with non-uniformities with
larger wafer diameter
1970 1975 1980 1985 1990 19950
50
100
150
200
250
300
W a f e r d i a m e t e r ( m m )
Year
Wafer diameter trends
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VLSI FabricationCzochralski process
Liquid Encapsulated CzochralskiBridgman processWafer specification
31.01.05
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Topics of last class
Area and volume defects Stacking faults and precipitates
Gettering Extraction of Electronic Grade Silicon from
quartzite
Czochralski crystal growth Relationship between pull velocity and temp
gradient in solid
Relationship between pull velocity and crystaldiameter
Float Zone process
G tt i g
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Gettering Process by which defects (e.g. metal atoms) diffuse through
the crystal and get trapped in a gettering site
O2 precipitates intentionally used in inactive region toremove defects away from active region.
Excess oxygen is trapped by rapid cooling. O2 precipitates
are formed when the supersaturated solution is annealed athigh temperatures
bulk wafer
device region
back side damage
bulk faults
mobile impurities
bulk wafer
device region
back side damage
bulk faults
mobile impurities
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Gettering
Precipitate shape and direction depends ontemperature of annealing 650C: Rod shaped along [110] direction in (100)
plane 800C: square precipitates on (100) planes with
[111] rounded edges
1000C: octahedra shaped precipitates
actual starting material oxygen concentrationand process determined by trial device faband performance evaluation.
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S 5 C h l ki B lk C l G h
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Step 5: Czochralski Bulk Crystal Growth
For obtaining single crystal Sifrom EGS
Molten Si at 1412 C.
Insert a single crystal Si seedinto melt and pull while rotatingin anticlockwise direction
Container-less process.Results in very few defects.
pull directionseed
rotation
pull directionseed
rotation
( ) T vdiam pull 1
As molten Si solidifies, it imitates the structure of theseed crystal and hence the process results in a hugesingle crystal
Diameter increases as pullrate reduced
C h l ki th i i l
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Initially, when seed comes in contact with liquid, there are alot of defects created at the interface due to thermal stress.In order to prevent these from agglomerating in the crystal,the initial pull rate is high (small dia neck minimizesdislocation).
Later, the pull rate is decreased to get desired diameter.This technique results in highly perfect crystal.
Boule and liquid container are rotated in opposite directionsto minimize temperature gradient in liquid.
Czochralski growth principles
I iti d i C h l ki th
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Furnace evacuated initially and then back filled with inertgas to maintain strict control of ambient.
Impurity redistribution at solid-liquid interface governed
by distribution coefficient or segregation coefficient ,kd = C S /C L.
Common impurities are C and O from crucible.
Most of oxygen escapes as SiO (g). Magnetic field commonly used to reduce concentration of
defects: the Lorentz force (qVxB) will keep the ionizedimpurities away from S-L interface ( magneticallyconfined CZ ).
Mag. field can be axial or transverse to boule.
Impurities during Czochralski growth
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Oxygen in CZ Silicon
concentrations typically in 10 16 - 10 18 cm -3 range segregation coefficient k ~ 1.25
more in solid than liquid
contact area between crucible and melt decreases asgrowth procedes
oxygen content decreases from seed to tang end
effects of oxygen in silicon ~ 95% interstitial; increases yield strength of silicon via
"solution hardening" effect as-grown crystal is usually supersaturated (occursabove about 6 x 10 17 )
I i i i h lid (C ) i b
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Impurity concentration in the solid (C s) at any point can beobtained as a function of initial liquid concentration C o,distribution coefficient k as:
where X is the fraction of liquid solidified
C S = k C o 1 X( )k 1
This assumes well-mixed liquid
In reality, the liquid is not well mixed dueto existence of re-circulation cells.
There is a region near the S/L interface,where very little mixing occurs called
boundary layer (b)
Recirculation cells
b
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The impurities entering solid must diffuse through
this region. Taking the effect of boundary layer into account, kcan be replaced by an effective segregation
coefficient k e
( ) DVbe ek k k
k += 1
Where V is the pull velocity, b is the boundary layer thickness, and D is impurity diffusivity
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Fl Z
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Float Zone process segregation effects used
intentionally to purifysemiconductor material
zone refining consists of
repeated passes through thesolid by a liquid zone
Where L is the length of fusionzone
float zone silicon used for highresistivity
Zone Refining k = 0.5
1E+16
1E+17
1E+18
position x (L=0.1)
C o n c e n
t r a t i o n
( # / c m 3
)
Pass 1
Pass 3
M difi i i FZ
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Modifications in FZ processDisadvantage of FZ process: doping concentration isnot uniform
Core doping
Start with doped polysilicon rod and deposit undopedpoly rod on top to get desired concentration (processcan be repeated)
Pill doping Dopant inserted through small holes drilled on top
Gas doping Gases such as PH3 or AsCl3 injected in the molten
zone
Transmutation doping (only for n-type doping) Isotope changed through exposure to neutrons
Ch ll i d i h h f G A
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Challenges associated with growth of GaAs:
Vapor pressure of Ga is 0.001atm while that of As is ~ 10atm at melting point of Si (1238C).
Arsenic evaporates and maintaining stoichiometry willbe difficult.
The thermal conductivity of GaAs (0.07W/cm-K)
is 1/3 rd of that of silicon (0.21W/cm-K) Heat dissipation is more difficult
Critical resolved shear stress for creatingdislocation is very small (1/4 th of silicon) at mp Very easy to create dislocations in GaAs
GaAs is typically grown by LEC or Bridgman methods
Li id E l t d C h l ki (LEC)
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Liquid Encapsulated Czochralski (LEC) A sealant material such as B2O3 is
used on top of GaAs to prevent outdiffusion of Arsenic.
B2O3 melts at ~400C and seals GaAs.
Seed crystal is inserted throughsealant on to GaAs.
Crystal growth occurs usually at~20atm (high pressre LEC).
Pull rates around 1cm/hr.
GaAs
B2O3
A slight excess of As isused to compensatefor some out diffusion
Bridgman Growth
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Bridgman Growth Solid Ga and As are fused into a fused silica ampoule, which
is later sealed. Smaller temperature gradients result in lower dislocation densities
Separate As chamber sometimes included in ampoule with
small orifice to maintain stoichiometry Tube furnace is made to pass through trough containing
ampoule (ampoule kept stationary to minimize disturbance).
Molten GaAs crystallizes at bottom. Seed can be used if necessary.
Crystal diameter typically 1 2. Growth of larger crystal
requires greater process control.
Ampoule
Seed
Comparing LEC and Bridgman methods for GaAs
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Comparing LEC and Bridgman methods for GaAs
Higher defect densities of >10 4 /cm 2 due to verticaltemperature gradient
Alloying with Indium (0.1%)can reduce defects, butmakes wafers more brittle
Used only for small diawafers.
Resistivity higher thanBridgman (100Mohm-cm)
Lowest dislocation density(< 10 3 /cm 2)
Large diameter possible Problem - low resistivitywafers Vertical bridgman or vertical
giant freeze methods
LEC Bridgman
Wafer preparation
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Wafer preparation Boule characterized for resistivity and crystal perfection Mechanically trimmed into proper diameter Wafer slicing
within 0.5
, within 2 5 off axis lapping grind both sides, flatness ~2-3 mm ~20 mm per side removed
edge profiling etching
chemical etch to remove surface damaged layer ~20 mm per side removed
polishing chemical-mechanical polish, SiO2 / NaOH slurry ~25 mm per polished side removed gives wafers a mirror finish
cleaning and inspection
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W f ifi ti
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Wafer specifications
Flats used to identify and orient wafers Large flat perpendicular to [110] direction
Used to align the wafers during lithography
Secondary flat used to identify doping type
P-type Primary
Secondary
(111) (100)
n-type Primary
Secondary45deg
Secondary180deg
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VLSI FabricationOxidation of SiliconProperties of SiO2
Mechanism of oxidation
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SiO 2 is stable down to 10 -9 Torr , T > 1000C
SiO2
can be etched with HF which leaves Si unaffected
SiO 2 is a diffusion barrier for B, P, As
SiO 2 is good insulator , > 10 16 cm, Eg = 9 eV!
SiO 2 has high dielectric breakdown field , 10 7 V/cm
SiO 2 growth on Si high-quality Si / SiO 2 interface
The beneficial properties of SiO 2 and the superior Si/SiO
2interface are believed to be the principle
reasons for the success of semiconductor industry.
Types of SiO used in devices
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S. Go alan Amrita Viswa Vid a eetam 09.02.05
Types of SiO 2 used in devices
Poly Si
Substrate
Gate oxide
FOX
LTO
Metal
MOSFET
Field OxideGate Oxide
LowTemperatureOxide
Device Isolation (Field oxide) Insulator for MOS device (Gate oxide) Inter-metal dielectric (Low-temperature oxide)
Mask and Pad oxide
D
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The growth rate, quality, and properties of SiO2
depend on the intended application:
Gate oxide: Very high quality ultra thin oxides (currently 1-2nm) High dielectric constant preferred High density
Amorphous structure required
Inter-metal dielectric:
Low density desired Low dielectric constant desired (to have reduced RC-delay) Quality not as critical as gate oxide
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The growth rate, quality, and properties of SiO2
also depend on the oxidation/depositiontechnique:
Gate oxide : Processed at high temperature Growth rate depends on ambient, temp., etc. (e.g. wet vs. dry)
N-incorporation preferred to get higher K
Inter-metal dielectric:
Processed at lower temperatures Fluorine incorporation preferred Deposition rates not critical
S f Sili Di id
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Structure of Silicon Dioxide
When the tetrahedral elements are linked in a structuredway, we get a crystalline material
When the tetrahedral units are linked to each other randomly, we get amorphous material Usually a more open structure with lower density
The basic unit of SiO2 is aTetrahedral structure
Each bond makes 109.5with others
S f Sili Di id
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Structure of Silicon Dioxide
Structure of Silicon Dioxide
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Structure of Silicon Dioxide
Thermally grown SiO2 is usually amorphous. The larger the fraction of bridging to non-bridging, the stronger the oxide
(e.g. dry vs. wet). Common impurities include water related complexes, B, P, Na, K, etc. B and P are network formers : reduce the bridging to non-bridging ratio
(by substituting for Si). Na, K are common network modifiers (interstitials).
network former
hydroxyl group
network modifier
silicon
bridging oxygen
non-bridging oxygen
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SiO f ti
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SiO 2 formation
Oxidation of Si Thermal oxidation (wet and dry)
Anodization
Deposition Chemical vapor deposition (CVD or MOCVD) Physical vapor deposition (PVD)
Evaporation
Methods of Oxidation
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Essentially involves heating Si wafers at high temperatures (usually 900C 1050C) in an oxidizing ambient.
Dry oxidation - Si (s) + O 2 (g) SiO 2 (s)
Wet oxidation - Si (s) + 2H 2O(g) SiO 2 + 2H 2 (g)
proposed process:
1) H2O + Si-O-Si Si-OH + Si-OH2) diffusion of hydroxyl complex to SiO2 -Si interface
Wet oxidation usually results in a more open structure and hence the oxidehas lower density ( SiO2 = 2.15 gm/cm 3 ) than dry oxide ( SiO2 = 2.25 gm/cm 3)
900 1200C
900 1200C
Thermal Oxidation
Si - OH Si - O - Si+ Si - Si + H 2
Si - O H Si - O - Si
Thermal Oxidation Furnace
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Wafer loading end
The temperature ramp rates, ambient flow
rate etc, are microprocessor controlled.
CVD systems are very similar:i.e. Gases react on wafer surface todeposit thin films
Horizontal furnace
Methods of Oxidation
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Methods of Oxidation Rapid Thermal Oxidation (RTO)
Heat wafer rapidly to high temperatures and keep at hightemperatures for a very short period of time (< 2minutes) in oxidizingambient (O2, NO, N2O, etc)
Ramp rates are very high Room Temp to 900-1000C in < 1minute Typically these furnaces can process only one wafer at a time
Used for high-quality thin oxides
Reaction similar to the one for dry oxidation (for O 2 ambient)
N2
Wafer
RTO Schematic
O2
Heating lamp
Deposition techniques for SiO2
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Deposition techniques for SiO2
Chemical Vapor DepositionIn CVD, two gases are introduced onto a furnace. Thegases react close to the heated wafer surface and theproduct is deposited on the wafers.For different temperature regimes, different chemicalreactions are used e.g. Silane reacting with Oxygen in atmospheric pressure or low pressure
(LPCVD) at temperatures between 300C and 500C
SiH4 (g) + O2 (g) SiO2 + 2H2 (g)used for inter-metal dielectric due to low dielectric constant and low
deposition temperature
For 500-800C, decomposition of TEOS is used
Si (OC2H5)4 SiO2 + by products
450C
700C
Deposition techniques
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Deposition techniques
Decomposition of TEOS has more conformal films due to higher deposition temperatures
Deposition rate is given by: exp (- E a / kT)
Activation energy for decomposition of TEOS is ~1.9eV while for reaction of Silane is 0.6eV
For higher temperatures (900C), SiO 2 is formed by reactingdichloro silane with nitrous oxide (N2O).
SiCl 2H2 + 2N 2O SiO 2 + 2N 2 +2HCl900C
Methods of Oxidation
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Methods of Oxidation
Physical Vapor Deposition- sputter atoms from a Si target using O 2 as oxidation species.
(Electric field ionizes Ar gas into ions and electrons. Theseions impinge on target to knock off atoms which react withoxidizing species. The product is accelerated by an electricfield to reach wafer)
PlasmaAr + and e -
Ar
Wafer
Cathode
PVD Schematic
O2
SiO2 Thickness
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Currently gate oxide thickness required is ~1nm
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Growth of SiO2
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X 0.44X
When Si oxidizes, there is volume expansion (~2.2X) Diffusivity of Si in SiO2 is several orders of magnitude
smaller than diffusivity of O2 O2 is believed to diffuse through the oxide to react with Si
at interface (tracer studies).
Growth of SiO2
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Overall reaction for dry oxidation.
Pathway increases with Si vacancies.
High doping increases charged vacancies and hence linear oxidation rate
At room temperature, O2 and Si are not mobile enough in SiO2hence reaction stops after a while.
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Next class
Deal-Grove Model for Thermal oxidation
Rate constants Effect of impurities on oxidation
b
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VLSI Fabrication
Oxidation
12.02.05
Topics covered in last class
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p
Types of SiO2 in devices Gate oxide, field oxide, LTO
Oxidation / deposition techniques Thermal oxidation (wet and dry) Chemical Vapor Deposition Physical Vapor Deosition
Properties and structure of SiO2 Bridging and non-bridging oxygen Network formers and network modifiers
Topics for today
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Mechanism of oxidation Deal Grove model for thermal oxidation Linear and Parabolic rate constants
Growth models for thin oxides
p y
Growth of SiO2
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X 0.44X
When Si oxidizes, there is volume expansion (~2.2X) Diffusivity of Si in SiO 2 is several orders of magnitude
smaller than diffusivity of O 2 O 2 is believed to diffuse through the oxide to react with Si
at interface (tracer studies).
Original Sisurface
Deal Grove model for thermal oxidation
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C represents the concentration of oxygen (atoms per unitvolume) at each position
J represents the oxygen flux moving through the cross-section: atoms per unit area per unit time
C g
J 1
J 2
J 3
C s Co C i
SiSiO2StagnantGas layer
Deal Grove model for thermal oxidation
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Oxygen transport across stagnantgas layer is given by
Where h g is mass transport coefficient.
. ( 1 )
Oxygen transport across oxide layer is governed by diffusion asgiven by Ficks law:
Where D O is diffusivity of O 2 in the oxide and X o is thickness of oxide.
.. ( 2 )
J1
= hg
(Cg C
s)
J 2 = D o (C o C i) / X o
Deal Grove model for thermal oxidation
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In equilibrium,
combining equations 1, 2, and 3, we have three unknowns, Cs, Co,and Ci.but the concentration of oxygen in oxide is given by Henrys law:
Where H is Henrys gas constant and Ps is obtained from PV = nRT
Flux due to oxygen reacting with Si atinterface is given by:
Where Ks is the reaction rate constant
J 3 = k sC i .. ( 3 )
J 1 = J 2 = J 3 .. ( 4 )
Co = HP s = HkTC s .. ( 5 )
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Oxidation Rate
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===n j
t d xd
R
The growth rate is given by J/N 1, where N 1 is the number molecules of oxygen per unit volume of SiO 2,(For oxidation with O 2, N 1 has a typical value of 2.2 x 10 22
cm-3
)
Integrating the above equation assuming that X i is thethickness at time t = 0, we get:
.. ( 7 )
Xo Where C * = HP gConcentration in bulk of
oxide
Where
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Where
and
Equation 7 can be rewritten as:
Where
.. ( 8 )
Initial thickness of oxide
Rate constants
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For very thick oxides (or long times) ,
Xo2 = B (t + ) dependence is parabolic: (thickness)2 time
characteristic of a diffusion limited process hence B is called parabolic rate constant
- growth rate is diffusion controlled B = 2DC*
/N 1
t + >> A 2 4 B
( ) ( ) +=+ t B B A
t At X o 42 2
Rate constants
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For thin oxides (or short times),
Xo ~ (B/A) (t + );
thickness is linearly increasing with timehence B/A is called linear rate constant
- growth rate is controlled by reaction at interfaceB/A = ksC * /N 1
( ) ( )
+=
++ t
A B
B At At X o 14
12 22
1
t +
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Dependent on
reaction rate betweenoxidizer and silicon (k) Temperature Si orientation Pressure Oxidizing ambient
solid solubility of oxidizer inoxide (N 0) H 2O: 3 x 10 19 cm -3
O 2: 5 x 10 16 cm -3
B/A = ksC s /N 1
Parabolic rate constant
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B = 2DC s /N 1
Dependent on diffusivity of oxidizer in oxide (D)
AND solid solubility of oxidizer in oxide
(N0) temperature dependence mainly
from diffusivity is NOT orientation dependent IS oxidizer dependent
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Pressure dependence
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Higher pressures result in increased growth rates
(increased rate constants)
Halogenic Oxidation
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g
Addition of 1 3% Chlorine to oxygen increases the growth rate than pure O2
helps remove metallic contaminants in the form of volatile chlorides Results in better interface with Si
Better electrical characteristics (Vth, mobility) Better dielectric strength
HCl used as halogen source (corrosive) Trichloro ethylene (TCE) carcinogenic Trichloro ethane (TCA) forms toxic COCl 2
Effect of HCl on parabolic rate constant
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p
Effect of HCl on linear rate constant
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Thin Oxides
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D-G model fits data for broad range of thicknesses But for very thin oxides (
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VLSI Fabrication
Oxidation
14.02.05
Topics covered in last class
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Deal Grove model for oxidation Oxide growth rate from flux of oxygen atoms
Linear and Parabolic Rate constants Oxide growth as a function of time for long and
short times (thick or thin films)
Factors affecting rate constant (temperature,pressure, etc..)
Halogenic oxidation Effect of Cl in O2 on the growth rate and rateconstants
Topics for today
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Growth models for thin oxides
Effect of dopants on oxidation rates
Oxide characterization
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Problems with Deal Grove model
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Although D-G model predicts the thickness well thickoxides, it does not correctly model thin oxide growthFor the first 200A, the actual oxide growth rate is muchhigher than predicted.
Dry oxidation growth curves do not extrapolate back tozero oxide thickness at zero time.
To compensate for this discrepancy value can beadjusted.
Even then, below 300A, this model fails
Various models have been proposed.
0.01
0.1
1
0.1 1 10
D r y
O x i
d a
t i o n T
h i c k n e s s
( m
)
time (hours)
1100 C
1000 C
900 C
(100) Si
0.01
0.1
1
0.1 1 10
D r y
O x i
d a
t i o n T
h i c k n e s s
( m
)
time (hours)
1100 C
1000 C
0.01
0.1
1
0.1 1 10
D r y
O x i
d a
t i o n T
h i c k n e s s
( m
)
time (hours)
1100 C
1000 C
900 C
(100) Si
Models for thin oxide growth
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( I ) Enhanced arrival of oxidation species at interface:1. Deal-Grove suggested presence of Electric field enhances
motion of diffusing species to interface Issue: this model requires that the diffusing species must be ionic
2. Existence of holes or micro-channels in oxide enhancesoxygen diffusion to interface
Issue: this model cannot explain uniform oxide thickness acrosswafer
3. Difference between thermal expansion coefficientbetween Si and SiO2 causes stress which enhances
oxygen diffusionProblem with these model: For the thin oxide regime, theoxidation is reaction rate limited, not diffusion limited. The linear
rate constant (B/A) is independent of diffusivity.
Models for thin oxide growth
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( II ) Increased solid solubility of O 2
in oxide: Causes greater reaction with interface Not well accepted
Henrys law not true for thin oxides (as it assumes that the
adsorbed oxygen does not dissociate not recombine)
( III ) Oxygen reaction at interface occurs over some
finite distance (Massoud et. al. ref. 13, Ch 4) Oxygen diffuses some distance into silicon (through defects) and
reacts Shown to be true for very low temperatures
L is the characteristic distance over which the reaction occurs, and C is const
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Models for thin oxide growth
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Experimental data agrees well with Reisman, Massoud, and Han &Helms models. None of the models are widely accepted. Since Massoud et. al. model is an extension of Deal-Grove, this
model is used in process simulators.
Effects of Dopants during oxidation
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Substrate usually doped prior to oxidation During oxidation, impurity redistributes between oxideand silicon according to segregation coefficient, k
If k > 1, oxide rejects impurity Dopant accumulates in silicon under oxide reaching maximum at
iinterface If impurity diffuses rapidly in SiO2, dopant rapidly removed from
interface
If k < 1, oxide takes up dopants Impurity concentration at substrate decreases near interface
2SiO
Si
C
C k =
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Effect of dopants during oxidation
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Boron Weakens structure, and reduces viscosity For heavily doped substrate (C B > 10 20 cm -3), diffusivity
of oxygen enhanced Increase in parabolic rate constant
Phosphorous k = 10 Phosphorous pile up at interface causes increased
reactivity with oxygen Rapid increase in linear rate constant Parabolic rate constant shows only small increase
Problems with thermal oxidation: OSF
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Oxidation induced stacking faults (OSF) caused bycreation of large number of silicon self-interstitials
OSF usually lies on {111} and found close to Si-SiO2interface
Act as gettering sites for heavy metal impurities Cause excess leakage of device
Length of stacking fault is linearly proportional tooxidation time
density can vary from ~0 to 10 7 / cm 2
Any process that injects Si vacancies inhibitformation of OSF: e.g. nitridation
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Next class
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Next class
Characterization of Oxides Thickness Dielectric strength
Si-SiO2 interface
Diffusion
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VLSI Fabrication
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VLSI Fabrication
Oxide characterizationPhoto Lithography
21.02.05
Topics of last class
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2
Problems with DG oxidation model Thin oxide growth models
Effect of dopants during oxidation Oxidation induced stacking faults
Oxide characterization methods
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Thickness characterization Optical method
Electrical method Interface characterization
Interface state density
Charge traps Photo Lithography
Steps in lithography
Mask making Pattern transfer
Microscopic techniques
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4
Create a step in the oxide
Use lithography to create a step by etching awayportions of the oxide
For thickness > 1000A, use SEM For thickness < 1000A, use TEM
Surface profilometer
Mechanically scan wafer with a needle stylus Deflection of needle is measured and amplified as afunction of position
Very good resolution ( ~ few angstroms)
Microscopic techniques
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Optical method 1 Dip part of wafer in dilute HF to remove oxidecompletely
A gradation of thickness exists between etched andunetched oxides Thickness obtained from color sequence
Optical method 2 - ellipsometry Polarized coherent light is reflected off the oxidesurface at some angle
Reflected light and intensity measured as a functionof polarization angle
Comparing intensities of incident & reflected light andchange in polarization angle, film thickness and index
of refraction can be determined
Microscopic techniques
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6
Optical method 3 interference method Incident light almost normal to wafer Intensity of reflected light measured as a function of
Optical maximum when incoming and outgoing wavesinterfere constructively for some wavelength
Destructive interference minima Between maximum and minimum measured
n is the index of refraction of oxide Thickness down to a few hundred angstroms
tSiO2 = / 2n ox
Thickness by Electrical method Vg
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7
Breakdown voltage Use metal electrode on top of oxide Apply continuous voltage to electrode and measure
current Initially current increases slowly and Suddenly current starts increasing rapidly
breakdown From breakdown voltage and breakdown field
(12MV/cm for SiO2), thickness can be determined.
Si
ESiO2 = VBD / tox Ig
VgVbd
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Charges in oxide and Si-SiO2 interface
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Q ot due to defects in SiO2
Qm due to processing
Q it due to suddentermination of silicon lattice atSi-SiO2 interface
Q f due to presence of ionicSi and dangling Si bonds
All these charges affect theelectrical characteristics of the oxide
Electrical characterization of oxides
TDDB (ti d d t di l t i b kd )
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10
TDDB (time dependent dielectric breakdown)
Constant voltage (other techniques - constant current, or rampedvoltage techniques)
Apply constant voltage for extended period of time, and monitor current through oxide
Current decreases due to electron trapping in oxide bulk Breakdown due to accumulated trapped positive charge near
interface Area under I t curve gives total charge to breakdown
I (A)
t (sec)
I (A)
t (sec)
Less
trappedcharge
more
trappedcharge
Qm
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11
Cause a shift in the CV curve laterally Can be determined from the Vg Qm determined from bias temperature stressing
CTCT
CoxCoxCox
before BTSbefore BTSafter BTSafter BTS Qm / Cox Qm / Cox
p-typesubstrate
voltage (metal wrt substrate)
c a p a c
i t a n
c e
p-typesubstrate
voltage (metal wrt substrate)
c a p a c
i t a n
c e
measure C-V curvesbefore and after BTS stress- heat sample to100C and apply electricfield for 10-20min
Qm Cox x Vt Q
m / t
oxA
capq
Interface trapped charge
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Due to unsatisfied bonds at interface Measurement difficult Decreases the slope of C-V profile
Determined by comparing actual CV with theoreticalCV (obtained from oxide thickness andsemiconductor work function, and doping levels)
High temperature annealing can reduce interfacetrapped charge
C
Vg-2V +2V
Due to interfacestates
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13
PHOTO LITHOGRAPHY
Lithography
Process of transferring patterns of geometric shapes
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Process of transferring patterns of geometric shapeson a mask to a thin layer of radiation sensitivematerial (called photo resist) covering the surface of wafer
Two step process Transfer pattern from mask on to photo resist (PR) Transfer of pattern from PR to wafer by etching
Device layout is broken into several layers of information
Each layer is a map for the location of one film on IC
Steps in Mask fabricationDefine chip function
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Define chip function
Breakdown into sub-functions
Layout of sub-functions on floor plan usingdesign rules
Construct high-level model to testfunctionality and performance
Make adjustments to design
Transfer design to pattern generator
Mask
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Same size as finished chip or an integral factor (5x or 10x) of final chip During exposure, the image size is reduced.
Typically 150mm square Made of fused silica Essential properties
High degree of optical transparency Small thermal expansion coefficient Flat and polished surface
Resistant to scratches Chromium is used as opaque layer Typically 15-20 masks are used in a process sequence
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Electron beam used to create the pattern on the mask dueto its high precision The quartz is first covered with chrome followed by PR E-beam is raster scanned on to PR
Un-wanted PR is removed and chromium is etched
VLSI Fabrication
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Photo Lithography
23.02.05
Topics of last class
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2
Characterization of oxides Thickness
Breakdown Interface states
Charges in SiO2 and Si-SiO2 interface Photolithography Steps in mask fabrication
Steps in Mask fabricationDefine chip function
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3
Define chip function
Breakdown into sub-functions
Layout of sub-functions on floor plan usingdesign rules
Construct high-level model to testfunctionality and performance
Make adjustments to design
Transfer design to pattern generator
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4
The quartz is first covered with chrome followed by PR Electron beam used to create the pattern on the mask dueto its high precision Computer driven e-beam is raster scanned on to PR
Un-wanted PR is removed and chromium is etched
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Steps in standard lithography processDehydration bakeWafer with film
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6
y
Adhesion promoter application
Resist application
Soft bake or pre-bake
Aligning and Light Exposure
Develop
Hard bake or Post-bake Etching
Photo Resist (PR) Is a radiation sensitive material which changes chemically
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on exposure to light Usually a carbon based organic molecule Two types of resist:
Positive Regions of resist exposed to light dissolve quickly in developer Unexposed regions remain unchanged and are not removed by
developer Negative
Regions exposed to light are hard to remove by developer Unexposed regions are easily removed by developer
Positive resists result in better resolution than negativeresist
film to be patternedsubstrate (with topography!)
film to be patternedsubstrate (with topography!) Photo resist
Exposed regions
Positive and Negative resist
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maskmask
exposingradiationexposingradiation
made insolublemade insoluble made solublemade soluble
film to be patterned
mask blank: transparent,mechanically rigid
masking layer:opaque,patternable
masking layer:opaque,patternable
develop
etch
NEGATIVE POSITIVE
photoresistphotoresist
Components of PR
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Matrix material or resin binder provides mechanical properties such as adhesion and
etch resistance Inert to incident radiation
Sensitizer or inhibiter or PAC
Inhibits dissolution in developer Photo active compound absorbs light (visible or UV)and causes photo-chemical change
Solvent Keeps the photo resist as a liquid
Characteristics of PR
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Photoresist is an organic molecule Aromatic rings (closed chain hydrocarbons) long chain polymers
Sensitivity Amount of light energy required to create a chemical
change Higher sensitivity results in quicker developing
Resolution
Smallest feature size that can be reproduced on PRwithout distortion
Basic pattern transfer techniques
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contact
gap
mask
photoresist
optical imaging system
proximity
Imaging/Projection
Usually 4Xor 5XReduction
1:1 Exposure Systems
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Contact printing is capable of high resolution but has unacceptable defectdensities. Proximity printing cannot easily print features below a few mm (except for
x-ray systems). Projection printing provides high resolution and low defect densities anddominates today. Typical projection systems use reduction optics (2X - 5X), step and repeat
or step and scan mechanical systems, print 50 wafers/hour and cost $5 -10M.
Resolution of Imaging Systems
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contact shadow formation, no
diffraction
gapl 2
3min
proximity some diffraction, sharp filter
cut-off, flat response in
passband
projection:- low pass filter, smooth
decrease in passband
contact
projection
illumination, intensity I o , wavelength
position
i n t e n s i
t y
Io
position
i n t e n s i
t y
IoIo
proximity
lmin (g )
Optics Basics of Diffraction Ray tracing (assuming light travels in straight lines as particle ) works
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well as long as the dimensions are large compared to . At smaller dimensions, diffraction effects dominate ( light treated as a
wave ). Diffraction is bending of light waves around corners. If the aperture is on the order of l, the light spreads out after passing
through the aperture. (The smaller the aperture, the more it spreadsout.)
If we want to image the aperture on an image plane (resist), we cancollect the light using a lens and focus it on the image plane.
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But the finite diameter of the lens means some information is lost(higher frequency components).
A simple example is the image formed by a small circular aperture(Airy disk).
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Note that a point image is formed only if 0, f 0 or d . Diffraction is usually described in terms of two limiting cases:
Fresnel diffraction - near field. Fraunhofer diffraction - far field.
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Topics of last class
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Characterization of oxides Thickness
Breakdown Interface states
Charges in SiO2 and Si-SiO2 interface Photolithography Steps in mask fabrication
Steps in Mask fabricationDefine chip function
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Breakdown into sub-functions
Layout of sub-functions on floor plan usingdesign rules
Construct high-level model to testfunctionality and performance
Make adjustments to design
Transfer design to pattern generator
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The quartz is first covered with chrome followed by PR Electron beam used to create the pattern on the mask dueto its high precision Computer driven e-beam is raster scanned on to PR
Un-wanted PR is removed and chromium is etched
Each successive layer has to be aligned with the previous
Aligning using Masks
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layer (for e.g. the gate electrode has to come on top of gate oxide accurately)
Each mask contains alignment marks which help inaligning the layers on top of each other.
Important alignment features: Resolution:
ability of PR to accurately transfer patterns on to filmunderneath
Is the minimum feature size that can be transferred with
minimal tolerance Measured in terms of 3-sigma (standard deviation of minimumfeature size)
Important alignment features:
Aligning using Masks
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Registration: Measure of overlay accuracy from layer to layer Measured in terms of 3-sigma
Throughput: Number of wafers processed per hour For industry, this number has to be sufficiently high while
maintaining good resolution and registration
Usually alignments are automated
Overlay errors between two patterns
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goal: align two identical patterns one on top of theother
level 1level 2
: pure registration error : distortion error
overlay error: sum of all errors
really a statistical quantity rule of thumb: total overlay error not more than 1/3 to 1/5
of minimum feature size
what can go wrong??
Basic pattern transfer techniques
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contact
gap
mask
photoresist
optical imaging system
proximity
Imaging/Projection
Usually 4Xor 5XReduction
1:1 Exposure Systems
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9
Contact printing is capable of high resolution but has unacceptable defectdensities. Proximity printing cannot easily print features below a few mm (except for
x-ray systems). Projection printing provides high resolution and low defect densities anddominates today. Typical projection systems use reduction optics (2X - 5X), step and repeat
or step and scan mechanical systems, print 50 wafers/hour and cost $5 -10M.
Resolution of Imaging Systems
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10
contact shadow formation, no
diffraction
gapl 2
3min
proximity some diffraction, sharp filter
cut-off, flat response in
passband
projection:- low pass filter, smooth
decrease in passband
contact
projection
illumination, intensity I o , wavelength
position
i n t e n s i
t y
Io
position
i n t e n s i
t y
IoIo
proximity
lmin (g )
Optics Basics of Diffraction Ray tracing (assuming light travels in straight lines as particle ) works
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11
well as long as the dimensions are large compared to . At smaller dimensions, diffraction effects dominate ( light treated as a
wave ). Diffraction is bending of light waves around corners. If the aperture is on the order of l, the light spreads out after passing
through the aperture. (The smaller the aperture, the more it spreadsout.)
If we want to image the aperture on an image plane (resist), we cancollect the light using a lens and focus it on the image plane.
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12
But the finite diameter of the lens means some information is lost(higher frequency components).
A simple example is the image formed by a small circular aperture(Airy disk).
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13
Note that a point image is formed only if 0, f 0 or d . Diffraction is usually described in terms of two limiting cases:
Fresnel diffraction - near field. Fraunhofer diffraction - far field.
Contact and Proximity Systems( Fresnel Diffraction)
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Contact printing systems operate in the near field or Fresnel diffractionregime.
There is always some gap g between the mask and resist.
The aerial image can be constructed by imagining point sources withinthe aperture, each radiating spherical waves (Huygens wavelets).
Fresnel diffraction
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Interference effects and diffraction result in ringing andspreading outside the aperture.
Fresnel diffraction applies when
Within this range, the minimum resolvable feature size is
For e.g.
Wmin
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Projection Systems (Fraunhofer Diffraction) Resolution is given by Raleighs criterion: Wmin =
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k1 is an experimental parameter which depends on the lithographysystem and resist properties and is 0.6 - 0.8.
Obviously resolution canbe increased by:
decreasing
increasing NA (bigger lenses)
Projection Systems( Fraunhofer Diffraction)
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However, higher NA lenses also decrease the depth of focus :
k2 is usually experimentally determined. Usually, it is better to decrease wavelength of light. Another useful concept is the modulation transfer
function or MTF , defined as shown below:
Can be thought of as a measure of the optical contrast of arealimage
Projection Systems (Fraunhofer Diffraction)
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Higher the MTF, better the contrast
MTF dependent ondiffraction grating
Spatial Coherence Finally, another basic concept is the spatial coherence of
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the light source.
The spatial coherence of the system is defined as: