Smart FET Robustness Testing.ppt [Read-Only]

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Smart FET Robustness Testing

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Agenda

• Repetitive Clamp Testing

• Repetitive Short Circuit Testing

• Cold Bulb Testing

• DV/Dt Testing

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Repetitive Clamping Test (RCL)• The purpose of this test is to determine the repetitive

inductive avalanche switching capability of power devices.

• The RCL test is an endurance test which verifies the effectiveness of the load flyback protection over the device lifetime

• This test establishes the load current versus inductance curve for the device

• Test is based on JESD24-8 Standard

Insert representative power curve here as an example

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Repetitive Clamping Test• Energy delivered must drive the device to a peak

temperature of TJmax during test• Device must be avalanched and survive the customer

required number of avalanche events (Typically 1-2 million cycles)

Input

Voltage Across DUT

Current Through

DUT

On

Off

V(Br)

VDD

IAR

tav

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Repetitive Clamping Test

• A Gate to Drain Zener Clamp provides inductive flybackprotection

• Current through the clamp allows the device to turn on• Energy is dissipated through the channel as opposed to

breaking down the body diode

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• Current is ramped up in the inductor and goes to ground through a resistor

• Once the current reaches the required level, the switch is opened

• The DUT then goes into avalanche as the inductor flies back


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• Measurements are taken periodically to insure that the repetitive clamping stress has not affected the parametric performance of the device.

NCV8403 RCL Drift AnalysisVS=16V, 15A, 100µH, 145C Ta

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0 256k 1024k 2048kReadout

RD

Son

(mO

hm)

1.11.21.31.41.51.61.71.81.91.102.12.22.32.42.52.62.72.82.92.103.13.23.33.43.53.63.73.83.93.10


0

0.05

0.1

0.15

0.2

0.25

0.3

0 256k 1024k 2048kReadout

Ileak

(28V

) (µA

)

1.11.21.31.41.51.61.71.81.91.102.12.22.32.42.52.62.72.82.92.103.13.23.33.43.53.63.73.83.93.10


44.5

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0 256k 1024k 2048k

Readout

VCla

mp

(100

µA) [

V]

1.11.21.31.41.51.61.71.81.91.102.12.22.32.42.52.62.72.82.92.103.13.23.33.43.53.63.73.83.93.10


1.605

1.61

1.615

1.62

1.625

1.63

1.635

1.64

1.645

1.65

1.655

0 256k 1024k 2048k

Readout

Vth

(1m

A) [

V]

1.11.21.31.41.51.61.71.81.91.102.12.22.32.42.52.62.72.82.92.103.13.23.33.43.53.63.73.83.93.10


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• The purpose of this test is to determine the reliability of protected drivers when operating in a continuous short circuit condition

• The results of this test predict the survivability of a device under short circuit conditions (e.g. Weibull Plot)

• RSC testing is detailed in AEC Q100-12 Specification

Repetitive Short Circuit Testing (RSC)

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• The AEC Q100-12 specification describes tests for auto-restart and latched devices

• Our current product portfolio falls into the auto-restart category

• The specification describes 2 main test types– Long Pulse (-40 C & 25 C)– Continuous (Hot RSC)

Repetitive Short Circuit Testing

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• Long Pulse Testing– Test is run at -40 C and 25 C– Device under test is place into a short circuit for 300 ms– Device must cool down to ambient between test pulses– Pulses continue until one of 2 conditions are met

• 50% of the population has failed (parametric, or gross failure)• 100,000 cycles are met with 0 failures


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• Continuous (Hot) Repetitive Testing– Test is run at 25 C ambient– Device under test is placed into a continuous short circuit– Device toggles in and out of Thermal Shutdown– Pulses continue until one of 2 conditions are met

• 50% of the population has failed (parametric, or gross failure)• 100 hours have elapsed with 0 failures


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• Test Schematics and Load ConditionsRepetitive Short Circuit Testing

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• Long Pulse Example Waveforms

-40 C 25 C


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• Long Pulse Weibull Plot– Shows ppm levels for given number of short circuit cycles

Weibull Plot - NCV8403 LSC (-40C, 25C)

0.0001

0.0010

0.0100

0.1000

1.0000

10.0000

100.0000

1 10 100 1000 10000 100000 1000000

Cycles to Failure

Cum

ulat

ive

Failu

res

(%)

-40C 25C Power (-40C) Power (25C)


1 ppm fail rateFirst cold failure at 14 k cycles

First room failure at 48 k cycles

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• This test is used to determine the bulb inrush current survivability

• Example test sequence– Step 1: Preconditioning 30 sec. Continuous (Hot) RSC– Step 2: Preconditioning Repetitive Short Circuit- Long Pulse

• 100 cycles, 25 C– Step 3: Cold Bulb Test

Cold Bulb Testing (CBT)

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• Cold Bulb Test– Bulb Load in -40 C chamber– V(supply) = 15 V– DUT held at room temperature– DUT turned on 100,000 times with load connected– DUT on until bulb current stabilizes (200 ms), off until bulb returns to

-40 C

Cold Bulb Testing

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• Test SchematicCold Bulb Testing

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• Step 1: Preconditioning 30 sec. Continuous (Hot) RSC Test Example Waveform

Cold Bulb Testing

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• Step 2: Preconditioning Repetitive Short Circuit- Long Pulse Example Waveform

Cold Bulb Testing

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• Step 3: Cold Bulb Test Example Waveform

Cold Bulb Testing

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• Step 3: Cold Bulb Test Results– Parametrics periodically monitored to ensure the devices are within spec

Cold Bulb Testing

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•DV/Dt testing is done to verify the devices ability to survive fast transients

•Fast transients have been shown to cause damage in Protected FET’s

Over-stressedTransistor

DV/Dt Testing

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•Test setup that produces fast voltage transients and has been used to induce damage on the bench.

Fast Voltage transient on Drain

DV/Dt Testing

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•Test Schematic•Z-Test- Used to verify the robustness of our new designs

DV/Dt Testing

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Z-Test Survival Rate (50 pulses)

0

20

4060

80

100

120

NID5001 NIF5002 NIF5003 New 5003(NCV8403)

Survival Rate (%)Sample Size

•Test Results- Z Test•Redesigned NCV portfolio withstood 50 fast transient pulses with zero device failures

DV/Dt Testing

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•Test Schematic•IEC Pulse Tester Used to characterize Robustness of new designs

DV/Dt Testing

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Experiment with Self-Protected FET -- IEC Pulse on Biased Drain (Vgs = 0 V)

10

100

1,000

10,000

100,000

5 15 25 35 45

Vds Bias Voltage (V)

IEC

Pul

se V

olta

ge (V

) at L

ast P

ass

NIF5002NIF62514 FixNIF62514 No FixNCV8403NIF5003NID5001NT4NCV8401

30 kV Max

•Test Results- IEC Pulse Tester•Redesigned NCV portfolio withstood 30 kV transients with up to 40 V on the Drain•Old NIF/NID portfolio failed with <30 kV transients

DV/Dt Testing

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• ON Semiconductor NCV Smart FET devices are characterized with the following tests:– Repetitive Clamp Testing

• Determines the repetitive inductive avalanche switching capability of power devices.

– Repetitive Short Circuit Testing• Determines the reliability of protected drivers when operating in a

continuous short circuit condition– Cold Bulb Testing

• Determines the bulb inrush current survivability– DV/Dt Testing

• Verifies the devices ability to survive fast transients

Conclusions

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For More Information

• View the extensive portfolio of power management products from ON Semiconductor at www.onsemi.com

• View reference designs, design notes, and other material supporting automotive applications at www.onsemi.com/automotive

Documents

Smart FET Robustness Testing.ppt [Read-Only]