Sequence Detector Finite State Machine Design

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    A sequence detector

    A state machine is required which outputs a logic 1 whenever the input sequence 0101 is

    detected, and which outputs a otherwise. The input is supplied serially, one bit at a time.

    The following is an example input sequence and output sequence:

    input 0 0 1 0 1 0 1 1 0 0 0 1 0 1 0 0

    output 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 0

    This state machine can be designed in a straightforward way. Assume that the machine is

    initially in some state, say, state A. f a 0 is input, then this is maybe the start of therequired sequence, so the machine should output a 0 and go to the next state, state !. f a

    1 is input, then this is certainlynot the start of the required sequence, so the machine

    should output a 0 and stay in state A. "hen the machine is in state A, therefore, it has

    detected no digits of the required input sequence. "hen the machine is in state !, it hasdetected exactly one digit #the first 0$ of the required input sequence.

    f the machine is in state ! and a 0 is input, then two consecutive 0%s must have been

    input& this input is clearly not the second digit of the required sequence, but it may be the

    first digit of the sequence. Therefore, the machine should stay in state ! and output a 0. f

    a 1 is input while the machine is in state !, then the first two digits of the requiredsequence have been detected, and the machine should go to the next state, state ', and

    output a 0. "hen the machine is in state ', it has detected exactly two digits #0 1$ from

    the required sequence.

    f the machine is in state ' and a 0 is input, then three digits of the required sequencehave been input, so the machine should go to its next state, state (, and output a 0. f a 1

    is input when the machine is in state ', then this input is clearly no part of the required

    sequence, so the machine should start over in state A and output a 0.

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    f the machine is in state ( and a 0 is input, then this is not the required input #the input

    has been 0 1 0 0$, but this may be the first digit of another sequence, so the machine

    should go to state ! and output a 0. f a 1 is input while the machine is in state (, then therequired sequence #0 1 0 1$ has been detected, so a 1 should be output. )oreover, the last

    two digits input may be the first two digits of another sequence, so the machine should go

    to state '. This completes the state diagram, as shown in the following figure:

    The following is a state table corresponding to the state diagram:

    *resent nput +ext utput

    -tate -tate

    A 0 ! 0

    A 1 A 0

    ! 0 ! 0

    ! 1 ' 0

    ' 0 ( 0

    ' 1 A 0

    ( 0 ! 0

    ( 1 ' 1