Semiconductor Devices and qli/ECE584/Lecture 1 MOSFET and • Semiconductors are the foundation of modern ... Modern Semiconductor Devices for Integrated ... Semiconductor Devices

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  • Semiconductor Devices and

    Nanoelectronics

    Qiliang Li

    Dept. of Electrical and Computer Engineering

    George Mason University, Fairfax, VA

    qli6@gmu.edu

    Email: qli6@gmu.edu 1

  • Content Outline

    Semiconductor materials and the carriers in semiconductors;

    Semiconductor fabrication and devices physics for pn junction, metal-semiconductor junction and MOS structure;

    MOSFET, its basic circuits (inverter, NAND and NOR logic) and memory devices (Flash, SRAM, DRAM and other NVM)

    Concepts in Nanoelectronics

    Email: qli6@gmu.edu 2

  • What is semiconductors?

    Their electrical conductivity is between that of metals (e.g., Al, Au, ) and insulators (e.g.,

    SiO2, Al

    2O3

    and HfO2);

    Semiconductors are the foundation of modern electronic circuits

    Important concepts: pn junction, transistor (BJT and MOSFET), solar cell, Light-emitting diode,

    digital and analog integrated circuits

    Email: qli6@gmu.edu 3

  • The Common Semiconductors

    Conventional semiconductors: Silicon (Si), germanium (Ge), GaAs, GaN, SiC

    One dimensional semiconductor: nanowires and nanotubes

    Two-dimensional semiconductors, e.g., MoS2

    we are always looking for new functional semiconductor materials

    Email: qli6@gmu.edu 4

  • Chapter 1. Electrons and Holes in

    Semiconductors

    1.1 Si Crystal Structure

    Unit cell of Si is cubic

    Each Si atom has 4 nearest neighbors

    Email: qli6@gmu.edu 5

    5.3 A

  • 1.2 Bond Model of electrons and holes

    Email: qli6@gmu.edu 6

    Si Si Si

    Si Si Si

    Si Si Si

    Si Si Si

    Si Si Si

    Si Si Si

    Si Si Si

    Si Si

    Si Si Si

    Si Si Si

    Si Si

    Si Si Si

    As B

    Intrinsic Si

    Doped Si

    As: group V

    B: group III

    EION

    = 50 mV

    Very low

  • Email: qli6@gmu.edu 7

    1.3 Energy Band Model

    2p

    2s

    (a) (b)

    conduction band)(

    (valence band)

    Filled lower bands

    } Empty upper bands

    }

    3P

    3S

    The highest filled band is the valence band

    The lowest empty band is the conduction band

  • Email: qli6@gmu.edu 8

    1.3 Energy Band Model

    Conduction band Ec

    Ev

    Eg

    Band gap

    Valence band

    Energy band diagram shows the bottom edge of

    conduction band, Ec

    , and top edge of valence band, Ev

    .

    Ec

    and Ev

    are separated by the band gap energy, Eg

    .

  • Email: qli6@gmu.edu 9

    1.4 Energy Band structure

    Si band structure

    Indirect band gap

    6 minimum at

  • Email: qli6@gmu.edu 10

    1.4 Energy Band structure

    Ge band structure

    Indirect band gap

    8 minimum at

  • Email: qli6@gmu.edu 11

    1.4 Energy Band structure

    GaAs band structure

    Direct band gap

  • Common methods:

    Slater-Koster tight-binding method Semi Empirical extended Huckel method

    (using Huckel molecular orbital theory)

    Density functional theory (DFT) Local-Density Approximation (LDA) method

    Density functional theory (DFT) Generalized Gradient Approximations (GGA) method

    Email: qli6@gmu.edu 12

    1.5 Calculate the band structure

  • Email: qli6@gmu.edu 13

    1.5 Calculate the band structure

    Use MoS2 monolayer as example:

  • Email: qli6@gmu.edu 14

    1.5 Calculate the band structure

    We used Virtual Nanolab ATK software to calculate it.

    Welcome collaboration on the research!

    MoS2 band structure

    calculated by using

    DFT-GGA method

    Direct band gap

    Eg = 1.79 eV

    Effective mass:

    ml = 0.59 m0

    mt = 0.50 m0

    mdos = (6)2/3(mlmtmt)

    1/3

    = 1.75 m0

  • Email: qli6@gmu.edu 15

    Chapter 2. Device Fabrication and Physics

    2.1 Device

    Fabrication

    Technology

  • Email: qli6@gmu.edu 16

    2.1 Device Fabrication Technology

    VLSI (Very Large Scale Integration)ULSI (Ultra Large Scale Integration)GSI (Giga-Scale Integration)

    Variations of this versatile technology are

    used for flat-panel displays, micro-electro-

    mechanical systems (MEMS), and chips for

    DNA screening...

  • Email: qli6@gmu.edu 17

    2.1 Device Fabrication Technology

    Wafer

    Oxidation

    Lithography

    Etching

    Annealing &Diffusion

    AlSputtering

    (0)

    Positive resist SiO2

    P-Si

    P-Si

    SiO2P-Si

    Mask

    UV

    SiO2 SiO2P-Si

    (1)

    (2)

    (3)

    SiO2

    UV

    Lithography

    SiO2 SiO2

    SiO 2 SiO2

    PN+

    SiO2 SiO2

    PN+

    P-Si

    SiO2 SiO2

    PN+

    Mask

    Al Res is t

    (4)

    Arsenic implantation

    Al

    UV

    (7)

    (5)

    (6)

    Al

    UV

    Ion

    Implantation

    * An example from Modern Semiconductor Devices for Integrated Circuits (C. Hu)

  • Email: qli6@gmu.edu 18

    Metal etching

    CVDnitridedeposition

    Lithographyand etching

    Back Side milling

    Back side metallization

    Dicing, wire bonding,and packaging

    SiO2 SiO2

    PN+

    (8)

    (9)

    SiO2 SiO2

    PN+

    SiO2 SiO2

    PN+

    (10)

    SiO2 SiO 2

    PN

    +

    (11)

    Al

    Si3N

    4

    Si3N

    4

    Si3N

    4

    Al

    Al

    Al

    Photoresist

    SiO2 SiO 2

    PN+

    (12)

    SiO2 SiO2

    PN

    +

    (13)

    Si3N

    4

    Si3N

    4

    Al

    Al

    Au

    Au

    wire

    Plastic package

    metal leads

    2.1 Device Fabrication Technology

    * An example from Modern Semiconductor Devices for Integrated Circuits (C. Hu)

  • Email: qli6@gmu.edu 19

    2.2 pn Junction

    On the P-side of the depletion layer, = qNa

    On the N-side, = qNd

    s

    aqN

    dx

    d

    =E

    )()(1

    xxqN

    CxqN

    xP

    s

    a

    s

    a =+=E

    )()(N

    s

    d xxqN

    x -=E

    N P

    Depletion Layer Neutral Region

    xn

    0 xp

    x x

    p xn

    qNd

    qNa

    x

    E

    xn xp

    0

    Neutral Region

    N

    N

    N P

    P

    P

    Electric Field

  • Email: qli6@gmu.edu 20

    2.2 pn Junction

    On the P-side,

    Arbitrarily choose the voltage at x = xP as V = 0.

    On the N-side,

    2)(2

    )( xxqN

    xV Ps

    a =

    2)(2

    )( Ns

    d xxqN

    DxV =

    2)(2 Ns

    dbi xx

    qN =

    x

    E

    xn xp

    Ec

    Ef Ev

    bi, built-in potential

    0

    xn

    xp

    x

    biV

    N

    N

    P

    P

    Electric Field and potential

  • Email: qli6@gmu.edu 21

    V is continuous at x = 0

    If Na >> Nd , as in a P+N junction,

    What about a N+P junction?

    wheredensity dopant lighterNNN ad

    1111 +=

    +==

    da

    bisdepNP NNq

    Wxx112

    Nd

    bisdep xqN

    W = 2

    qNW bisdep 2=

    N P

    Depletion Layer Neutral Region

    xn

    0 xp

    Neutral Region

    0=adNP

    NNxx| | | |

    PN

    2.2 pn JunctionDepletion layer width

  • Email: qli6@gmu.edu 22

    (b) reverse-biased

    qV

    Ec

    EcEfn

    Ev

    qbi + qV EfpEv

    2.2 pn Junction

    qN

    barrier potential

    qN

    VW srbisdep

    =+= 2|)|(2

    + V

    N P

    Reverse-Biased

    dep

    sdep W

    AC=Reverse biased PN

    junction is a capacitor.

    222

    2

    2

    )(21

    AqN

    V

    A

    W

    C S

    bi

    s

    dep

    dep

    +==

    Vr

    1/Cdep

    2

    Increasing reverse bias

    Slope = 2/qNsA2

    bi

    Capacitance data

    How to minimize the

    junction capacitance?

  • Email: qli6@gmu.edu 23

    2.2 pn Junction - breakdown2/1

    |)|(2

    )0(

    +==

    rbis

    p VqN EEEEEEEE

    Peak electric field and

    breakdown voltage: bi

    critsB

    qNV

    =2

    2EEEE

    Empty StatesFilled States -

    Ev

    Ec

    V/cm106=

    critp EE

    peG J / H=

    Tunneling Breaking

    EcEfn

    Ec

    Ev

    Efp

    originalelectron

    electron-holepair generation

    Impack ionization avalanche breakdown

    daB N

    1

    N

    1

    N

    1V +=Basis for tunneling FET for smaller

    subthreshold swing

  • Email: qli6@gmu.edu 24

    2.2 pn Junction forward bias

    Minority carrier injection

    )1()()( 00 =kTqV

    PPPP ennxnxn

    )1()()( 00 =kTqV

    NNNN eppxpxp

    ( )P

    LxxkTqVP xxeenxn

    nP = ,)1()( //0

    L: diffusion length ~ 10 um, depending on N

    xJ

    enL

    Dqp

    L

    DqxJxJ kTVqP

    n

    nN

    p

    pPnPNpN

    allat

    )1()()(current Total 00

    =

    +=+=

  • Email: qli6@gmu.edu 25

    2.2 pn Junction Solar Cell

    )/ln( 2idpoc nGNq

    kTV =

    GAqLAJI ppsc == )0(

    NP+

    Isc

    0x

    * Modern Semiconductor Devices for Integrated Circuits (C. Hu)

  • Email: qli6@gmu.edu 26

    2.2 pn Junction LED

    )(

    24.1

    energy photon

    24.1 m) ( h wavelengtLED

    eVEg=

    Direct band gap

    Example: GaAs

    Direct

    recombination is

    efficient as k

    conservation is

    satisfied.

    Indirect band gap

    Example: Si

    Direct