CHAPTERSEVENTEEN Semiconductor Materialsesminfo.prenhall.com/.../closerlook/pdf/Shackelford_Ch17.pdf · CHAPTERSEVENTEEN Semiconductor Materials The modern microprocessor is a state-of-the-art

CHAPTER SEVENTEEN

Semiconductor Materials

The modern microprocessor is a state-of-the-art application of semi-conductor materials encased in a package of conventional structuralmaterials. These processors with an advanced 800 MHz system bus con-tain more than 40 million transistors on a single silicon chip. (Courtesyof Intel.)

17.1 Intrinsic, Elemental Semiconductors17.2 Extrinsic, Elemental Semiconductors

n-Type Semiconductors

p-Type Semiconductors

17.3 Compound Semiconductors

17.4 Amorphous Semiconductors

17.5 Processing of Semiconductors

17.6 Semiconductor Devices

In Part II of this book we discussed the four categories of structuralmaterials. In Chapter 15, we identified a fifth type of engineering mate-rials, semiconductors, which are important for their electrical, rather thanmechanical, properties. The crystal structures of common semiconductorswere introduced in Section 3.5. In Chapter 15, the nature of semiconductionwas introduced by discussion of intrinsic, elemental semiconductors, such asimpurity-free silicon. In this chapter, we extend the discussion to includea variety of other semiconducting materials. We shall look at extrinsic,elemental semiconductors, such as silicon ‘‘doped’’ with a small amount ofboron. The nature of the added impurity determines the nature of the semi-conduction: either n-type (with predominantly negative charge carriers) orp-type (with predominantly positive charge carriers). The key elementalsemiconductors come from group IV A of the periodic table. Compoundsemiconductors are ceramic like compounds formed from combinations

622

SECTION 17.1 • INTRINSIC, ELEMENTAL SEMICONDUCTORS 623

of elements clustered around group IV A. Whereas most semiconductorsare crystals of high quality, some amorphous semiconductors are commer-cially available. The processing of semiconductors has been refined to anexceptional level of structural and chemical control. This is a text on mate-rials, not electronics, but in order to better appreciate the applications ofsemiconductors, a brief discussion of devices will be presented.

17.1 INTRINSIC, ELEMENTAL SEMICONDUCTORS

A few elements from the periodic table have intermediate values of con-ductivity in comparison with high-conductivity metals and low-conductivityinsulators (ceramics, glasses, and polymers). The principles of this inherentsemiconduction, or intrinsic semiconduction, in elemental solids (essentiallyfree of impurities) were given in Chapter 15. To summarize, the conductivity(σ ) of a solid is the sum of contributions from negative and positive chargecarriers,

σ = nnqnµn + npqpµp, (15.6)

where n is charge density, q is the charge of a single carrier, and µ is carriermobility. The subscripts n and p refer to negative and positive carriers,respectively. For a solid such as elemental silicon, conduction results fromthe thermal promotion of electrons from a filled valence band to an emptyconduction band. There, the electrons are negative charge carriers. Theremoval of electrons from the valence band produces electron holes, whichare positive charge carriers. Because the density of conduction electrons(nn) is identical to the density of electron holes (np ), we may rewriteEquation 15.6 as

σ = nq(µe + µh), (15.14)

where n is now the density of conduction electrons and the subscripts e andh refer to electrons and holes, respectively. This overall conduction schemeis possible because of the relatively small energy band gap between thevalence and conduction bands in silicon (see Figure 15.9).

In Section 15.3, we found that the conductivity of metallic conductorsdropped with increasing temperature. By contrast, the conductivity of semi-conductors increases with increasing temperature (Figure 17.1). The reasonfor this opposite trend can be appreciated by inspection of Figure 15.9. Thenumber of charge carriers depends on the overlap of the ‘‘tails’’ of the Fermifunction curve with the valence and conduction bands. Figure 17.2 illus-trates how increasing temperature extends the Fermi function, giving moreoverlap (i.e., more charge carriers). The specific temperature dependenceof conductivity for semiconductors [i.e., σ (T)] follows from a mechanism ofthermal activation, as implied by the illustrations in Figures 15.9 and 17.2.

624 CHAPTER 17 • SEMICONDUCTOR MATERIALS

Figure 17.1 Variation in electrical con-ductivity with temperature for semi-conductor silicon. Contrast with thebehavior shown for the metals inFigure 15.10. (This plot is based onthe data in Table 17.1 using Equa-tions 15.14 and 17.2.)

2

1

00 100

T (�C)

200

s (

ohm

�1 �m

�1 )

For this mechanism, the density of carriers increases exponentially withtemperature; that is,

n ∝ e−Eg/2kT , (17.1)

where Eg is the band gap, k is the Boltzmann constant, and T is the absolutetemperature. This equation is another occurrence of Arrhenius behavior(Section 5.1). Note that Equation 17.1 differs slightly from the generalArrhenius form given by Equation 5.1. There is a factor of 2 in the exponentof Equation 17.1 arising from the fact that each thermal promotion of anelectron produces two charge carriers—an electron-hole pair.

Returning to Equation 15.14, we see that σ(T ) is determined bythe temperature dependence of µe and µh as well as n. As with metallic

1

Conduction band

Valence band

0f (E)

1 0f (E)

1 0f (E)

EEE

� � T3T2T1

EF Eg

Figure 17.2 Schematic illustration of how increasing temperature increases overlapof the Fermi function, f (E), with the conduction and valence bands givingincreasing numbers of charge carriers. (Note also Figure 15.9.)


conductors, µe and µh drop off slightly with increasing temperature.However, the exponential rise in n dominates the overall temperaturedependence of σ , allowing us to write

σ = σ0e−Eg/2kT , (17.2)

where σ0 is a preexponential constant of the type associated with Arrhe-nius equations (Section 5.1). By taking the logarithm of each side ofEquation 17.2, we obtain

ln σ = ln σ0 − Eg

2k

1

T, (17.3)

which indicates that a semilog plot of ln σ versus T −1 gives a straight linewith a slope of −Eg/2k . Figure 17.3 demonstrates this linearity with thedata of Figure 17.1 replotted in an Arrhenius plot.

The intrinsic, elemental semiconductors of group IV A of the periodictable are silicon (Si), germanium (Ge), and tin (Sn). This list is remarkablysimple. No impurity levels need to be specified, as these materials arepurposely prepared to an exceptionally high degree of purity. The role ofimpurities is treated in the next section. The three materials are all membersof group IV A of the periodic table and have small values of Eg . Althoughthis list is small, it has enormous importance for modern technology. Siliconis to the electronics industry what steel is to the automotive and constructionindustries. Pittsburgh is the ‘‘Steel City,’’ and the Santa Clara Valley ofCalifornia, once known for agriculture, is now known as ‘‘Silicon Valley’’due to the major development of solid-state technology in the region.

Slope � �Eg

2k

�2

�10

�8

�6

�4

�2

2 3

450 400 350 300 250

T (K)

4

� 1,000 (K�1)1T

ln s

(oh

m�

1 �m�

1 )

0

Figure 17.3 Arrhenius plot of the electricalconductivity data for silicon given inFigure 17.1. The slope of the plot is−Eg/2k .


Table 17.1 Electrical Properties for Some Intrinsic, ElementalSemiconductors at Room Temperature (300 K)

Eg µe µh ne(= nh)

Group Semiconductor (eV) [m2/(V · s)] [m2 /(V · s)] (m−3 )

IV A Si 1.107 0.140 0.038 14 × 1015

Ge 0.66 0.364 0.190 23 × 1018

Source: Data from W. R. Runyan and S. B. Watelski, in Handbook of Materials andProcesses for Electronics, C. A. Harper, Ed., McGraw-Hill Book Company,New York, 1970.

Some elements in the neighborhood of group IV A (e.g., B from groupIII A and Te from group VI A) are also semiconductors. However, thepredominant examples of commercial importance are Si and Ge from groupIV A. Gray tin (Sn) transforms to white tin at 13◦C. The transformationfrom the diamond cubic to a tetragonal structure near ambient temperatureprevents gray tin from having any useful device application.

Table 17.1 gives values of band gap (Eg ), electron mobility (µe), holemobility (µh), and conduction electron density at room temperature (n)for two intrinsic, elemental semiconductors. Because mobilities are not astrong function of composition, these values will also apply to the slightlyimpure, extrinsic semiconductors discussed in the next section.

SAMPLE PROBLEM 17.1For every 1014 atoms in pure silicon, 28 Si atoms provide a conductionelectron. If n is the density of conduction electrons, what is the valueof n?

SOLUTION

First, we calculate atomic density using data from Appendix 1:

ρSi = 2.33 g · cm−3 with an atomic mass = 28.09 amu,

or

ρ = 2.33g

cm3× 106 cm3

m3× 1 g · atom

28.09 g× 0.6023 × 1024 atoms

g · atom

= 50.0 × 1027 atoms/m3.

Then,

n = 28 conduction electrons

1014 atoms× 50.0 × 1027 atoms/m3

= 14 × 1015 m−3.

Note. This problem is a reversal of Sample Problem 15.13. Theresult for n appears both in Tables 15.5 and 17.1.


SAMPLE PROBLEM 17.2Calculate the conductivity of germanium at 200◦C.

SOLUTION

From Equation 15.14,

σ = nq(µe + µh).

Using the data of Table 15.5, we have

σ300 K = (23 × 1018 m−3)(0.16 × 10−18 C)(0.364 + 0.190) m2/(V · s)

= 2.04 �−1 · m−1.

From Equation 17.2,

σ = σ0e−Eg/2kT .

To obtain σ0 ,σ0 = σe+Eg/2kT .

Again, using data from Table 15.5 we obtain

σ0 = (2.04 �−1 · m−1)e+(0.66 eV)/2(86.2×10−6 eV/K)(300 K)

= 7.11 × 105 �−1 · m−1.

Then,

σ200◦C = (7.11 × 105 �−1 · m−1)e−(0.66 eV)/2(86.2×10−6 eV/K)(473 K)

= 217 �−1 · m−1.

SAMPLE PROBLEM 17.3You are asked to characterize a new semiconductor. If its conductivityat 20◦C is 250�−1 · m−1 and at 100◦C is 1100�−1 · m−1 , what is its bandgap, Eg ?

SOLUTION

From Equation 17.3,

ln σT1 = ln σ0 − Eg

2k

1

T1(a)


and

ln σT2 = ln σ0 − Eg

2k

1

T2(b).

Subtracting (b) from (a) yields

ln σT1 − ln σT2 = lnσT1

σT2

= −Eg

2k

(1

T1− 1

T2

).

Then,

−Eg

2k= ln(σT1/σT2)

1/T1 − 1/T2,

or

Eg = (2k) ln(σT2/σT1)

1/T1 − 1/T2.

Taking T1 = 20◦C (= 293 K) and T2 = 100◦C (= 373 K) gives us

Eg = (2 × 86.2 × 10−6 eV/K) ln(1100/250)1

373 K−1 − 1293 K−1

= 0.349 eV.

................................................................................................................................................PRACTICE PROBLEM 17.1

In Sample Problem 17.1, we calculate the density of conduc-tion electrons in silicon. The result is in agreement with datain Tables 15.5 and 17.5. In Problem 15.43, the fraction ofgermanium atoms contributing conduction electrons at roomtemperature was calculated. Make a similar calculation for ger-manium at 150◦C. (Ignore the effect of thermal expansion ofgermanium.)

PRACTICE PROBLEM 17.2

(a) Calculate the conductivity of germanium at 100◦C, and(b) plot the conductivity over the range of 27 to 200◦C as anArrhenius-type plot similar to that shown in Figure 17.3. (SeeSample Problem 17.2.)


In characterizing a semiconductor in Sample Problem 17.3, wecalculate its band gap. Using that result, calculate its conduc-tivity at 50◦C.

SECTION 17.2 • EXTRINSIC, ELEMENTAL SEMICONDUCTORS 629

17.2 EXTRINSIC, ELEMENTAL SEMICONDUCTORS

Intrinsic semiconduction is a property of the pure material. Extrinsic semi-conduction results from impurity additions known as dopants, and theprocess of adding these components is called doping. The term impurityhas a different sense here compared with its use in previous chapters. Forinstance, many of the impurities in metal alloys and engineering ceramicswere components ‘‘dragged along’’ from raw material sources. The impu-rities in semiconductors are added carefully after the intrinsic materialhas been prepared to a high degree of chemical purity. The conductivityof metallic conductors was shown to be sensitive to alloy composition inChapter 15. Now we shall explore the composition effect for semiconduc-tors. There are two distinct types of extrinsic semiconduction: (1) n-type, inwhich negative charge carriers dominate, and (2) p-type, in which positivecharge carriers dominate. The philosophy behind producing each type isillustrated in Figure 17.4, which shows a small portion of the periodic tablein the vicinity of silicon. The intrinsic semiconductor silicon has four valence(outer-shell) electrons. Phosphorus is an n-type dopant because it has fivevalence electrons. The one extra electron can easily become a conductionelectron (i.e., a negative charge carrier). On the other hand, aluminum is ap-type dopant because of its three valence electrons. This deficiency of oneelectron (compared to silicon’s four valence electrons) can easily producean electron hole (a positive charge carrier).

n-TYPE SEMICONDUCTORS

The addition of a group V A atom, such as phosphorus, into solid solutionin a crystal of group IV A silicon affects the energy band structure ofthe semiconductor. Four of the five valence electrons in the phosphorusatom are needed for bonding to four adjacent silicon atoms in the four-coordinated diamond-cubic structure (see Section 3.5). Figure 17.5 showsthat the extra electron that is not needed for bonding is relatively unstable

III A

13Al

IV A

14Si

V A

15P

p-type dopant n-type dopant

Intrinsic semiconductor(4 valence electrons)

(only 3 valence electronselectron hole or positivecharge carrier )

(5 valence electronsconduction electron ornegative charge carrier )

Figure 17.4 Small section of the peri-odic table of elements. Silicon, ingroup IV A, is an intrinsic semicon-ductor. Adding a small amount ofphosphorus from group V A pro-vides extra electrons (not needed forbonding to Si atoms). As a result,phosphorus is an n-type dopant (i.e.,an addition-producing negativecharge carrier). Similarly, alumi-num, from group III A, is a p-typedopant in that it has a deficiency ofvalence electrons leading to positivecharge carriers (electron holes).


Figure 17.5 Energy band structure ofan n-type semiconductor. The extraelectron from the group V A dopantproduces a donor level (Ed ) nearthe conduction band, which pro-vides relatively easy production ofconduction electrons. This figure canbe contrasted with the energy bandstructure of an intrinsic semiconduc-tor in Figure 15.9.

Eg (bottom ofconduction band)

Ed � donor level

O (top of valence band)

Figure 17.6 Comparison of theFermi function, f (E), withthe energy band structure foran n-type semiconductor. Theextra electrons shift the Fermilevel (EF ) upward comparedto Figure 15.9, in which it wasin the middle of the band gapfor an intrinsic semiconductor.

EF

01f(E)

Ed

and produces a donor level (Ed ) near the conduction band. As a result, theenergy barrier to forming a conduction electron (Eg − Ed ) is substantiallyless than in the intrinsic material (Eg ). The relative position of the Fermifunction is shown in Figure 17.6. Due to the extra electrons from the dopingprocess, the Fermi level (EF ) is shifted upward.

Since the conduction electrons provided by the group V A atoms areby far the most numerous charge carriers, the conductivity equation takesthe form

σ = nqµe, (17.4)

where all terms were previously defined in Equation 15.14, with n beingthe number of electrons due to the dopant atoms. A schematic of theproduction of a conduction electron from a group V A dopant is shownin Figure 17.7. This schematic can be contrasted with the schematic of anintrinsic semiconductor shown in Figure 15.27.

Extrinsic semiconduction is another thermally activated process thatfollows the Arrhenius behavior. For n-type semiconductors, we can write

σ = σ0e−(Eg−Ed)/kT , (17.5)

where the various terms from Equation 17.2 again apply and where Ed

is defined by Figure 17.4. One should note that there is no factor of 2 inthe exponent of Equation 17.5 as there was for Equation 17.2. In extrinsic


Figure 17.7 Schematic of the production of aconduction electron in an n-type semicon-ductor. (a) The extra electron associatedwith the group V A atom can (b) easilybreak away, becoming a conduction elec-tron and leaving behind an empty donorstate associated with the impurity atom.This figure can be contrasted with thesimilar figure for intrinsic material in Fig-ure 15.27. (From R. M. Rose, L. A.Shepard, and J. Wulff, The Structure andProperties of Materials, Vol. 4: ElectronicProperties, John Wiley & Sons, Inc., NewYork, 1966.)

(a)

(b)

FPO

semiconduction, thermal activation produces a single charge carrier asopposed to the two carriers produced in intrinsic semiconduction. AnArrhenius plot of Equation 17.5 is shown in Figure 17.8.

The temperature range for n-type extrinsic semiconduction is limited.The conduction electrons provided by group V A atoms are much easier toproduce thermally than are conduction electrons from the intrinsic process.However, the number of extrinsic conduction electrons can be no greaterthan the number of dopant atoms (i.e., one conduction electron per dopantatom). As a result, the Arrhenius plot of Figure 17.8 has an upper limitcorresponding to the temperature at which all possible extrinsic electronshave been promoted to the conduction band. Figure 17.9 illustrates thisconcept. Figure 17.9 represents plots of both Equation 17.5 for extrinsicbehavior and Equation 17.2 for intrinsic behavior. Note that the value of σ0

for each region will be different. At low temperatures (large 1/T values),extrinsic behavior (Equation 17.5) dominates. The exhaustion range is anearly horizontal plateau in which the number of charge carriers is fixed(= number of dopant atoms). As a practical matter, the conductivity doesdrop off slightly with increasing temperature (decreasing 1/T ) due toincreasing thermal agitation. This change is comparable to the behavior ofmetals in which the number of conduction electrons is fixed, but mobilitydrops slightly with temperature (Section 15.3). As temperature continues torise, the conductivity due to the intrinsic material (pure silicon) eventuallyis greater than that due to the extrinsic charge carriers (Figure 17.9). Theexhaustion range is a useful concept for engineers who wish to minimizethe need for temperature compensation in electrical circuits. In this range,conductivity is nearly constant with temperature.


(Eg � Ed)k

Slope � �

1T

T

ln s

Figure 17.8 Arrhenius plot of electricalconductivity for an n-type semiconductor.This plot can be contrasted with the similarplot for intrinsic material in Figure 17.3.

(Eg � Ed)kSlope � �

Eg

2kSlope � � (intrinsic behavior)

Exhaustionrange

(extrinsic behavior)

1T

T

ln s

Figure 17.9 Arrhenius plot of electrical conductivity foran n-type semiconductor over a wider temperaturerange than shown in Figure 17.8. At lowtemperatures (high 1/T ), the material is extrinsic. Athigh temperatures (low 1/T ), the material isintrinsic. In between is the exhaustion range, in whichall ‘‘extra electrons’’ have been promoted to theconduction band.

p -TYPE SEMICONDUCTORS

When a group III A atom such as aluminum goes into solid solution insilicon, its three valence electrons leave it one short of that needed forbonding to the four adjacent silicon atoms. Figure 17.10 shows that theresult for the energy band structure of silicon is an acceptor level near thevalence band. A silicon valence electron can be easily promoted to thisacceptor level generating an electron hole (i.e., a positive charge carrier).As with n-type material, the energy barrier to forming a charge carrier (Ea )is substantially less than it is in the intrinsic material (Eg ). The relativeposition of the Fermi function is shifted downward in p-type material

Eg (bottom ofconduction band)

Ea � acceptor levelO (top of valence band)

Figure 17.10 Energy band struc-ture of a p-type semiconduc-tor. The deficiency of valenceelectrons in the group III Adopant produces an acceptorlevel (Ea ) near the valenceband. Electron holes are pro-duced as a result of thermalpromotion over this relativelysmall energy barrier.


EFEa

01f(E)

Figure 17.11 Comparison of the Fermifunction with the energy band struc-ture for a p-type semiconductor.This electron deficiency shifts theFermi level downward compared tothat shown in Figure 15.9.

(Figure 17.11). The appropriate conductivity equation is

σ = nqµh, (17.6)

where n is the density of electron holes. A schematic of the production ofan electron hole from a group III A dopant is shown in Figure 17.12.

The Arrhenius equation for p-type semiconductors is

σ = σ0e−Ea/kT , (17.7)

where the terms from Equation 17.5 again apply and Ea is defined byFigure 17.10. As with Equation 17.5, there is no factor of 2 in the exponentdue to the single (positive) charge carrier involved. Figure 17.13 shows

(a) (b)

FPOFigure 17.12 Schematic of the production of an electron hole in a p-type

semiconductor. (a) The deficiency in valence electrons for the group IIIA atom creates an empty state, or electron hole, orbiting about theacceptor atom. (b) The electron hole becomes a positive charge carrieras it leaves the acceptor atom behind with a filled acceptor state. (Themotion of electron holes, of course, is due to the cooperative motion ofelectrons.) (From R. M. Rose, L. A. Shepard, and J. Wulff, TheStructure and Properties of Materials, Vol. 4: Electronic Properties,John Wiley & Sons, Inc., New York, 1966.)


Ea

kSlope � �

Eg

2kSlope � � (intrinsic behavior)

Saturationrange

(extrinsic behavior)

1T

T

ln s

Figure 17.13 Arrhenius plot of electrical conductivity for ap-type semiconductor over a wide temperature range. Thisplot is quite similar to the behavior shown in Figure 17.9.The region between intrinsic and extrinsic behavior istermed the saturation range, which corresponds to allacceptor levels being ‘‘saturated’’ or occupied withelectrons.

the Arrhenius plot of ln σ versus 1/T for a p-type material. This plotis quite similar to that shown in Figure 17.9 for n-type semiconductors.The plateau in conductivity between the extrinsic and intrinsic regions istermed the saturation range for p-type behavior rather than exhaustionrange. Saturation occurs when all acceptor levels (= number of group IIIA atoms) have become occupied with electrons.

The similarity between the plots in Figures 17.9 and 17.13 raises anobvious question as to how you can tell whether a given semiconductor isn type or p type. The distinction can be conveniently made in a classicexperiment known as a Hall∗ effect measurement, illustrated in Figure 17.14.This measurement is one manifestation of the intimate relationship betweenelectrical and magnetic behavior. Specifically, a magnetic field applied at

∗ Edwin Herbert Hall (1855–1938), American physicist. Hall’s most famous discovery,the effect that still bears his name, was the basis of his Ph.D. thesis in 1880. Hecontinued to be a productive researcher during his career as a professor of physicsand even developed a popular set of high school physics experiments designed to helpstudents prepare for the entrance examination of Harvard, where he taught.


n-type semiconductor

Hall voltage, VH,positive

p-type semiconductor

Hall voltage, VH,negative

Magnetic field (H)

Current, I (due to electrons)

(a)

Thickness, t

H

Current, I (due to electron holes)

(b)

� �

� �

Figure 17.14 The application of a magnetic field (with field strength, H ), perpendi-cular to a current, I , causes a sideways deflection of charge carriers and aresulting voltage, VH . This phenomenon is known as the Hall effect. The Hallvoltage is given by Equation 17.8. For (a) an n-type semiconductor, the Hallvoltage is positive. For (b) a p-type semiconductor, the Hall voltage is negative.

right angles to a flowing current causes a sideways deflection of the chargecarriers and a subsequent voltage buildup across the conductor. For negativecharge carriers (e.g., electrons in metals or n-type semiconductors), the Hallvoltage (VH ) is positive (Figure 17.14a). For positive charge carriers (e.g.,electron holes in a p-type semiconductor), the Hall voltage is negative(Figure 17.14b). The Hall voltage is given by

VH = RH IH

t, (17.8)

where RH is the Hall coefficient (indicative of the magnitude and sign of theHall effect), I is the current, H is the magnetic field strength, and t is thesample thickness. Some of the common extrinsic, elemental semiconductorsystems used in solid-state technology are listed in Table 17.2. Table 17.3gives values of donor level relative to band gaps (Eg − Ed ) and acceptorlevel (Ea ) for various n-type and p-type donors, respectively.


Table 17.2 Some Extrinsic, Elemental Semiconductors

Periodic table Maximum solid solubilityElement Dopant group of dopant of dopant (atoms/m3)

Si B III A 600 × 1024

Al III A 20 × 1024

Ga III A 40 × 1024

P V A 1,000 × 1024

As V A 2,000 × 1024

Sb V A 70 × 1024

Ge Al III A 400 × 1024

Ga III A 500 × 1024

In III A 4 × 1024

As V A 80 × 1024

Sb V A 10 × 1024

Source: Data from W. R. Runyan and S. B. Watelski, in Handbook of Materials andProcesses for Electronics, C. A. Harper, Ed., McGraw-Hill Book Company,New York, 1970.

Table 17.3 Impurity Energy Levels for Extrinsic Semiconductors

Eg − Ed Ea

Semiconductor Dopant (eV) (eV)

Si P 0.044 —As 0.049 —Sb 0.039 —Bi 0.069 —B — 0.045Al — 0.057Ga — 0.065In — 0.160Tl — 0.260

Ge P 0.012 —As 0.013 —Sb 0.096 —B — 0.010Al — 0.010Ga — 0.010In — 0.011Tl — 0.01

GaAs Se 0.005 —Te 0.003 —Zn — 0.024Cd — 0.021

Source: Data from W. R. Runyan and S. B. Watelski, in Handbookof Materials and Processes for Electronics, C. A. Harper, Ed.,McGraw-Hill Book Company, New York, 1970.


A final note of comparison between semiconductors and metals isin order. The composition and temperature effects for semiconductors areopposite to those for metals. For metals, small impurity additions decreasedconductivity [see Figure 15.12, which showed ρ(= 1/σ ) increasing withaddition levels]. Similarly, increases in temperature decreased conductivity(see Figure 15.10). Both effects were due to reductions in electron mobilityresulting from reductions in crystalline order. We have seen that for semi-conductors, appropriate impurities and increasing temperature increaseconductivity. Both effects are described by the energy band model andArrhenius behavior.

SAMPLE PROBLEM 17.4An extrinsic silicon contains 100 ppb Al by weight. What is the atomic% Al?

SOLUTION

For 100 g of doped silicon, there will be

100

109× 100 g Al = 1 × 10−5 g Al.

Using the data of Appendix 1, we can calculate

no. g · atoms Al = 1 × 10−5 g Al

26.98 g/g · atom= 3.71 × 10−7 g · atom

and

no. g · atoms Si = (100 − 1 × 10−5) g Si

28.09 g/g · atom= 3.56 g · atoms,

which gives

atomic%Al = 3.71 × 10−7 g · atom

(3.56 + 3.7 × 10−7) g · atom× 100

= 10.4 × 10−6 atomic%.

SAMPLE PROBLEM 17.5In a phosphorus-doped (n-type) silicon, the Fermi level (EF ) is shiftedupward 0.1 eV. What is the probability of an electron’s being thermallypromoted to the conduction band in silicon (Eg = 1.107 eV) at roomtemperature (25◦C)?


SOLUTION

From Figure 17.6 and Equation 15.7, it is apparent that

E − EF = 1.107

2eV − 0.1 eV = 0.4535 eV

and then

f (E) = 1

e(E−EF )/kT + 1

= 1

e(0.4535 eV)/(86.2×10−6 eV·K−1)(298 K) + 1

= 2.20 × 10−8.

This number is small, but it is roughly two orders of magnitudehigher than the value for intrinsic silicon as calculated in SampleProblem 15.6.

SAMPLE PROBLEM 17.6For a hypothetical semiconductor with n-type doping and Eg = 1 eVwhile Ed = 0.9 eV, the conductivity at room temperature (25◦C) is 100�−1 · m−1 . Calculate the conductivity at 30◦C.

SOLUTION

Assuming that extrinsic behavior extends to 30◦C, we can applyEquation 17.5:

σ = σ0e−(Eg−Ed)/kT .

At 25◦C,

σ0 = σe+(Eg−Ed)/kT

= (100 �−1 · m−1)e+(1.0−0.9) eV/(86.2×10−6 eV·K−1)(298 K)

= 4.91 × 103 �−1 · m−1.

At 30◦C, then,

σ = (4.91 × 103 �−1 · m−1)e−(0.1 eV)/(86.2×10−6 eV·K−1)(303 K)

= 107 �−1 · m−1.


SAMPLE PROBLEM 17.7For a phosphorus-doped germanium semiconductor, the upper temper-ature limit of the extrinsic behavior is 100◦C. The extrinsic conductivityat this point is 60 �−1 · m−1 . Calculate the level of phosphorus dopingin ppb by weight.

SOLUTION

In this case, all dopant atoms have provided a donor electron.As a result, the density of donor electrons equals the density ofimpurity phosphorus. The density of donor electrons is given byrearrangement of Equation 17.4:

n = σ

qµe

.

Using data from Table 17.5, we obtain

n = 60 �−1 · m−1

(0.16 × 10−18 C)[0.364 m2/(V · s)]= 1.03 × 1021 m−3.

Important Note. As pointed out in the text, the carriermobilities of Tables 17.1 and 17.5 apply to extrinsic as well asintrinsic materials. For example, conduction electron mobility ingermanium does not change significantly with impurity addition aslong as the addition levels are not great.

Using data from Appendix 1 gives us

[P ] = 1.03 × 1021 atoms P

m3× 30.97 g P

0.6023 × 1024 atoms P

× 1 cm3 Ge

5.32 g Ge× 1 m3

106 cm3

= 9.96 × 10−9 g P

g Ge= 9.96 g P

109 g Ge= 9.96 g P

billion g Ge

= 9.96 ppb P.

SAMPLE PROBLEM 17.8For the semiconductor in Sample Problem 17.7:

(a) Calculate the upper temperature for the exhaustion range.

(b) Determine the extrinsic conductivity at 300 K.


SOLUTION(a) The upper temperature for the exhaustion range (see Fig-

ure 17.9) corresponds to the point where intrinsic con-ductivity equals the maximum extrinsic conductivity. UsingEquations 15.14 and 17.2 together with data from Table 17.5,we obtain

σ300 K = (23 × 1018 m−3)(0.16 × 10−18 C)(0.364 + 0.190) m2/(V · s)

= 2.04 �−1 · m−1

and

σ = σ0e−Eg/2kT or σ0 = σe+Eg/2kT ,

giving

σ0 = (2.04 �−1 · m−1)e+(0.66 eV)/2(86.2×10−6 eV/K)(300 K)

= 7.11 × 105 �−1 · m−1.

Then, using the value from Sample Problem 17.7,

60 �−1 · m−1 = (7.11 × 105 �−1 · m−1)e−(0.66 eV)/2(86.2×10−6 eV/K)T ,

giving

T = 408 K = 135◦C.

(b) Calculating extrinsic conductivity for this n-type semiconduc-tor requires Equation 17.5 to be used:

σ = σ0e−(Eg−Ed)/kT .

In Sample Problem 17.7, it is given that σ = 60 �−1 · m−1 at100◦C. In Table 17.3, we see that Eg − Ed is 0.012 eV forP-doped Ge. As a result,

σ0 = σe+(Eg−Ed)/kT

= (60 �−1 · m−1)e+(0.012 eV)/(86.2×10−6 eV/K)(373 K)

= 87.1 �−1 · m−1.

At 300 K,

σ = (87.1 �−1 · m−1)e−(0.012 eV)/(86.2×10−6 eV/K)(300 K)

= 54.8 �−1 · m−1.


SAMPLE PROBLEM 17.9Plot the conductivity of the phosphorus-doped germanium of SampleProblems 17.7 and 17.8 in a manner similar to the plot in Figure 17.9.

SOLUTION

The key data are extrinsic and intrinsic.Extrinsic data:

σ100◦C = 60 �−1 · m−1 or ln σ = 4.09 �−1 · m−1

at T = 100◦C = 373 K or 1/T = 2.68 × 10−3 K−1

and

σ300 K = 54.8 �−1 · m−1 or ln σ = 4.00 �−1 · m−1

at T = 300 K or 1/T = 3.33 × 10−3 K−1.

Intrinsic data:

σ408 K = 60 �−1 · m−1 or ln σ = 4.09 �−1 · m−1

at T = 408 K or 1/T = 2.45 × 10−3 K−1

and

σ300 K = 2.04 �−1 · m−1 or ln σ = 0.713 �−1 · m−1

at T = 300 K or 1/T = 3.33 × 10−3 K−1.

These data can be plotted as follows:

Extrinsic behavior

Intrinsicbehavior

Exhaustion range5

4

3

2

1

0

�12 3

1/T � 103 (K�1)

4

ln s

(oh

m�

1 �m�

1 )

Note. Plots can facilitate one’s ability to ‘‘visualize’’ these calculations.


SAMPLE PROBLEM 17.10(a) Calculate the photon wavelength (in nanometers) necessary to

promote an electron to the conduction band in intrinsic silicon.

(b) Calculate the photon wavelength (in nanometers) necessary topromote a donor electron to the conduction band in arsenic-dopedsilicon.

SOLUTION(a) Substituting the band gap, Eg , for intrinsic silicon given in

Table 17.1 into Equation 16.3 gives

Eg = 1.107 eV = E = hc

λ,

or

λ = hc

1.107 eV

= (0.663 × 10−33 J · s)(3.00 × 108 m/s)

(1.107 eV) × 0.16 × 10−18 J/eV× 109 nm

m

= 1,120 nm.

(b) Electron promotion requires only overcoming Eg − Ed ,which is given in Table 17.3:

Eg − Ed = 0.049 eV = E = hc

λ,

or

λ = (0.663 × 10−33 J · s)(3.00 × 108 m/s)

(0.049 eV) × 0.16 × 10−18 J/eV× 109 nm

m

= 25,400 nm.


A 100-ppb doping of Al, in Sample Problem 17.4, is found torepresent a 10.4 × 10−6 mol % addition. What is the atomicdensity of Al atoms in this extrinsic semiconductor? (Compareyour answer with the maximum solid solubility level given inTable 17.2.)


In Sample Problem 17.5, we calculate the probability of anelectron being thermally promoted to the conduction band ina P-doped silicon at 25◦C. What is the probability at 50◦C?

SECTION 17.3 • COMPOUND SEMICONDUCTORS 643


The conductivity of an n-type semiconductor at 25◦C and 30◦Ccan be found in Sample Problem 17.6. (a) Make a similarcalculation at 50◦C and (b) plot the conductivity over the rangeof 25 to 50◦C as an Arrhenius-type plot similar to Figure 17.8.(c) What important assumption underlies the validity of yourresults in parts (a) and (b)?


In Sample Problems 17.7–17.9, detailed calculations about aP-doped Ge semiconductor are made. Assume now that theupper temperature limit of extrinsic behavior for an aluminum-doped germanium is also 100◦C, with an extrinsic conductivityat that point again being 60 �−1 · m−1 . Calculate (a) the level ofaluminum doping in ppb by weight, (b) the upper temperaturefor the saturation range, and (c) the extrinsic conductivity at300 K; Then, (d) make a plot of the results similar to that shownin Sample Problem 17.9 and Figure 17.13.


As in Sample Problem 17.10, calculate (a) the photon wave-length (in nm) necessary to promote an electron to theconduction band in intrinsic germanium and (b) the wavelengthnecessary to promote a donor electron to the conduction bandin arsenic-doped germanium.

17.3 COMPOUND SEMICONDUCTORS

A large number of compounds formed from elements near group IV A inthe periodic table are semiconductors. As pointed out in Chapter 3, thesecompound semiconductors generally look like group IV A elements ‘‘on theaverage.’’ Many compounds have the zinc-blende structure (Figure 3.24),which is the diamond-cubic structure with cations and anions alternating onadjacent atom sites. Electronically, these compounds average to group IVA character. The III-V compounds are MX compositions, with M being a3+ valence element and X being a 5+ valence element. The average of 4+matches the valence of the group IV A elements and, more importantly,leads to a band structure comparable to that shown in Figure 15.9. Similarly,II-VI compounds combine a 2+ valence element with a 6+ valence element.An average of four valence electrons per atom is a good rule of thumb forsemiconducting compounds. However as with all such rules, there areexceptions. Some IV-VI compounds (such as GeTe) are examples. Fe3O4

(= FeO · Fe2O3 ) is another. Large electron mobilities are associated withFe2+ –Fe3+ interchanges.


Table 17.4 Some Compound Semiconductors

Group Compound Group Compound

III–V BP II–VI ZnSAlSb ZnSeGaP ZnTeGaAs CdSGaSb CdSeInP CdTeInAs HgSeInSb HgTe

Table 17.5 Electrical Properties for Some Intrinsic, CompoundSemiconductors at Room Temperature (300 K)

Eg µe µh ne(= nh)Group Semiconductor (eV) [m2 /(V · s)] [m2 /(V · s)] (m−3 )

III–V AlSb 1.60 0.090 0.040 —GaP 2.25 0.030 0.015 —GaAs 1.47 0.720 0.020 1.4 × 1012

GaSb 0.68 0.500 0.100 —InP 1.27 0.460 0.010 —InAs 0.36 3.300 0.045 —InSb 0.17 8.000 0.045 13.5 × 1021

II–VI ZnSe 2.67 0.053 0.002 —ZnTe 2.26 0.053 0.090 —CdS 2.59 0.034 0.002 —CdTe 1.50 0.070 0.007 —HgTe 0.025 2.200 0.016 —

Source: Data from W. R. Runyan and S. B. Watelski, in Handbook of Materialsand Processes for Electronics, C. A. Harper, Ed., McGraw-Hill BookCompany, New York, 1970.

Pure III-V and II-VI compounds are intrinsic semiconductors. Theycan be made into extrinsic semiconductors by doping in a fashion com-parable to that done with elemental semiconductors (see the precedingsection). Some typical compound semiconductors are given in Table 17.4.Table 17.5 gives values of band gap (Eg ), electron mobility (µe), holemobility (µh), and conduction electron density at room temperature(n) for various intrinsic, compound semiconductors. As with elementalsemiconductors, the mobility values also apply to extrinsic, compoundsemiconductors.

SAMPLE PROBLEM 17.11An intrinsic GaAs (n-type) semiconductor contains 100 ppb Se byweight. What is the mole percent Se?

SOLUTION

Considering 100 g of doped GaAs and following the method ofSample Problem 17.4, we find

100

109× 100 g Se = 1 × 10−5 g Se.

Using data from Appendix 1, we obtain

no. g · atom Se = 1 × 10−5 g Se

78.96 g/g · atom= 1.27 × 10−7 g · atom

SECTION 17.3 • COMPOUND SEMICONDUCTORS 645

and

no. moles GaAs = (100 − 1 × 10−5) g GaAs

(69.72 + 74.92) g/mol= 0.691 mol.

Finally,

mol % Se = 1.27 × 10−7 g · atom

(0.691 + 1.27 × 10−7) mol× 100

= 18.4 × 10−6 mol%.

SAMPLE PROBLEM 17.12Calculate the intrinsic conductivity of GaAs at 50◦C.

SOLUTION

From Equation 15.14,

σ = nq(µe + µh).

Using the data of Table 17.5, we obtain

σ300 K = (1.4 × 1012 m−3)(0.16 × 10−18 C)(0.720 + 0.020) m2/(V · s)

= 1.66 × 10−7 �−1 · m−1.

From Equation 17.2,

σ = σ0e−Eg/2kT ,

orσ0 = σe+Eg/2kT .

Again using data from Table 17.5, we obtain

σ0 = (1.66 × 10−7 �−1 · m−1)e+(1.47 eV)/2(86.2×10−6 eV/K)(300 K)

= 3.66 × 105 �−1 · m−1.

Then,

σ50◦C = (3.66 × 105 �−1 · m−1)e−(1.47 eV)/2(86.2×10−6 eV/K)(323 K)

= 1.26 × 10−6 �−1 · m−1.


SAMPLE PROBLEM 17.13In intrinsic semiconductor CdTe, what fraction of the current is carriedby electrons, and what fraction is carried by holes?

SOLUTION

By using Equation 15.14,

σ = nq(µe + µh),

it is apparent that

fraction due to electrons = µe

µe + µh

and

fraction due to holes = µh

µe + µh

.

Using the data of Table 17.5 yields

fraction due to electrons = 0.070

0.070 + 0.007= 0.909

and

fraction due to holes = 0.007

0.070 + 0.007= 0.091.

................................................................................................................................................


Sample Problem 17.11 describes a GaAs semiconductor with100-ppb Se doping. What is the atomic density of Se atomsin this extrinsic semiconductor? (The density of GaAs is 5.32Mg/m3.)


Calculate the intrinsic conductivity of InSb at 50◦C. (See Sam-ple Problem 17.12.)


For intrinsic InSb, calculate the fraction of the current carriedby electrons and the fraction carried by electron holes. (SeeSample Problem 17.13.)

SECTION 17.4 • AMORPHOUS SEMICONDUCTORS 647

17.4 AMORPHOUS SEMICONDUCTORS

In Section 4.5, the economic advantage of amorphous (noncrystalline)semiconductors was pointed out. The technology of these amorphous mate-rials is somewhat behind that of their crystalline counterparts, and thescientific understanding of semiconduction in noncrystalline solids is lessdeveloped. However, commercial development of amorphous semiconduc-tors has evolved into a wide market. These materials account for more thanone-quarter of the photovoltaic (solar cell) market, largely for portable con-sumer products such as solar watches and laptop displays. Table 17.6 listssome examples of amorphous semiconductors. One should note that amor-phous silicon is often prepared by the decomposition of silane (SiH4). Thisprocess is frequently incomplete and ‘‘amorphous silicon’’ is then, in reality,a silicon-hydrogen alloy. Table 17.6 includes a number of chalcogenides(S, Se, and Te, together with their compounds). Amorphous selenium hasplayed a central role in the xerography process (as a photoconductivecoating that permits the formation of a charged image).

SAMPLE PROBLEM 17.14Consider an amorphous silicon that contains 20 atomic % hydrogen.To a first approximation, the hydrogen atoms are present in interstitialsolid solution. If the density of pure amorphous silicon is 2.3 g · cm−3 ,what is the effect on density of adding the hydrogen?

SOLUTION

Consider 100 g of the Si-H ‘‘alloy,’’ which will contain x g of H and(100 − x) g of Si. Or, using Appendix 1 data, we can say that it willcontain

x g

1.008 gg · atom H

and(100 − x) g

28.09 gg · atom Si.

Table 17.6 Some Amorphous Semiconductors

Group Semiconductor Group Semiconductor

IV A Si III–V GaAsGe

VI A S IV–VI GeSeSe GeTeTe V–VI As2 Se3


However,

x/1.008

(100 − x)/28.09= 0.2

0.8,

or

x = 0.889 g H

and

100 − x = 99.11 g Si.

The volume occupied by the silicon will be

V = 99.11 g Si

2.3 gcm3 = 43.09 cm3.

Therefore, the density of the ‘‘alloy’’ will be

ρ = 100 g

43.09 cm3= 2.32 g · cm−3,

which is an increase of

2.32 − 2.30

2.30× 100 = 0.90%.

Note. This minor difference is one reason why those peopleworking with this material did not initially realize that ‘‘amor-phous silicon’’ generally contained large quantities of hydrogen. Inaddition, hydrogen is an easy element to miss in routine chemicalanalyses.


In Sample Problem 17.14, we find that 20 mol % hydrogen hasa minor effect on the final density of an amorphous silicon.Suppose that we make an amorphous silicon by the decompo-sition of silicon tetrachloride, SiCl4 , rather than silane, SiH4 .Using similar assumptions, calculate the effect of 20 mol % Clon the final density of an amorphous silicon.

17.5 PROCESSING OF SEMICONDUCTORS

The most striking feature of semiconductor processing is the ability toproduce materials of unparalleled structural and chemical perfection. Fea-ture boxes in Chapters 3 and 9 illustrated how this perfection is achieved.

SECTION 17.5 • PROCESSING OF SEMICONDUCTORS 649

Table 17.7 Some Major Crystal Growing Techniques for Semiconductors

Description Used for

Czochralski or Teal–LittleMelt

Si, Ge, InSb, GaAs

Float zone Melt Si

Zone levelingMelt

Ge, GaAs, InSb, InAs

Verneuil

Melt

Refractory oxides

Bridgman

Melt

Metals, some II–VI compounds

Temperature T1 , gradient T2Alloy melt

SiC, diamond

Source: W. R. Runyan and S. B. Watelski, in Handbook of Materials and Processes for Electronics, C. A.Harper, Ed., McGraw-Hill Book Company, New York, 1970.

Table 17.7 summarizes some of the major crystal-growing techniques usedfor producing high-quality single crystals of semiconducting materials bygrowth from the melt. Following the production of the crystals, they aresliced into thin wafers, usually by a diamond-impregnated blade or wire.After grinding and polishing, the wafers are ready for the complex sequenceof steps necessary to build a microcircuit. This processing sequence will be


illustrated in Section 17.6. Structural perfection of the original semiconduc-tor crystal is the result of the highly developed technology of crystal growing.The chemical perfection is due to the process of zone refining, as illustratedin the feature box in Chapter 9. The phase diagram shown there illustratesthat the impurity content in the liquid is substantially greater than that inthe solid. These data allow us to define a segregation coefficient, K, as

K = Cs

Cl

, (17.9)

where Cs and Cl are the impurity concentrations in solid and liquid,respectively. Of course, K is much less than 1 for the case shown in thefeature box of Chapter 9, and near the edge of the phase diagram, thesolidus and liquidus lines are fairly straight, giving a constant value of K

over a range of temperatures.Structural defects, such as dislocations, adversely affect the perfor-

mance of the silicon-based devices discussed in the next section. Such defectsare a common byproduct of oxygen solubility in the silicon. A process knownas gettering is used to ‘‘getter’’ (or capture) the oxygen, removing it from theregion of the silicon where the device circuitry is developed. Ironically, thedislocation-producing oxygen is often removed by introducing dislocationson the ‘‘back’’ side of wafers, where the ‘‘front’’ side is defined as that wherethe circuitry is produced. Mechanical damage (e.g., by abrasion or laserimpact) produces dislocations that serve as gettering sites at which Si02 pre-cipitates are formed. This approach is known as extrinsic gettering. A moresubtle approach is to heat treat the silicon wafer so that Si02 precipitates formwithin the wafer, but sufficiently far below the front face to prevent inter-ference with circuit development. This latter approach is known as intrinsicgettering and may involve as many as three separate annealing steps between600 and 1,250◦C extending over a period of several hours. Both extrinsicand intrinsic gettering are commonly used in semiconductor processing.

The rapid development of new processes has become commonplacein the fabrication of semiconductor devices. Some examples will be intro-duced in Section 17.6. In addition, many modern electronic devices arebased on the buildup of thin-film layers of one semiconductor on anotherwhile maintaining some particular crystallographic relationship between thelayer and the substrate. This vapor deposition technique is called epitaxy.Homoepitaxy involves the deposition of a thin film of essentially the samematerial as the substrate (e.g., Si on Si). Heteroepitaxy involves two mate-rials of significantly different compositions (e.g., Alx Ga1−x As on GaAs).Advantages of epitaxial growth include careful compositional control andreduced concentrations of unwanted defects and impurities. Figure 17.15illustrates the process of molecular-beam epitaxy (MBE), a highly con-trolled ultrahigh-vacuum deposition process. The epitaxial layers are grownby impinging heated beams of the appropriate atoms or molecules on aheated substrate. The effusion cells, or Knudsen∗ cells, provide a flux, F ,

∗ Martin Hans Christian Knudsen (1871–1949), Danish physicist. His brilliant career atthe University of Copenhagen centered on many pioneering studies of the nature of

SECTION 17.5 • PROCESSING OF SEMICONDUCTORS 651

Thermocouple

Furnace

ShutterAl

Ga

As

Figure 17.15 Schematic illustrationof the molecular-beam epitaxytechnique. Resistance-heatedsource furnaces (also called effu-sion or Knudsen cells) providethe atomic or molecular beams(approximately 10-mm radius).Shutters control the deposition ofeach beam onto the heated sub-strate. (From J. W. Mayer andS. S. Lau, Electronic MaterialsScience: For Integrated Circuitsin Si and GaAs, Macmillan Pub-lishing Company, New York,1990.)

of atoms (or molecules) per second given by

F = pA√2πmkT

, (17.10)

where p is the pressure in the effusion cell, A is the area of the aperture,m is the mass of a single atomic or molecular species, k is the Boltzmann’sconstant, and T is the absolute temperature.

SAMPLE PROBLEM 17.15We can use the Al-Si phase diagram (Figure 9.13) to illustrate theprinciple of zone refining. Assuming that we have a bar of silicon withaluminum as its only impurity, (a) calculate the segregation coefficient,K , in the Si-rich region and (b) calculate the purity of a 99 wt % Sibar after a single pass of the molten zone. (Note that the solidus canbe taken as a straight line between a composition of 99.985 wt % Si at1,190◦C and 100 wt % Si at 1,414◦C.)

gases at low pressure. He also developed a parallel interest in hydrography, establishingmethods to define the various properties of seawater.


SOLUTION(a) Close inspection of Figure 9.13 indicates that the liquidus

curve crosses the 90% Si composition line at a temperature of1,360◦C.

The solidus line can be expressed in the form

y = mx + b,

with y being the temperature and x being the silicon compo-sition (in wt %). For the conditions stated,

1,190 = m(99.985) + b

and1,414 = m(100) + b.

Solving the equations gives

m = 1.493 × 104 and b = −1.492 × 106.

At 1,360◦C (where the liquidus composition is 90% Si), thesolid composition is given by

1,360 = 1.493 × 104x − 1.492 × 106,

or

x = 1,360 + 1.492 × 106

1.493 × 104

= 99.99638.

The segregation coefficient is calculated in terms of impuritylevels; that is,

cs = 100 − 99.99638 = 0.00362 wt % Al

andcl = 100 − 90 = 10 wt % Al,

yielding

K = cs

cl

= 0.00362

10= 3.62 × 10−4.

(b) For the liquidus line, a similar straight-line expression takeson the values

1,360 = m(90) + b

SECTION 17.6 • SEMICONDUCTOR DEVICES 653

and1,414 = m(100) + b,

yielding

m = 5.40 and b = 874.

A 99 wt % Si bar will have a liquidus temperature

T = 5.40(99) + 874 = 1,408.6◦C.

The corresponding solidus composition is given by

1,408.6 = 1.493 × 104x − 1.492 × 106,

or

x = 1,408.6 + 1.492 × 106

4,924= 99.999638wt % Si.

An alternate composition expression is

(100 − 99.999638)% Al

100%= 3.62 × 10−6Al,

or 3.62 parts per million Al.

Note. These calculations are susceptible to round-off errors. Val-ues for m and b in the solidus-line equation must be carried toseveral places.

................................................................................................................................................


The purity of a 99 wt % Si bar after one zone-refining passis found in Sample Problem 17.15. What would be the purityafter two passes?

17.6 SEMICONDUCTOR DEVICES

Little space in this book is devoted to details of the final applications ofengineering materials. Our focus is on the nature of the material itself. Forstructural and optical applications, detailed descriptions are often unneces-sary. The structural steel and glass windows of modern buildings are familiarto us all, but the miniaturized applications of semiconductor materials aregenerally less so. In this section, we look briefly at some solid-state devices.

Miniaturized electrical circuits are the result of the creative combina-tion of p-type and n-type semiconducting materials. An especially simpleexample is the rectifier, or diode, shown in Figure 17.16. This diode contains


a single p-n junction (i.e., a boundary between adjacent regions of p-typeand n-type materials). This junction can be produced by physically joiningtwo pieces of material, one p-type and one n-type. Later, we shall see moresubtle ways of forming such junctions by diffusing different dopants (p-typeand n-type) into adjacent regions of an (initially) intrinsic material. Whenvoltage is applied to the device, as shown in Figure 17.16b, the charge carri-ers are driven away from the junction (the positive holes toward the negativeelectrode, and the negative electrons toward the positive electrode). Thisreverse bias quickly leads to polarization of the rectifier. Majority chargecarriers in each region are driven to the adjacent electrodes, and only a mini-mal current (due to intrinsic charge carriers) can flow. Reversing the voltageproduces a forward bias, as shown in Figure 17.16c. In this case, the majoritycharge carriers in each region flow toward the junction where they are con-tinuously recombined (each electron filling an electron hole). This processallows a continuous flow of current in the overall circuit. This continuousflow is aided at the electrodes. Electron flow in the external circuit provides afresh supply of electron holes (i.e., removal of electrons) at the positive elec-trode and a fresh supply of electrons at the negative electrode. Figure 17.17ashows the current flow as a function of voltage in an ideal rectifier, whileFigure 17.17b shows current flow in an actual device. The ideal rectifier

Electronholes

e�

Conductionelectrons

Electronholes

e�

Conductionelectrons

�

Insulatingzone

electrodep-n junction

n-typematerial

p-typematerial

Recombinationzone

electrode electrode

(b)(a)

(c)

electrode�

� �

Figure 17.16 (a) A solid-state rectifier, or diode, contains a single p –n junction. (b) In reverse bias,polarization occurs and little current flows. (c) In forward bias, majority carriers in each region flowtoward the junction, where they are continuously recombined.


Forward bias

Reverse bias

Forward bias

Reverse bias

Current, I

Voltage, V0(�) (�)

(�)

(�)

(a)

Current, I

Voltage, V0(�) (�)

(�)

(�)

(b)

Figure 17.17 Current flow as a function of voltage in (a) an ideal rectifier and(b) an actual device such as that shown in Figure 17.16.

FPO

Figure 17.18 Comparison of avacuum-tube rectifier with asolid-state counterpart. Suchcomponents allowed substantialminiaturization in the early days ofsolid-state technology. (Courtesy ofR. S. Wortman.)

Junction 1:(forward-biased)

Junction 2:(reverse-biased)

holes

p(emitter)

n(base)

p(collector)

External load

VcVe

Figure 17.19 Schematic of a transistor (a p –n–p sandwich). Theovershoot of electron holes across the base (n-type region) is anexponential function of the emitter voltage, Ve . Because thecollector current (Ic ) is similarly an exponential function of Ve ,this device serves as an amplifier. An n–p –n transistorfunctions similarly except that electrons rather than holes are theoverall current source.

allows zero current to pass in reverse bias and has zero resistivity in forwardbias. The actual device has some small current in reverse bias (from minoritycarriers) and a small resistivity in forward bias. This simple solid-statedevice replaced the relatively bulky vacuum-tube rectifier (Figure 17.18).The solid-state devices to replace the various vacuum tubes allowed asubstantial miniaturization of electrical circuitry in the 1950s.

Perhaps the most heralded component in this solid-state revolutionwas the transistor shown in Figure 17.19. This device consists of a pair


of nearby p-n junctions. Note that the three regions of the transistorare termed emitter, base, and collector. Junction 1 (between the emitterand base) is forward biased. As such, it looks identical to the rectifier inFigure 17.16c. However, the function of the transistor requires behavior notconsidered in our description of the rectifier. Specifically, the recombinationof electrons and holes shown in Figure 17.16 does not occur immediately.In fact, many of the charge carriers move well beyond the junction. If thebase (n-type) region is narrow enough, a large number of the holes (excesscharge carriers) pass across junction 2. A typical base region is less than 1µm wide. Once in the collector, the holes again move freely (as majoritycharge carriers). The extent of ‘‘overshoot’’ of holes beyond junction 1 isan exponential function of the emitter voltage, Ve . As a result, the currentin the collector, Ic , is an exponential function of Ve ,

Ic = I0eVe/B, (17.11)

where I0 and B are constants. The transistor is an amplifier, since slightincreases in emitter voltage can produce dramatic increases in collectorcurrent. The p-n-p ‘‘sandwich’’ in Figure 17.19 is not a unique transis-tor design. An n-p-n system functions in a similar way, with electrons,rather than holes, being the overall current source. In integrated circuittechnology, the configuration in Figure 17.19 is also called a bipolar junctiontransistor (BJT).

A contemporary variation of transistor design is illustrated in Fig-ure 17.20. The field-effect transistor (FET) incorporates a ‘‘channel’’between a source and a drain (corresponding to the emitter and collec-tor, respectively, in Figure 17.19). The p-channel (under an insulating layerof vitreous silica) becomes conductive upon application of a negative volt-age to the gate (corresponding to the base in Figure 17.19). The channel’sfield, which results from the negative gate voltage, produces an attractionfor holes from the substrate. (In effect, the n-type material just under thesilica layer is distorted by the field to p-type character.) The result is the

Source Gate� aluminum

metallizationDrain

Holeconduction

n

pp

v–SiO2

Figure 17.20 Schematic of a field-effect transistor (FET). A negative voltageapplied to the gate produces a field under the vitreous silica layer and aresulting p-type conductive channel between the source and the drain. Thewidth of the gate is less than 1 µm in contemporary integrated circuits.


free flow of holes from the p-type source to the p-type drain. The removalof the voltage on the gate effectively stops the overall current.

An n-channel FET is comparable to that shown in Figure 17.20, butwith the p- and n-type regions reversed and electrons, rather than electronholes, serving as charge carriers. The operating frequency of high-speedelectronic devices is limited by the time required for an electron to movefrom the source to the drain across such an n-channel. A primary effortin silicon-based integrated-circuit (IC) technology is to reduce the gatelength, with a value of < 1µm being typical and ≈ 0.1µm being the currentminimum. An alternative is to go to a semiconductor with a higher electronmobility, such as GaAs. (Note the relative values of µe for Si and GaAs inTables 17.1 and 17.5.) The use of GaAs must be balanced against its highercost and more difficult processing technology.

Modern technology has moved with great speed, but nowhere hasprogress moved at quite such a dizzy pace as in solid-state technology.Solid-state circuit elements such as diodes and transistors allowed substan-tial miniaturization when they replaced vacuum tubes. Further increases inminiaturization have occurred by eliminating separate solid-state elements.A sophisticated electrical microcircuit such as that shown in Figure 1.17can be produced by application of precise patterns of diffusible n-type andp-type dopants to give numerous elements within a single chip of single-crystal silicon. Figure 17.21 shows an array of many such chips that have been

FPO

Figure 17.21 A silicon wafer (1.5 mm thick × 150 mm diameter) containing numerous chipsof the type illustrated in Figure 1.17. (Courtesy of R. D. Pashley, Intel Corporation.)


produced on a single silicon wafer, a thin slice from a cylindrical single crystalof high-purity silicon. A typical wafer is 150 mm (6 in.), 200 mm (8 in.), or 300mm (12 in.) in diameter and 250 µm thick, with chips being 5 to 10 mm on anedge. Individual circuit element patterns are produced by lithography, orig-inally a print-making technique involving patterns of ink on a porous stone(giving the prefix litho from the Greek word lithos, meaning ‘‘stone’’). Thesequence of steps used to produce a vitreous SiO2 pattern on silicon is shownin Figure 17.22. The original uniform SiO2 layer is produced by thermaloxidation of the Si between 900 and 1,100◦C. The key to the IC lithographyprocess is the use of a polymeric photoresist. In Figure 17.22, a ‘‘positive’’photoresist is used in which the material is depolymerized by exposure toultraviolet radiation. A solvent is used to remove the exposed photoresist. A‘‘negative’’ photoresist is used in the metallization process of Figure 17.23,in which the ultraviolet radiation leads to cross-linking of the polymer,allowing the solvent to remove the unexposed material. The production ofa controlled region of doped material is illustrated in Figure 17.24, show-ing the two-step process of ion implantation through a vitreous SiO2 mask,followed by diffusion of the dopant in a temperature range of 950 to 1,050◦C.

During the later stages of circuit fabrication, oxide and nitride layersare often deposited on silicon to serve as insulating films between metallines or as insulating, protective covers. These layers are generally depositedby chemical vapor deposition (CVD). SiO2 films can be produced between250 and 450◦C by the reaction of silane and oxygen:

SiH4 + 02 → SiO2 + 2 H2. (17.12)

Figure 17.22 Sche-matic illustration ofthe lithography pro-cess steps for pro-ducing vitreous SiO2

patterns on a siliconwafer. (From J. W.Mayer and S. S. Lau,Electronic MaterialsScience: For Inte-grated Circuits in Siand GaAs, Macmil-lan Publishing Com-pany, New York,1990.)

Resist

(c) Remove exposed resist (d) Etch SiO2 (e) Remove resist—patterntransferred to SiO2

Ultraviolet radiation

Glass mask

SiO2

SiO2

Resist

Si

Si Si Si

Si

(a) Coat with photoresist (b) Expose photoresist(positive, bonds broken) SiO2


Resist

Ultraviolet radiation

Glass mask

Resist

Metal

Si

Si Si

Exposedresist

Si

Si

Metal

(a) Coat with photoresist

(c) Remove unexposed resist (d) Deposit metal film (e) Remove resist and metal on resist-metalpattern remains on Si

(b) Expose photoresist(negative, bonds cross-link)

Figure 17.23 Sche-matic illustrationof the lithographyprocess steps forproducing metalpatterns on a sili-con wafer. (FromJ. W. Mayer andS. S. Lau, Elec-tronic MaterialsScience: For In-tegrated Circuitsin Si and GaAs,Macmillan Pub-lishing Company,New York, 1990.)

(a) Ion implantation of dopants (As).

(b) Drive-in diffusion, 950-1,050 �C

Si

SiO2

Si

Implantedregion

Ion beam, 100 keV As�

SiO2

Figure 17.24 Schematic illustration ofthe two-step doping of a silicon waferwith arsenic producing an n-typeregion beneath the vitreous SiO2

mask. (From J. W. Mayer and S. S.Lau, Electronic Materials Science:For Integrated Circuits in Si andGaAs, Macmillan Publishing Com-pany, New York, 1990.)


FPO

Figure 17.25 Typical metal wire bondto an integrated circuit. (FromC. Woychik and R. Senger, in Princi-ples of Electronic Packaging, D. P.Seraphim, R. C. Lasky, and C.-Y. Li,Eds., McGraw-Hill Book Company,New York, 1989.)

Silicon nitride films involve the reaction of silane and ammonia:

3 SiH4 + 4 NH3 → Si3N4 + 12 H2. (17.13)

Ultimately, the submicron-scale IC patterns must be connected to themacroscopic electronic ‘‘package’’ by relatively large-scale metal wires withdiameters of 25 to 75 µm (Figure 17.25).

An active area of development at the current time is the productionof quantum wells, which are thin layers of semiconducting material inwhich the wavelike electrons are confined within the layer thickness, adimension as small as 2 nm. Advanced processing techniques are being usedto develop such confined regions in two dimensions (quantum wires) or inthree dimensions (quantum dots, again as small as 2 nm on a side). Thesesmall dimensions permit electron transit times of less than a picosecond andcorrespondingly high device operating speeds.

In summary, semiconductor devices have revolutionized modern lifeby providing for the miniaturization of electronic circuits. The replacementof traditional, large-scale elements such as diodes and transistors withseparate solid-state counterparts started a revolution. The developmentof integrated microcircuits accelerated this revolution. The rapid paceat which chips replaced separate elements is indicated in Figure 17.26.Miniaturization is continuing by reducing the size of microcircuit elements.At the outset, miniaturization of electronics was driven by the aerospaceindustry, for which computers and circuitry needed to be small and low inpower consumption. The steady and dramatic reduction in cost that hasaccompanied these developments has led to the increasing crossover ofapplications into industrial production and control, as well as consumerelectronics.

The dramatic changes in our technology are nowhere more evidentthan in the computer field. In addition to the amplification of electrical sig-nals discussed previously, transistors and diodes can also serve as switching


%

100

80

60

40

20

01975

4

19

75

2

10

460

24

16

18

55

11

Custom chips

Customizablechips

Standard chips:Memories,microprocessors,etc.

Transistors, diodes,etc.

19801985

Semiconductor Usage1975-1985

Figure 17.26 Although separate solid-stateelements such as transistors and diodes(e.g., Figure 17.18) provide miniaturiza-tion compared with vacuum tubes, micro-circuits (e.g., Figure 1.17) allow substan-tially greater size reduction. The trend inwhich industry moved to microcircuit chipsis shown here. Custom chips are thosedesigned for specific applications. Standardchips represent more general-purpose cir-cuit designs. Customizable chips are pro-duced partway like standard chips, but infinal stages are prepared for specific circuitapplications. There can be a fivefold differ-ence in cost between a fully custom chip anda standard one. (Courtesy of the San Fran-cisco Examiner, based on data provided bythe Digital Equipment Corporation.)

devices. This application is the basis of the computational and informa-tion storage functions of computers. The elements within the microcircuitrepresent the two states (‘‘off’’ or ‘‘on’’) of the binary arithmetic of thedigital circuit. In this application, miniaturization has led to the trend awayfrom mainframes to personal computers and, further, to portable (laptop)computers. Simultaneous with this trend has been a steady reduction in costand an increase in computational power.

Figure 17.27 illustrates the dramatic progress in the miniaturization ofcomputer chips. The number of transistors produced in the microcircuitryof a single chip has, over roughly 3 decades, gone from a few thousand totens of millions. These numbers have generally doubled every 2 years. Thissteady pace of miniaturization has become widely known as Moore’s lawafter Gordon Moore, cofounder of Intel Corporation, who predicted this

1970

808680286

8038680486

PentiumPentium II

Pentium IIIPentium IVPentium Pro

4004 processor

100 M

10 M

1 M

100 K

10 K

1 K

1975 1980 1985

Year

Num

ber

of tr

ansi

stor

s

1990 1995 2000 2005

8080

Figure 17.27 The rapid and steady growthin the number of transistors containedon a single microcircuit chip has gener-ally followed Moore’s law, which statesthat the number doubles roughly everytwo years. (After data from Intel Cor-poration.)


capability in the early days of IC technology. While current lithographytechniques can produce features on the order of a few tenths of a µm(a few hundred nm) in width, intense research is being conducted on theuse of short wavelength ultraviolet and x-ray litography. As we can seein Figure 16.1, UV and x-ray wavelengths are much shorter than those ofvisible light and can potentially allow production of lithographic featureson the order of 0.1 µm (100 nm). In this way, microcircuit technology couldcontinue to follow Moore’s law into a level of one billion transistors per chip.

THE MATERIAL WORLD

A Brief History of the Electron

Given the ubiquitous role of electronics in mod-ern life, it is perhaps surprising that the electronitself was ‘‘discovered’’ only toward the end ofthe 19th century. In 1897, Professor J. J. Thomsonof Cambridge University in England showed thatthe cathode rays in a device equivalent to a prim-itive version of the television tube were streamsof negatively charged particles. He called theseparticles corpuscles. By varying the magnitudesof electric and magnetic fields through which thecorpuscles traveled, he was able to measure theratio of mass m to charge q. Thomson further-more made the bold claim that his corpuscleswere a basic constituent of all matter and thatthey were more than a 1,000 times lighter thanthe lightest known atom, hydrogen. He was righton both counts. (The electron’s mass is 1/1836.15that of the hydrogen atom.) As a result of hism/q measurement combined with his bold andaccurate claims, Thomson is remembered as thediscoverer of the electron.

Fifty years later, John Bardeen, Walter Brat-tain, and William Shockley at Bell Labs in NewJersey discovered that a small single crystal ofgermanium provided electronic signal amplifica-tion. This first transistor ushered in the era ofsolid-state electronics. In 1955, Dr. Shockley leftBell Labs and started the Shockley Semicon-ductor Laboratory of Beckman Instruments inMountain View, California. In 1963, he movedon to Stanford University, where he was a Pro-fessor of Engineering Science for many years.

Shockley’s experience at the Shockley Semicon-ductor Laboratory soured in 1957 when a groupof young engineers he dubbed the ‘‘traitorouseight’’ left to form their own company, FairchildSemiconductor, with the backing of the FairchildCamera and Instrument Company. Among theseyoung rebels were Gordon Moore and RobertNoyce.

FPO

(Courtesy of the Philosophical Magazine.)

By 1968, Moore and Noyce had become dis-enchanted with Fairchild. They were not alone.


Many of the engineers were leaving with thefeeling that technology was being supplanted bythe politics of the workplace. Moore and Noyceleft Fairchild to form a new company called Intel.They were joined in this venture by another for-mer Fairchild employee named Andrew Grove.At this time, there were 30,000 computers in theworld. Most were mainframes big enough to filla room; the rest were mini-computers roughlythe size of a refrigerator. Computer codes wereentered mechanically using punch cards. Theyoung Intel company had reasonably good successmaking computer memory, but in 1971 it took abold step in developing for a client, Busicom ofJapan, a radically new product called a micro-processor. The 4004 product took 9 months todevelop and contained 2,300 transistors on a sin-gle chip of silicon. Modest by today’s standards,the 4004 had as much computing power as thepioneering ENIAC computer invented in 1946,which weighed 27 Mg and contained 18,000 vac-uum tubes. Realizing it had a product with sub-stantial potential, Intel bought the design andmarketing rights to the 4004 microprocessor backfrom Busicom for $60,000. Shortly there after,

Busicom went bankrupt. The rest, as they say, ishistory.

FPO

Andrew Grove, Robert Noyce, and Gordon Moore in1975. (Courtesy of Intel Corporation.)

SAMPLE PROBLEM 17.16A given transistor has a collector current of 5 mA when the emittervoltage is 5 mV. Increasing the emitter voltage to 25 mV (a factor of 5)increases the collector current to 50 mA (a factor of 10). Calculate thecollector current produced by further increasing the emitter voltage to50 mV.

SOLUTION

Using Equation 17.11,

Ic = I0eVe/B ,

we are given

Ic = 5 mA when Ve = 5 mV


and

Ic = 50 mA when Ve = 25 mV.

Then,

50 mA

5 mA= e25 mV/B−5 mV/B,

giving

B = 8.69 mV

and

I0 = 5 mAe−(5 mV)/(8.69 mV)

= 2.81 mA.

Therefore,

Ic,50 mV = (2.81 mA)e50 mV/8.69 mV

= 886 mA.

................................................................................................................................................


In Sample Problem 17.16, we calculate, for a given transistor,the collector current produced by increasing the emitter voltageto 50 mV. Make a continuous plot of collector current versusemitter voltage for this device over the range of 5 to 50 mV.

SUMMARY

Following the discussion of intrinsic, elemental semiconductors in Chapter15, we note that the Fermi function indicates that the number of chargecarriers increases exponentially with temperature. This effect so dominatesthe conductivity of semiconductors that conductivity also follows an expo-nential increase with temperature (an example of an Arrhenius equation).This increase is in sharp contrast to the behavior of metals.

We consider the effect of impurities in extrinsic, elemental semicon-ductors. Doping a group IV A material, such as Si, with a group V Aimpurity, such as P, produces an n-type semiconductor in which negativecharge carriers (conduction electrons) dominate. The ‘‘extra’’ electron fromthe group V A addition produces a donor level in the energy band structureof the semiconductor. As with intrinsic semiconductors, extrinsic semicon-duction exhibits Arrhenius behavior. In n-type material, the temperature

CHAPTER 17 • KEY TERMS 665

span between the regions of extrinsic and intrinsic behavior is called theexhaustion range. A p-type semiconductor is produced by doping a groupIV A material with a group III A impurity, such as Al. The group IIIA element has a ‘‘missing’’ electron, producing an acceptor level in theband structure and leading to formation of positive charge carriers (elec-tron holes). The region between extrinsic and intrinsic behavior for p-typesemiconductors is called the saturation range. Hall effect measurements candistinguish between n-type and p-type conduction.

The major electrical properties needed to specify an intrinsic semi-conductor are band gap, electron mobility, hole mobility, and conductionelectron density (= electron-hole density) at room temperature. For extrin-sic semiconductors, one needs to specify either the donor level (for n-typematerial) or the acceptor level (for p-type material).

Compound semiconductors usually have an MX composition with anaverage of four valence electrons per atom. The III-V and II-VI compoundsare the common examples. Amorphous semiconductors are the noncrys-talline materials with semiconducting behavior. Elemental and compoundmaterials are both found in this category. Chalcogenides are importantmembers of this group.

Semiconductor processing is unique in the production of commercialmaterials in that exceptionally high-quality crystalline structure is required,together with chemical impurities in the ppb level. Structural perfection isapproached with various crystal-growing techniques. Chemical perfectionis approached by the process of zone refining. Vapor deposition techniques,such as molecular-beam epitaxy, are used to produce thin films for advancedelectronic devices.

To appreciate the applications of semiconductors, we review a few ofthe solid-state devices that have been developed in the past few decades.The solid-state rectifier, or diode, contains a single p-n junction. Currentflows readily when this junction is forward biased but is almost completelychoked off when reverse biased. The transistor is a device consisting ofa pair of nearby p-n junctions. The net result is a solid-state amplifier.Replacing vacuum tubes with solid-state elements such as these producedsubstantial miniaturization of electrical circuits. Further miniaturization hasresulted from the production of microcircuits consisting of precise patternsof n-type and p-type regions on a single-crystal chip. An increasingly finerdegree of miniaturization is an ongoing goal of this IC technology.

KEY TERMSacceptor level (630)amorphous semiconductor (645)amplifier (655)base (654)bipolar junction transistor (BJT) (655)chemical vapor deposition (CVD) (659)chip (656)

collector (654)compound semiconductor (642)conduction electron (620)device (653)diode (653)donor level (627)dopant (626)

drain (656)effusion cell (650)emitter (654)epitaxy (650)exhaustion range (630)extrinsic gettering (649)extrinsic semiconduction (626)


field-effect transistor (FET) (656)forward bias (654)gate (656)gettering (649)Hall effect (632)heteroepitaxy (650)homoepitaxy (650)integrated circuit (IC) (656)intrinsic gettering (649)intrinsic semiconduction (620)Knudsen cell (650)

lithography (657)microcircuit (656)molecular-beam epitaxy (MBE) (650)Moore’s law (661)n-type semiconductor (627)p-n junction (654)p-type semiconductor (630)photoresist (657)quantum dot (659)quantum well (659)quantum wire (659)

rectifier (653)reverse bias (654)saturation range (631)segregation coefficient (647)source (656)III-V compound (642)transistor (654)II-VI compound (642)vapor deposition (650)wafer (657)zone refining (647)

REFERENCES

Harper, C. A., and R. N. Sampson, Electronic Materials andProcesses Handbook, 2nd ed., McGraw-Hill, New York,1994.

Kittel, C., Introduction to Solid State Physics, 7th ed., JohnWiley & Sons, Inc., New York, 1996.

Mayer, J. W., and S. S. Lau, Electronic Materials Science: ForIntegrated Circuits in Si and GaAs, Macmillan PublishingCompany, New York, 1990.

Tu, K. N., J. W. Mayer, and L. C. Feldman, Electronic ThinFilm Science, Macmillan Publishing Company, New York,1992.

PROBLEMS

17.1 • Intrinsic, Elemental Semiconductors

17.1. In a 150-mm diameter × 0.5-mm-thick wafer ofpure silicon at room temperature, (a) how manyconduction electrons would be present, and (b) howmany electron holes would be present?

17.2. In a 50-mm diameter × 0.5-mm-thick wafer of puregermanium at room temperature, (a) how manyconduction electrons would be present, and (b) howmany electron holes would be present?

17.3. Using data from Table 17.1, make a plot similarto Figure 17.3 showing both intrinsic silicon andintrinsic germanium over the temperature range of27 to 200◦C.

17.4. Superimpose a plot of the intrinsic conductivity ofGaAs on the result of Problem 17.3.

17.5. Starting from an ambient temperature of 300 K,what temperature increase is necessary to doublethe conductivity of pure silicon?

17.6. Starting from an ambient temperature of 300 K,what temperature increase is necessary to doublethe conductivity of pure germanium?

17.7. There is a slight temperature dependence for theband gap of a semiconductor. For silicon, this depen-dence can be expressed as

Eg(T ) = 1.152 eV − AT 2

T + B,

where A = 4.73 × 10−4 eV/K, B = 636 K, and T isin Kelvin. What is the percentage error in taking theband gap at 200◦C to be the same as that at roomtemperature?

17.8. Repeat Problem 17.7 for GaAs, in which

Eg(T ) = 1.567 eV − AT 2

T + B,

where A = 5.405 × 10−4 eV/K and B = 204 K.

CHAPTER 17 • PROBLEMS 667

17.2 • Extrinsic, Elemental Semiconductors

17.9. An n-type semiconductor consists of 100 ppb of Pdoping, by weight, in silicon. What is (a) the molepercentage P and (b) the atomic density of P atoms?Compare your answer in part (b) with the maximumsolid solubility level given in Table 17.2.

17.10. An As-doped silicon has a conductivity of 2.00 ×10−2 �−1 · m−1 at room temperature. (a) What isthe predominant charge carrier in this material?(b) What is the density of these charge carriers?(c) What is the drift velocity of these carriers underan electrical field strength of 200 V/m? (The µe

and µh values given in Table 15.5 also apply for anextrinsic material with low impurity levels.)

17.11. Repeat Problem 17.10 for the case of a Ga-dopedsilicon with a conductivity of 2.00 × 10−2 �−1 · m−1

at room temperature.

17.12. Calculate the conductivity for the saturation rangeof silicon doped with 10-ppb boron.

17.13. Calculate the conductivity for the saturation rangeof silicon doped with 20-ppb boron. (Note Prob-lem 17.12.)

17.14. Calculate the conductivity for the exhaustion rangeof silicon doped with 10-ppb antimony.

17.15. Calculate the upper temperature limit of the satu-ration range for silicon doped with 10-ppb boron.(Note Problem 17.12.)

17.16. Calculate the upper temperature limit of the exhaus-tion range for silicon doped with 10-ppb antimony.(Note Problem 17.14.)

17.17. If the lower temperature limit of the saturationrange for silicon doped with 10-ppb boron is 110◦C,calculate the extrinsic conductivity at 300 K. (NoteProblems 17.12 and 17.15.)

17.18. Plot the conductivity of the B-doped Si of Problem17.17 in a manner similar to the plot in Figure 17.13.

17.19. If the lower temperature limit of the exhaustionrange for silicon doped with 10-ppb antimony is80◦C, calculate the extrinsic conductivity at 300 K.(Note Problems 17.14 and 17.16.)

17.20. Plot the conductivity of the Sb-doped Si of Problem17.19 in a manner similar to the plot in Figure 17.9.

17.21. In designing a solid-state device using B-doped Si, itis important that the conductivity not increase morethan 10% (relative to the value at room tempera-ture) during the operating lifetime. For this factoralone, what is the maximum operating temperatureto be specified for this design?

17.22. In designing a solid-state device using As-doped Si,it is important that the conductivity not increasemore than 10% (relative to the value at room tem-perature) during the operating lifetime. For thisfactor alone, what is the maximum operating tem-perature to be specified for this design?

• 17.23. (a) It was pointed out in Section 15.3 that thetemperature sensitivity of conductivity in semicon-ductors makes them superior to traditional ther-mocouples for certain high-precision temperaturemeasurements. Such devices are referred to as ther-mistors. As a simple example, consider a wire 0.5mm in diameter × 10 mm long made of intrinsicsilicon. If the resistance of the wire can be measuredto within 10−3 �, calculate the temperature sensi-tivity of this device at 300 K. (Hint: The very smalldifferences here may make you want to developan expression for dσ/dT .) (b) Repeat the calcula-tion for an intrinsic germanium wire of the samedimensions. (c) For comparison with the tempera-ture sensitivity of a metallic conductor, repeat thecalculation for a copper (annealed standard) wire ofthe same dimensions. (The necessary data for thiscase can be found in Table 15.2.)

17.24. An application of semiconductors of great use tomaterials engineers is the ‘‘lithium-drifted silicon,’’Si(Li), solid-state photon detector. This detector isthe basis for the detection of microstructural-scaleelemental distributions, as illustrated in Figure 4.33.A characteristic x-ray photon striking the Si(Li) pro-motes a number of electrons (N ) to the conductionband creating a current pulse, where

N = photon energy

band gap.

For an Si(Li) detector operating at liquid nitrogentemperature (77 K), the band gap is 3.8 eV. Whatwould be the size of a current pulse (N ) created by(a) a copper Kα characteristic x-ray photon (λ =


0.1542 nm) and (b) an iron Kα characteristic x-rayphoton (λ = 0.1938 nm)? (By the way, ‘‘lithium-drifted’’ refers to the Li dopant being diffused intothe Si under an electrical potential. The result is ahighly uniform distribution of the dopant.)

• 17.25. Using the information from Problem 17.24, sketcha ‘‘spectrum’’ produced by chemically analyzing astainless steel with characteristic x-rays. Assume theyield of x-rays is proportional to the atomic fractionof elements in the sample being bombarded by anelectron beam. The spectrum itself consists of sharpspikes of height proportional to the x-ray yield(number of photons). The spikes are located alonga ‘‘current pulse (N)’’ axis. For an ‘‘18–8’’ stainlesssteel (18 wt % Cr, 8 wt % Ni, bal. Fe), the followingspikes are observed:

FeKα(λ = 0.1938nm),

FeKβ(λ = 0.1757nm),

CrKα(λ = 0.2291nm),

CrKβ(λ = 0.2085nm),

NiKα(λ = 0.1659nm),

and

NiKβ(λ = 0.1500nm).

(Kβ photon production is less probable than Kα

production. Take the height of a Kβ spike to beonly 10% of that of the Kα spike for the sameelement.)

• 17.26. Using the information from Problems 17.24 and17.25, sketch a spectrum produced by chemicallyanalyzing a specialty alloy (75 wt % Ni, 25 wt % Cr)using characteristic x-rays.

17.3 • Compound Semiconductors

17.27. Calculate the atomic density of Cd in a 100-ppbdoping of GaAs.

17.28. The band gap of intrinsic InSb is 0.17 eV. Whattemperature increase (relative to room temperature= 25◦C) is necessary to increase its conductivity by(a) 10%, (b) 50%, and (c) 100%?

17.29. Illustrate the results of Problem 17.28 on anArrhenius-type plot.

17.30. The band gap of intrinsic ZnSe is 2.67 eV. What tem-perature increase (relative to room temperature =25◦C) is necessary to increase its conductivity by(a) 10%, (b) 50%, and (c) 100%?

17.31. Illustrate the results of Problem 17.30 on anArrhenius-type plot.

17.32. Starting from an ambient temperature of 300 K,what temperature increase is necessary to doublethe conductivity of intrinsic InSb?

17.33. Starting from an ambient temperature of 300 K,what temperature increase is necessary to doublethe conductivity of intrinsic GaAs?

17.34. Starting from an ambient temperature of 300 K,what temperature increase is necessary to doublethe conductivity of intrinsic CdS?

17.35. What temperature increase (relative to room tem-perature) is necessary to increase the conductivityof intrinsic GaAs by 1%?

17.36. What temperature increase (relative to room tem-perature) is necessary to increase by 1% the con-ductivity of (a) Se-doped GaAs and (b) Cd-dopedGaAs?

17.37. In intrinsic semiconductor GaAs, what fraction ofthe current is carried by electrons, and what fractionis carried by holes?

17.38. What fraction of the current is carried by electronsand what fraction is carried by holes in (a) Se-dopedGaAs and (b) Cd-doped GaAs, in the extrinsicbehavior range?

17.4 • Amorphous Semiconductors

17.39. Estimate the APF of amorphous germanium if itsdensity is reduced by 1% relative to the crystallinestate. (See Practice Problem 4.7.)

17.40. Ion implantation treatment of crystalline silicon canlead to the formation of an amorphous surfacelayer extending from the outer surface to the ionpenetration depth. This layer is considered a struc-tural defect for the crystalline device. What is theappropriate processing treatment to eliminate thisdefect?

CHAPTER 17 • PROBLEMS 669

17.5 • Processing of Semiconductors

17.41. When the aluminum impurity level in a silicon barhas reached 1 ppb, what would have been the purityof the liquid on the previous pass?

17.42. Suppose you have a bar of 99 wt % Sn, with theimpurity being Pb. Determine the impurity levelafter one zone refining pass. (Recall the phase dia-gram for the Pb-Sn system in Figure 9.16.)

17.43. For the bar in Problem 17.42, what would be theimpurity level after (a) two passes or (b) threepasses?

17.44. (a) Calculate the flux of gallium atoms out of anMBE effusion cell at a pressure of 2.9 × 10−6 atmand a temperature of 970◦C with an aperture areaof 500 mm2 . (b) If the atomic flux in part (a)is projected onto an area of 45,000 mm2 on thesubstrate side of the growth chamber, how muchtime is required to build up a monolayer of galliumatoms? (Assume, for simplicity, a square grid ofadjacent Ga atoms.)

17.6 • Semiconductor Devices

17.45. The high-frequency operation of solid-state devicescan be limited by the transit time of an electronacross the gate between the source and drain of anFET. For a device to operate at 1 gigahertz (109 s−1 ),a transit time of 10−9 s is required. (a) What elec-tron velocity is required to achieve this transittime across a 1-µm gate? (b) What electric field

strength is required to achieve this electron velocityin silicon? (c) For the same gate width and electricfield strength, what operating frequency would beachieved with GaAs, a semiconductor with a higherelectron mobility?

17.46. Make a schematic illustration of an n-p-n transistoranalogous to the p-n-p case shown in Figure 17.19.

17.47. Make a schematic illustration of an n-channelFET analogous to the p-channel FET shown inFigure 17.20.

17.48. Figure 17.25 illustrates the relatively large metalconnection needed to communicate with an IC.A limit to the increasing scale of integration inICs is the density of interconnection. A usefulempirical equation to estimate the number of sig-nal input/output (I/O) pins in a device package isP = KGα , where K and α are empirical constantsand G is the number of gates of the IC. (One gateis equal to approximately four transistors.) For Kand α values of 7 and 0.2, respectively, calculate thenumber of pins for devices with (a) 1,000, (b) 10,000,and (c) 100,000 gates.

17.49. As pointed out in this chapter, the progress inimproving the operating frequency of high-speedelectronic devices is directly coupled with the reduc-tion in the gate length in ICs. With this in mind,repeat Problem 17.45 for a 0.5 − µm gate.

17.50. Repeat Problem 17.49 for a state-of-the-art 0.1 −µm gate.

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