See Datasheet PDF - Texas ?? 12.7 μVRMS (20 Hz to 20 kHz) load. – 15.4 μVRMS (10 Hz to 100 kHz) ... – ≥52 dB (10 Hz to 400 kHz) include built-in current limit and thermal

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  • TPS7A49

    IN+18V OUT

    EN GND

    -18V

    TPS7A30

    IN OUT

    EN GND

    EVM

    +15V

    -15V

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    ReferenceDesign

    TPS7A49SBVS121E AUGUST 2010REVISED MAY 2015

    TPS7A49 36-V, 150-mA, Ultralow-Noise, Positive Linear Regulator1 Features 3 Description

    The TPS7A49 series of devices are positive, high-1 Input Voltage Range: 3 V to 36 V

    voltage (36 V), ultralow-noise (15.4 VRMS, 72-dB Noise: PSRR) linear regulators that can source a 150-mA 12.7 VRMS (20 Hz to 20 kHz) load. 15.4 VRMS (10 Hz to 100 kHz) These linear regulators include a CMOS logic-level-

    Power-Supply Ripple Rejection: compatible enable pin and capacitor-programmablesoft-start function that allows for customized power- 72 dB (120 Hz)management schemes. Other available features 52 dB (10 Hz to 400 kHz) include built-in current limit and thermal shutdown

    Adjustable Output: 1.194 V to 33 V protection to safeguard the device and system duringfault conditions. Output Current: 150 mA

    Dropout Voltage: 260 mV at 100 mA The TPS7A49 family is designed using bipolartechnology, and is ideal for high-accuracy, high- Stable with Ceramic Capacitors 2.2 Fprecision instrumentation applications where clean CMOS Logic-Level-Compatible Enable Pin voltage rails are critical to maximize system

    Fixed Current-Limit and Thermal Shutdown performance. This design makes the device anProtection excellent choice to power operational amplifiers,

    analog-to-digital converters (ADCs), digital-to-analog Packages: 8-Pin HVSSOP PowerPAD andconverters (DACs), and other high-performance3-mm 3-mm VSONanalog circuitry. Operating Temperature Range:In addition, the TPS7A49 family of linear regulators is40C to 125Csuitable for post dc-dc converter regulation. Byfiltering out the output voltage ripple inherent to dc-dc2 Applicationsswitching conversion, maximum system performance

    Supply Rails for Op Amps, DACs, ADCs, and is provided in sensitive instrumentation, test andOther High-Precision Analog Circuitry measurement, audio, and RF applications.

    Audio For applications where positive and negative high- Post DC-DC Converter Regulation and performance rails are required, consider TIs

    Ripple Filtering TPS7A30xx family of negative high-voltage, ultralow-noise linear regulators as well. Test and Measurement

    Rx, Tx, and PA Circuitry Device Information(1) Industrial Instrumentation PART NUMBER PACKAGE BODY SIZE (NOM) Base Stations and Telecom Infrastructure HVSSOP PowerPAD (8) 3.00 mm 3.00 mm

    TPS7A49VSON (8) 3.00 mm 3.00 mm

    (1) For all available packages, see the orderable addendum atthe end of the data sheet.

    Post DC-DC Converter Regulation for High-Performance Analog Circuitry

    1

    An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.

    http://www.ti.com/product/TPS7A49?dcmp=dsproject&hqs=pfhttp://www.ti.com/product/TPS7A49?dcmp=dsproject&hqs=sandbuysamplebuyhttp://www.ti.com/product/TPS7A49?dcmp=dsproject&hqs=tddoctype2http://www.ti.com/product/TPS7A49?dcmp=dsproject&hqs=swdesKithttp://www.ti.com/product/TPS7A49?dcmp=dsproject&hqs=supportcommunityhttp://www.ti.com/tool/TIDA-00237?dcmp=dsproject&hqs=rdhttp://www.ti.com/product/tps7a49?qgpn=tps7a49http://focus-webapps.ti.com/general/docs/sitesearch/searchdevice.tsp;jsessionid=FEK53BQSKYOA1QC1JAWBF2Q?partNumber=tps7a30

  • TPS7A49SBVS121E AUGUST 2010REVISED MAY 2015 www.ti.com

    Table of Contents1 Features .................................................................. 1 9 Application and Implementation ........................ 14

    9.1 Application Information............................................ 142 Applications ........................................................... 19.2 Typical Application .................................................. 163 Description ............................................................. 19.3 Do's and Donts ...................................................... 194 Revision History..................................................... 2

    10 Power Supply Recommendations ..................... 195 Pin Configuration and Functions ......................... 411 Layout................................................................... 196 Specifications......................................................... 5

    11.1 Layout Guidelines ................................................. 196.1 Absolute Maximum Ratings ..................................... 511.2 Layout Example .................................................... 216.2 ESD Ratings ............................................................ 511.3 Package Mounting ................................................ 216.3 Recommended Operating Conditions....................... 5

    12 Device and Documentation Support ................. 226.4 Thermal Information .................................................. 612.1 Device Support...................................................... 226.5 Electrical Characteristics........................................... 612.2 Documentation Support ........................................ 226.6 Typical Characteristics .............................................. 712.3 Community Resources.......................................... 227 Parameter Measurement Information ................ 1112.4 Trademarks ........................................................... 228 Detailed Description ............................................ 1212.5 Electrostatic Discharge Caution............................ 228.1 Overview ................................................................. 1212.6 Glossary ................................................................ 238.2 Functional Block Diagram ....................................... 12

    13 Mechanical, Packaging, and Orderable8.3 Feature Description................................................. 12Information ........................................................... 238.4 Device Functional Modes........................................ 13

    4 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.

    Changes from Revision D (March 2015) to Revision E Page

    Added DRB package to document ......................................................................................................................................... 1 Added TI Design .................................................................................................................................................................... 1 Changed Shutdown Protection Features bullet: removed Integrated .................................................................................... 1 Changed Packages Features bullet ...................................................................................................................................... 1 Added VSON row to Device Information table ...................................................................................................................... 1 Added DRB package to Pin Configuration and Functions section ........................................................................................ 4 Changed Pin Functions table: changed EN (changed VEN VEN(low)) and FB (deleted control-loop from first

    sentence) pin descriptions ..................................................................................................................................................... 4 Added DRB column to Thermal Information table ................................................................................................................. 6 Changed 35C to 45C in Thermal Protection section ......................................................................................................... 13 Changed TJ value for disabled mode in Table 1 to match Electrical Characteristics table ................................................. 13 Changed first sentence of Application Information section ................................................................................................. 14 Changed first sentence of Post DC-DC Converter Filtering section ................................................................................... 15 Changed Equation 3 ............................................................................................................................................................ 17 Changed 1.27 k to 100 k in description of R2 setting in the Detailed Design Procedure section .................................. 17 Added third paragraph and Figure 36 to Power Dissipation section .................................................................................... 20 Changed capacitor size value in footnote of Figure 37 ....................................................................................................... 21

    Changes from Revision C (December 2013) to Revision D Page

    Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementationsection, Power Supply Recommendations section, Layout section, Device and Documentation Support section, andMechanical, Packaging, and Orderable Information section ................................................................................................. 1

    Changed 9th bullet in Features list ........................................................................................................................................ 1 Removed pin drawing from front page of data sheet ............................................................

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