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Scalable, Differentiated, Future Proof Designing Remote ... · Designing Remote Radio Head Applications with FPGAs Scalable, Differentiated, Future Proof Comprehensive portfolio of

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Page 1: Scalable, Differentiated, Future Proof Designing Remote ... · Designing Remote Radio Head Applications with FPGAs Scalable, Differentiated, Future Proof Comprehensive portfolio of

Designing Remote Radio Head Applications with FPGAs

Scalable, Differentiated, Future Proof

Comprehensive portfolio of FPGA and ASIC platforms

•Stratix®VGSFPGAsforhigher-orderMIMOandhigh-bandwidthRRHdesigns

•Arria®VSoCFPGAsforlow-cost,integrateddesignsincludingactiveantennas

•Cyclone®VFPGAsforlow-endRRHdesigns,activeantennas,andsmallcells

•HardCopy®VASICsforlowest-costandlowest-powerdesignswiththesmallestboardsize

Remoteradiohead(RRH)technologyisevolvingatarapidpacetoaccommodatehigherbandwidthrequirementsincludingdiscontinuousspectrum,higher-ordermultipleinput/multipleoutput(MIMO),anddiverseformfactorssuchasactiveantennasandsmallcells.Altera’sbroadportfolioof28-nmFPGAsandASICscombinedwithproductivity-enhancingsoftwaretools,developmentboards,intellectualproperty(IP),andreferencedesignsenableyoutofutureproofanddifferentiateyourRRHdesigns.

Productivity-enhancing tools, IP, and development boards

•Easymultichanneldigitalupconverter(DUC)anddigitaldownconverter(DDC)referencedesignwithDSPBuilderAdvancedBlocksetlibrary

•Crestfactorreduction(CFR)anddigitalpredistortion(DPD)referencedesigns

•Off-the-shelfIPcoresforCommonPublicRadioInterface(CPRI),OpenBaseStationArchitectureInitiative(OBSAI),andJESD204Binterfaces

•State-of-the-artRFhardwaredevelopmentanddemonstrationkits

Faster and Differentiated Designs, Lower Total CostOurtechnologiesenablefuture-proof,multimodeRF/RRHdevelopment,whilealsoprovidingtoolstohelpaccelerateyourdesigncycleandlowertotalcostofownership(TCO).

Integrated, Scalable, and Flexible RRH Designs

CPRIOBSAIframer

EthernetMAC

Multi-channelTx SRC/DUC

Multi-channelRx SRC/DDC

CFR DPD

Nios II or ARM A9

software

Memorycontroller

Nios® II or ARM® A9 O/Mand configuration

Ethernet RS-232 DDR2/3 Flash

TxDAC

MIMOanalog

RFDPD

FB ADCRx

ADC

Altera® FPGA

EthernetI/F

RS-232I/F

DDR2/3memory

Flashmemory

DPD

Page 2: Scalable, Differentiated, Future Proof Designing Remote ... · Designing Remote Radio Head Applications with FPGAs Scalable, Differentiated, Future Proof Comprehensive portfolio of

©2012AlteraCorporation.Allrightsreserved.ALTERA,ARRIA,CYCLONE,HARDCOPY,MAX,MEGACORE,NIOS,QUARTUSandSTRATIXwordsandlogosaretrademarksofAlteraCorporationandregisteredintheU.S.PatentandTrademarkOfficeandaretrademarksorregisteredtrademarksinothercountries.Allotherwordsandlogosidentifiedastrademarksorservicemarksarethepropertyoftheirrespectiveholdersasdescribedatwww.altera.com/legal.January2012PDF SS-01050-3.0

Altera Corporation101 Innovation DriveSan Jose, CA 95134USAwww.altera.com

Altera European HeadquartersHolmers Farm WayHigh WycombeBuckinghamshireHP12 4XFUnited KingdomTelephone: (44) 1 94 602 000

Altera Japan Ltd.Shinjuku i-Land Tower 32F6-5-1, Nishi-ShinjukuShinjuku-ku, Tokyo 163-1332JapanTelephone: (81) 3 3340 9480www.altera.co.jp

Altera International Ltd.Unit 11-18, 9/FMillennium City 1, Tower 1388 Kwun Tong RoadKwun TongKowloon, Hong Kong Telephone: (852) 2945 7000

Altera’s Wireless RF FrameworkAltera’swirelessRFframeworkenablesyoutorapidlyprototypeandtestnewalgorithmsandarchitecturesinhardware,addressingevolvingsystem-levelRRHrequirements.

Altera’sRFframeworkcomponentsinclude:

•AnyofAltera’s40-nmand28-nmFPGAdevelopmentboardswithHSMCconnector

•Third-partyRFanalogboardssuchasAnalogDevices’MSDPDboardwithHSMCconnector

•QsyssystemintegrationtoolsubsystemwithFPGAlogicthatinterfacestotheanalog-to-digitalconvertersanddigital-toanalogconverters(ADCs/DACs),andplaysoutandcapturesdatabetweenexternalmemoryandtheanaloghardware

•Systemconsole-basedcommunicationbetweenFPGAandhostcomputerforeasycontrolofIPcomponentsfromMathWorks’MATLAB®environment

•DSPBuilderAdvancedBlockset-baseddesignsenablerapiddevelopmentofDUC,DDC,CFR,andDPDforwardpathandmatrixinversionblockswithouttheneedforregistertransferlevel(RTL)design

Altera’s Connectivity CoresYoucanalsoselectfromoursuiteofconnectivitycoresforcommodityinterfacessuchasCPRI,OBSAI,andtheemergingJESD204B-basedserialinterfacetodataconverters.WeperformedJESD204A/BinteroperabilitydemonstrationswithleadingdataconvertermanufacturersincludingAnalogDevicesandNXPSemiconductor.

Want to dig deeper?FormoreinformationabouthowAltera’s40-nmtransceiver-baseddeviceportfoliocansupportyourRRHapplications,contactyourlocalrepresentative,orvisitwww.altera.com/wireless.

Altera’s RF Framework Components