PQMH2 - Nexperia · 2017. 5. 4. · PQMH2 uewDeBPoµ1y1V°.:1lRRBPNtE0Be0eBseq Nexperia PQMH2 NPN/NPN resistor-equipped transistors; R1 = 47 kΩ, R2 = 47 kΩ All information provided

PQMH2NPN/NPN resistor-equipped transistors;R1 = 47 kΩ, R2 = 47 kΩ4 November 2015 Product data sheet

1. General descriptionNPN/NPN Resistor-Equipped Transistors (RET) in a leadless ultra small DFN1010B-6(SOT1216) Surface-Mounted Device (SMD) plastic package.

NPN/PNP complement: PQMD12.

2. Features and benefits• 100 mA output current capability• Built-in bias resistors• Simplifies circuit design• Low package height of 0.37 mm• Reduces component count• Reduces pick and place costs• AEC-Q101 qualified

3. Applications• Low current peripheral driver• Control of IC inputs• Replaces general-purpose transistors in digital applications• Mobile applications

4. Quick reference dataTable 1. Quick reference dataSymbol Parameter Conditions Min Typ Max Unit

Per transistor

VCEO collector-emittervoltage

open base - - 50 V

IO output current - - 100 mA

Per transistor

R1 bias resistor 1 [1] 33 47 61 kΩ

R2/R1 bias resistor ratio

Tamb = 25 °C

[1] 0.8 1 1.2

[1] See section "Test information" for resistor calculation and test conditions.

© Nexperia B.V. 2017. All rights reserved

Nexperia PQMH2NPN/NPN resistor-equipped transistors; R1 = 47 kΩ, R2 = 47 kΩ

PQMH2 All information provided in this document is subject to legal disclaimers.

Product data sheet 4 November 2015 2 / 14

5. Pinning informationTable 2. Pinning informationPin Symbol Description Simplified outline Graphic symbol

1 GND1 GND (emitter) TR1

2 I1 input ( base) TR1

3 O2 output (collector) TR2

4 GND2 GND (emitter) TR2

5 I2 input ( base) TR2




Transparent top view

1 67

8

2

3

5

4

DFN1010B-6 (SOT1216)

O1 I2 GND2

GND1 I1 O2

R2

TR1TR2

R1

R2 R1

aaa-019894

6. Ordering informationTable 3. Ordering information

PackageType number

Name Description Version

PQMH2 DFN1010B-6 DFN1010B-6: plastic thermal enhanced ultra thin smalloutline package; no leads; 6 terminals

SOT1216





7. MarkingTable 4. Marking codesType number Marking code

PQMH2 A 010

MARKING CODE(EXAMPLE)

PIN 1 INDICATION MARK

YEAR DATE CODE

READING DIRECTION

READING EXAMPLE:

A 110

aaa-019766

MARK-FREE AREA

VENDOR CODE

Fig. 1. DFN1010B-6 (SOT1216) binary marking code description





8. Limiting valuesTable 5. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).Symbol Parameter Conditions Min Max Unit

Per transistor

VCBO collector-base voltage open emitter - 50 V

VCEO collector-emitter voltage open base - 50 V

VEBO emitter-base voltage open collector - 10 V

positive - 40 VVI input voltage

negative - -10 V

IO output current - 100 mA

ICM peak collector current tp ≤ 1 ms; singel pulse - 100 mA

Ptot total power dissipation Tamb ≤ 25 °C [1] - 230 mW

Per device

Ptot total power dissipation Tamb ≤ 25 °C [1] - 350 mW

Tj junction temperature - 150 °C

Tamb ambient temperature -55 150 °C

Tstg storage temperature -65 150 °C

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standardfootprint.

Tamb (°C)-75 17512525 75-25

aaa-007377

200

100

300

400

Ptot(mW)

0

FR4 PCB, standard footprint

Fig. 2. Per device: Power derating curve





9. Thermal characteristicsTable 6. Thermal characteristicsSymbol Parameter Conditions Min Typ Max Unit

Per transistor

Rth(j-a) thermal resistancefrom junction toambient

in free air [1] - - 543 K/W

Per device

Rth(j-a) thermal resistancefrom junction toambient

in free air [1] - - 357 K/W

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.

aaa-007378

10-5 1010-210-4 10210-1tp (s)

10-3 1031

102

10

103

Zth(j-a)(K/W)

1

duty cycle =1

0.750.5

0.330.2

0.1

0.02 0.01

0

0.05

FR4 PCB, standard footprint

Fig. 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;typical values





10. CharacteristicsTable 7. CharacteristicsSymbol Parameter Conditions Min Typ Max Unit

Per transistor

ICBO collector-base cut-offcurrent (emitter open)

VCB = 50 V; IE = 0 A; Tamb = 25 °C - - 100 nA

VCE = 30 V; IB = 0 A; Tamb = 25 °C - - 1 µAICEO collector-emitter cut-offcurrent (base open) VCE = 30 V; IB = 0 A; Tamb = 150 °C - - 5 µA

IEBO emitter-base cut-offcurrent (collector open)

VEB = 5 V; IC = 0 A; Tamb = 25 °C - - 90 µA

hFE DC current gain VCE = 5 V; IC = 5 mA; Tamb = 25 °C 80 - -

VCEsat collector-emittersaturation voltage

IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C - - 150 mV

VI(off) off-state input voltage VCE = 5 V; IC = 100 µA; Tamb = 25 °C - 1.2 0.8 V

VI(on) on-state input voltage VCE = 0.3 V; IC = 2 mA; Tamb = 25 °C 3 1.6 - V

R1 bias resistor 1 [1] 33 47 61 kΩ

R2/R1 bias resistor ratio

Tamb = 25 °C

[1] 0.8 1 1.2

CC collector capacitance VCB = 10 V; IE = 0 A; f = 1 MHz;Tamb = 25 °C

- - 2.5 pF

fT transition frequency VCE = 5 V; IC = 10 mA; f = 100 MHz;Tamb = 25 °C

[2] - 230 - MHz

[1] See section "Test information" for resistor calculation and test conditions.[2] Characteristics of built-in transistor





IC (mA)10-1 102101

006aac752

102

10

103

hFE

1

(1)(2)

(3)

VCE = 5 V(1) Tamb = 100 °C(2) Tamb = 25 °C(3) Tamb = -40 °C

Fig. 4. DC current gain as a function of collectorcurrent; typical values

VCE (V)0 542 31

aaa-018667

0.04

0.06

0.02

0.08

0.1IC(A)

0

IB = 0.06 mA

0.12 mA

0.18 mA

0.24 mA

0.30 mA

0.36 mA

0.60 mA

0.42 mA0.48 mA0.54 mA

Tamb = 25 °C

Fig. 5. Collector current as a function of collector-emitter voltage; typical values

aaa-018666

IC (mA)10-1 102101

10-1

1

VCEsat(V)

10-2

(1)

(3)(2)

IC/IB = 20(1) Tamb = 100 °C(2) Tamb = 25 °C(3) Tamb = -40 °C

Fig. 6. Collector-emitter saturation voltage as afunction of collector current; typical values

006aac754

IC (mA)10-1 102101

1

10

VI(on)(V)

10-1

(1)

(2)

(3)

VCE = 0.3 V(1) Tamb = -40 °C(2) Tamb = 25 °C(3) Tamb = 100 °C

Fig. 7. On-state input voltage as a function of collectorcurrent; typical values





IC (mA)10-1 101

006aac755

1

10

VI(off)(V)

10-1

(1)

(2)(3)

VCE = 5 V(1) Tamb = -40 °C(2) Tamb = 25 °C(3) Tamb = 100 °C

Fig. 8. Off-state input voltage as a function of collectorcurrent; typical values

VCB (V)0 504020 3010

006aac756

0.8

1.2

0.4

1.6

2.0Cc

(pF)

0.0

f = 1 MHz; Tamb = 25 °C

Fig. 9. Collector capacitance as a function of collector-base voltage; typical values

006aac757

IC (mA)10-1 102101

102

103

fT(MHz)

10

VCE = 5 V; Tamb = 25 °C

Fig. 10. Transition frequency as a function of collector current; typical values of built-in transistor

11. Test information

11.1 Quality informationThis product has been qualified in accordance with the Automotive Electronics Council(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and issuitable for use in automotive applications.





11.2 Resistor calculation• Calculation of bias resistor 1 (R1)

• Calculation of bias resistor ratio (R2/R1)

R1

R2

GND

II1; II2

n.c.

II3; II4

aaa-020082

Fig. 11. Per transistor: Resistor test circuit

11.3 Resistor test conditionsTable 8. Resistor test conditions

Test conditionsR1 (kΩ) R2 (kΩ)

II1 II2 II3 II4

47 47 55 μA 105 μA -55 μA -105 μA

12. Package outline

5

32

13-03-05Dimensions in mm

0.340.40

0.04max

0.951.05

0.220.30

0.1250.205

1.051.15

0.275 0.275

0.320.40

0.35 0.35

1

6 4

0.150.23

Fig. 12. Package outline DFN1010B-6 (SOT1216)





13. Soldering

SOT1216Footprint information for reflow soldering of DFN1010B-6 package

sot1216_fr

solder land

solder resist

solder land plus solder paste

occupied area

Dimensions in mm

Issue date 13-03-0614-07-28

0.3 (6x)

1.10.6

0.250.35

0.35

0.51.21.3

0.25

1

1.35

0.35

0.15 0.150.2 (6x)

0.35

0.9

Fig. 13. Reflow soldering footprint for DFN1010B-6 (SOT1216)





14. Revision historyTable 9. Revision historyData sheet ID Release date Data sheet status Change notice Supersedes

PQMH2 v.1 20151104 Product data sheet - -





15. Legal information

15.1 Data sheet statusDocumentstatus [1][2]

Productstatus [3]

Definition

Objective[short] datasheet

Development This document contains data fromthe objective specification for productdevelopment.

Preliminary[short] datasheet

Qualification This document contains data from thepreliminary specification.

Product[short] datasheet

Production This document contains the productspecification.

[1] Please consult the most recently issued document before initiating orcompleting a design.

[2] The term 'short data sheet' is explained in section "Definitions".[3] The product status of device(s) described in this document may have

changed since this document was published and may differ in case ofmultiple devices. The latest product status information is available onthe Internet at URL http://www.nexperia.com.

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Quick reference data — The Quick reference data is an extract of theproduct data given in the Limiting values and Characteristics sections of thisdocument, and as such is not complete, exhaustive or legally binding.

Applications — Applications that are described herein for any of theseproducts are for illustrative purposes only. Nexperia makes norepresentation or warranty that such applications will be suitable for thespecified use without further testing or modification.

Customers are responsible for the design and operation of theirapplications and products using Nexperia products, and Nexperiaaccepts no liability for any assistance with applications orcustomer product design. It is customer’s sole responsibility to determinewhether the Nexperia product is suitable and fit for thecustomer’s applications and products planned, as well as for the plannedapplication and use of customer’s third party customer(s). Customers shouldprovide appropriate design and operating safeguards to minimize the risksassociated with their applications and products.

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Limiting values — Stress above one or more limiting values (as defined inthe Absolute Maximum Ratings System of IEC 60134) will cause permanentdamage to the device. Limiting values are stress ratings only and (proper)operation of the device at these or any other conditions above thosegiven in the Recommended operating conditions section (if present) or theCharacteristics sections of this document is not warranted. Constant orrepeated exposure to limiting values will permanently and irreversibly affectthe quality and reliability of the device.

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Translations — A non-English (translated) version of a document is forreference only. The English version shall prevail in case of any discrepancybetween the translated and English versions.

15.4 TrademarksNotice: All referenced brands, product names, service names andtrademarks are the property of their respective owners.





16. Contents1 General description ............................................... 12 Features and benefits ............................................13 Applications ........................................................... 14 Quick reference data ............................................. 15 Pinning information ...............................................26 Ordering information .............................................27 Marking ................................................................... 38 Limiting values .......................................................49 Thermal characteristics .........................................510 Characteristics .......................................................611 Test information ..................................................... 811.1 Quality information ............................................... 811.2 Resistor calculation .............................................. 911.3 Resistor test conditions ........................................ 912 Package outline ..................................................... 913 Soldering .............................................................. 1014 Revision history ...................................................1115 Legal information .................................................1215.1 Data sheet status ............................................... 1215.2 Definitions ...........................................................1215.3 Disclaimers .........................................................1215.4 Trademarks ........................................................ 13

© Nexperia B.V. 2017. All rights reservedFor more information, please visit: http://www.nexperia.comFor sales office addresses, please send an email to: [email protected] Date of release: 04 November 2015