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ESRGv3 Leveraging RISC-V to build an open-source (hardware) OS framework for reconfigurable IoT devices Miguel Silva, Tiago Gomes, Sandro Pinto [email protected] [email protected] [email protected]

Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

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Page 1: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3

Leveraging RISC-V to build an open-source (hardware) OS framework

for reconfigurable IoT devices

Miguel Silva, Tiago Gomes, Sandro Pinto

[email protected]@dei.uminho.pt

[email protected]

Page 2: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3

MotivationInternet of Things, Reconfigurable Platforms, RISC-V

ChamelIoTArchitecture, Proof-of-Concept ImplementationTABLE OF

CONTENTS Preliminary ResultsHardware Resources, Determinism and Performance

Roadmap & ConclusionNext steps, Final remarks

Page 3: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3

MotivationInternet of Things, Reconfigurable Platforms, RISC-V

ChamelIoT

Preliminary Results

Roadmap & Conclusion

Page 4: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3

Page 5: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3 5

RECONFIGURABLE PLATFORMSAs FPGAs get bigger, faster, and cheaper, their presence in the embedded systems market expands.

The migration of OS kernel services failed in being adopted due to the overwhelming presence of proprietary processor IPs.

In the IoT industry, these platforms are also gaining traction due to the performance, flexibility, and scalability they provide.

Page 6: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3 6

CHAMELIOTChamelIoT is an agnostic hardware OS framework for reconfigurable IoT platforms.

By leveraging the RISC-V architecture, ChamelIoT goals include providing:

• Real-time and Determinism• Performance• Agnosticism• Flexibility and Portability• Power Consumption

These trade-offs are often dictated by the application, usually including embedded Operating Systems

Page 7: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3

Motivation

ChamelIoTArchitecture, Proof-of-Concept Implementation

Preliminary Results

Roadmap & Conclusion

Page 8: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3 8

CHAMELIOT ARCHITECTUREChamelIoT’s hardware component main focus is to accelerate OS kernel services.

ChamelIoT aims at exploring the trade-offs between tightly- and loosely-coupled architectures.

Page 9: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3 9

CHAMELIOT ARCHITECTUREThe External Configuration Tool can be used to configure and fine-tune the full system.

• Kernel components;• Fine-grain features of system

components;• Configurations, e.g. tightly- vs

loosely-coupled.

Page 10: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3 10

CHAMELIOT ARCHITECTUREChamelIoT Abstraction Layer aims at providing agnosticism for applications targeting different OSes.

Page 11: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3 11

PROOF-OF-CONCEPT IMPLEMENTATIONStatus Registers are used to keep track of the state of the multiple linked lists.

Linked-List Node

Node Arrays are sets of nodes and registers that constitute the linked lists

Page 12: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3 12

PROOF-OF-CONCEPT IMPLEMENTATION

RoCC Instruction Format

Page 13: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3

Motivation

ChamelIoT

Preliminary ResultsHardware Resources, Determinism and Performance

Roadmap & Conclusion

Page 14: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3 14

HARDWARE RESOURCESChamelIoT PoC implementation was deployed and evaluated on a SiFive Freedom E300 in a Xilinx Arty-35T FPGA board.

• The base configuration supported a total of 8 threads and 8 priority levels:

Page 15: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3

Fixed number of threads (8)Varying the number of priorities

Fixed number of priorities (8)Varying the number of threads

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HARDWARE RESOURCES

Page 16: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3

We have measured the number of clock cycles required to perform the thread selection algorithm.

• RIOT and FreeRTOS vastly benefit from using ChamelIoT scheduler.• Despite the impact of ChamelIoT on Zephyr being lesser, our past

research proved that Zephyr will benefit from ChamelIoT in other areas.

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DETERMINISM & PERFORMANCE

Page 17: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3

Motivation

ChamelIoT

Preliminary Results

Roadmap & ConclusionNext steps, Final remarks

Page 18: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3 18

NEXT STEPS

HardwareThread Management

Timing Control

Synchronization and IPC

Loosely-coupled Accelerator

SoftwareOperating Systems Integration

Configuration Tool

Page 19: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3 19

TAKE AWAYS

Accelerating OS kernel services with ChamelIoT brings several benefits in terms of performance and determinism1

ChamelIoT can be configured to perfectly fit the system’s needs

Research will focus on providing support to a broader number of kernel features and additional OSes

2

3

Page 20: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3

THANK [email protected] | [email protected] | [email protected]

Miguel Silva (UMinho) | Tiago Gomes (UMinho) | Sandro Pinto (UMinho)

Page 21: Miguel Silva, Tiago Gomes, Sandro Pinto Leveraging RISC-V

ESRGv3

Q&A