Lica Manual

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING DRS & SKA

1. Study of OP AMPs - IC 741, IC 555, IC 565, IC 566,

IC 1496-functioning, parameters and specifications

IC 741

General Description:

The IC 741 is a high performance monolithic operational amplifier constructed

using the planer epitaxial process. High common mode voltage range and absence

of latch-up tendencies make the IC 741 ideal for use as voltage follower. The high

gain and wide range of operating voltage provide superior performance in integrator,

summing amplifier and general feed back applications.

Block Diagram of Op-Amp:

Pin Configuration:

LINEAR IC APPLICATIONS LABORATORY 1


Features:

1. No frequency compensation required.

2. Short circuit protection

3. Offset voltage null capability

4. Large common mode and differential voltage ranges

5. Low power consumption

6. No latch-up

Specifications:

1. Voltage gain A = α typically 2,00,000

2. I/P resistance RL = α Ω, practically 2MΩ

3. O/P resistance R =0, practically 75Ω

4. Bandwidth = α Hz. It can be operated at any frequency

5. Common mode rejection ratio = α

(Ability of op amp to reject noise voltage)

6. Slew rate + α V/μsec

(Rate of change of O/P voltage)

7. When V1 = V2, VD=0

8. Input offset voltage (Rs ≤ 10KΩ) max 6 mv

9. Input offset current = max 200nA

10. Input bias current : 500nA

11. Input capacitance : typical value 1.4pF

12. Offset voltage adjustment range : ± 15mV

13. Input voltage range : ± 13V

14. Supply voltage rejection ratio : 150 μV/V

15. Output voltage swing: + 13V and – 13V for RL > 2KΩ

16. Output short-circuit current: 25mA

17. supply current: 28mA

18. Power consumption: 85mW

19. Transient response: rise time= 0.3 μs

Overshoot= 5%



Applications:

1. AC and DC amplifiers

2. Active filters

3. Oscillators

4. Comparators

5. Regulators

IC 555:

Description:

The operation of SE/NE 555 timer directly depends on its internal function.

The three equal resistors R1, R2, R3 serve as internal voltage divider for the source

voltage. Thus one-third of the source voltage VCC appears across each resistor.

Comparator is basically an Op amp which changes state when one of its

inputs exceeds the reference voltage. The reference voltage for the lower

comparator is +1/3 VCC. If a trigger pulse applied at the negative input of this

comparator drops below +1/3 VCC, it causes a change in state. The upper comparator

is referenced at voltage +2/3 VCC. The output of each comparator is fed to the input

terminals of a flip flop.

The flip-flop used in the SE/NE 555 timer IC is a bistable multivibrator. This

flip flop changes states according to the voltage value of its input. Thus if the voltage

at the threshold terminal rises above +2/3 VCC, it causes upper comparator to cause

flip-flop to change its states. On the other hand, if the trigger voltage falls below +1/3

VCC, it causes lower comparator to change its states. Thus the output of the flip flop

is controlled by the voltages of the two comparators. A change in state occurs when

the threshold voltage rises above +2/3 VCC or when the trigger voltage drops below

+1/3 Vcc.

The output of the flip-flop is used to drive the discharge transistor and the

output stage. A high or positive flip-flop output turns on both the discharge transistor

and the output stage. The discharge transistor becomes conductive and behaves as

a low resistance short circuit to ground. The output stage behaves similarly. When

the flip-flop output assumes the low or zero states reverse action takes place i.e., the

discharge transistor behaves as an open circuit or positive VCC state. Thus the

operational state of the discharge transistor and the output stage depends on the

voltage applied to the threshold and the trigger input terminals.



Block Diagram of IC 555:

Pin Configuration:

Function of Various Pins of 555 IC:

Pin (1) of 555 is the ground terminal; all the voltages are measured with respect to

this pin.

Pin (2) of 555 is the trigger terminal, If the voltage at this terminal is held greater than

one-third of VCC, the output remains low. A negative going pulse from Vcc to less than

Vec/3 triggers the output to go High. The amplitude of the pulse should be able to

make the comparator (inside the IC) change its state. However the width of the

negative going pulse must not be greater than the width of the expected output pulse.



Pin (3) is the output terminal of IC 555. There are 2 possible output states. In the

low output state, the output resistance appearing at pin (3) is very low (approximately

10 Ω). As a result the output current will goes to zero , if the load is connected from

Pin (3) to ground , sink a current I Sink (depending upon load) if the load is connected

from Pin (3) to ground, and sinks zero current if the load is connected between +VCC

and Pin (3).

Pin (4) is the Reset terminal. When unused it is connected to +Vcc. Whenever the

potential of Pin (4) is drives below 0.4V, the output is immediately forced to low state.

The reset terminal enables the timer over-ride command signals at Pin (2) of the IC.

Pin (5) is the Control Voltage terminal.This can be used to alter the reference levels

at which the time comparators change state. A resistor connected from Pin (5) to

ground can do the job. Normally 0.01μF capacitor is connected from Pin (5) to

ground. This capacitor bypasses supply noise and does not allow it affect the

threshold voltages.

Pin (6) is the threshold terminal. In both astable as well as monostable modes, a

capacitor is connected from Pin (6) to ground. Pin (6) monitors the voltage across

the capacitor when it charges from the supply and forces the already high O/p to Low

when the capacitor reaches +2/3 VCC.

Pin (7) is the discharge terminal. It presents an almost open circuit when the output

is high and allows the capacitor charge from the supply through an external resistor

and presents an almost short circuit when the output is low.

Pin (8) is the +Vcc terminal. 555 can operate at any supply voltage from +3 to

+18V.

Features of 555 IC

1. The load can be connected to o/p in two ways i.e. between pin 3 & ground 1 or

between pin 3 & VCC (supply)

2. 555 can be reset by applying negative pulse, otherwise reset can be connected

to +Vcc to avoid false triggering.

3. An external voltage effects threshold and trigger voltages.

4. Timing from micro seconds through hours.

5. Monostable and bistable operation

6. Adjustable duty cycle

7. Output compatible with CMOS, DTL, TTL

8. High current output sink or source 200mA



9. High temperature stability

10. Trigger and reset inputs are logic compatible.

Specifications:

1. Operating temperature : SE 555-- -55oC to 125oC

NE 555-- 0o to 70oC

2. Supply voltage : +5V to +18V

3. Timing : μSec to Hours

4. Sink current : 200mA

5. Temperature stability : 50 PPM/oC change in temp or 0-005% /oC.

Applications:

1. Monostable and Astable Multivibrators

2. dc-ac converters

3. Digital logic probes

4. Waveform generators

5. Analog frequency meters

6. Tachometers

7. Temperature measurement and control

8. Infrared transmitters

9. Regulator & Taxi gas alarms etc.

IC 565:

Description:

The Signetics SE/NE 560 series is monolithic phase locked loops. The SE/NE 560,

561, 562, 564, 565, & 567 differ mainly in operating frequency range, power supply

requirements and frequency and bandwidth adjustment ranges. The device is

available as 14 Pin DIP package and as 10-pin metal can package. Phase

comparator or phase detector compare the frequency of input signal fs with frequency

of VCO output fo and it generates a signal which is function of difference between the

phase of input signal and phase of feedback signal which is basically a d.c voltage

mixed with high frequency noise. LPF remove high frequency noise voltage. Output

is error voltage. If control voltage of VCO is 0, then frequency is center frequency (fo)

and mode is free running mode. Application of control voltage shifts the output

frequency of VCO from fo to f. On application of error voltage, difference between fs



& f tends to decrease and VCO is said to be locked. While in locked condition, the

PLL tracks the changes of frequency of input signal.

Block Diagram of IC 565

Pin Configuration:

Specifications:

1. Operating frequency range : 0.001 Hz to 500 KHz

2. Operating voltage range : ±6 to ±12V

3. Inputs level required for tracking : 10mV rms minimum to 3v (p-p)

max.



4. Input impedance : 10 KΩ typically

5. Output sink current : 1mA typically

6. Drift in VCO center frequency : 300 PPM/oC typically

(fout) with temperature

7. Drif in VCO centre frequency with : 1.5%/V maximum

supply voltage

8. Triangle wave amplitude : typically 2.4 VPP at ± 6V

9. Square wave amplitude : typically 5.4 VPP at ± 6V

10. Output source current : 10mA typically

11. Bandwidth adjustment range : <±1 to >± 60%

Center frequency fout = 1.2/4R1C1 Hz

= free running frequency

FL = ± 8 fout/V Hz

V = (+V) – (-V)

fc = ±

Applications:

1. Frequency multiplier

2. Frequency shift keying (FSK) demodulator

3. FM detector

IC 566:

Description:

The NE/SE 566 Function Generator is a voltage controlled oscillator of

exceptional linearity with buffered square wave and triangle wave outputs. The

frequency of oscillation is determined by an external resistor and capacitor and the

voltage applied to the control terminal. The oscillator can be programmed over a ten

to one frequency range by proper selection of an external resistance and modulated

over a ten to one range by the control voltage with exceptional linearity.



Block Diagram of IC566

Pin diagram:

Specifications:

Maximum operating Voltage --- 26V

Input voltage --- 3V (P-P)

Storage Temperature --- -65oC to + 150oC

Operating temperature --- 0oC to +70oC for NE 566

-55oC to +125oC for SE 566

Power dissipation --- 300mv



Applications:

1. Tone generators.

2. Frequency shift keying

3. FM Modulators

4. clock generators

5. signal generators

6. Function generator

IC 1496

Description:

IC balanced mixers are widely used in receiver IC’s. The IC versions are

usually described as balanced modulators. Typical example of balanced IC

modulator is MC1496. The circuit consists of a standard differential amplifier (formed

by Q5 _ Q6 combination) driving a quad differential amplifier composed of transistor

Q1 – Q4. The modulating signal is applied to the standard differential amplifier

(between terminals 1 and 4). The standard differential amplifier acts as a voltage to

current converter. It produces a current proportional to the modulating signal. Q7 and

Q8 are constant current sources for the differential amplifier Q5 – Q6. The lower

differential amplifier has its emitters connected to the package pins ( 2 & 3) so that an

external emitter resistance may be used. Also external load resistors are employed

at the device output (6 and 12 pins).The output collectors are cross-coupled so that

full wave balanced multiplication takes place. As a result, the output voltage is a

constant times the product of the two input signals.



Schematic of IC1496:

Pin Configuration:

Applications of MC 1496:

a) Balanced modulator

b) AM Modulator

c) Product Modulator

d) AM Detector

e) Mixer

f) Frequency Doublers.



2. OP AMP Applications – Adder, Subtractor,

Comparator Circuits

Aim: To design adder, subtractor and comparator for the given signals by using

operational amplifier.

Apparatus required:

S.No Equipment/Component name Specifications/Value Quantity

1 IC 741 Refer page no 2 1

2 Resistor 1kΩ 4

3 Diode 0A79 2

4 Regulated Power supply (0 – 30V),1A 2

5 Function Generator (.1 – 1MHz), 20V p-p 1

6 Cathode Ray Oscilloscope (0 – 20MHz) 1

7 Multimeter 3 ½ digit display 1

Theory:

Adder: A two input summing amplifier may be constructed using the inverting

mode. The adder can be obtained by using either non-inverting mode or differential

amplifier. Here the inverting mode is used. So the inputs are applied through

resistors to the inverting terminal and non-inverting terminal is grounded. This is

called “virtual ground”, i.e. the voltage at that terminal is zero. The gain of this

summing amplifier is 1, any scale factor can be used for the inputs by selecting

proper external resistors.

Subtractor: A basic differential amplifier can be used as a subtractor as shown in

the circuit diagram. In this circuit, input signals can be scaled to the desired values

by selecting appropriate values for the resistors. When this is done, the circuit is

referred to as scaling amplifier. However in this circuit all external resistors are equal

in value. So the gain of amplifier is equal to one. The output voltage Vo is equal to

the voltage applied to the non-inverting terminal minus the voltage applied to the

inverting terminal; hence the circuit is called a subtractor.



Comparator: The circuit diagram shows an op-amp used as a comparator. A

fixed reference voltage Vref is applied to the (-) input, and the other time – varying

signal voltage Vin is applied to the (+) input; Because of this arrangement, the circuit

is called the non-inverting comparator. Depending upon the levels of Vin and Vref, the

circuit produces output. In short, the comparator is a type of analog-to-digital

converter. At any given time the output waveform shows whether Vin is greater or

less than Vref. The comparator is sometimes also called a voltage-level detector

because, for a desired value of Vref, the voltage level of the input Vin can be detected

Circuit Diagrams:

Fig 1: Adder

Fig 2: Subtractor



Fig 3: Comparator

.

Procedures:

A) Adder:

1. Connect the circuit as per the diagram shown in Fig 1.

2. Apply the supply voltages of +15V to pin7 and pin4 of IC741 respectively.

3. Apply the inputs V1 and V2 as shown in Fig 1.

4. Apply two different signals (DC/AC ) to the inputs

5. Vary the input voltages and note down the corresponding output at pin 6 of the IC

741 adder circuit.

6. Notice that the output is equal to the sum of the two inputs.

B) Subtractor:

1. Connect the circuit as per the diagram shown in Fig 2.

2. Apply the supply voltages of +15V to pin7 and pin4 of IC741 respectively.

3 Apply the inputs V1 and V2 as shown in Fig 2.

4. Apply two different signals (DC/AC ) to the inputs

5. Vary the input voltages and note down the corresponding output at pin 6 of the IC

741 subtractor circuit.

6. Notice that the output is equal to the difference of the two inputs.



C) Comparator:

1. A fixed reference voltage Vref is applied to the (-) input, and to the other input a

varying voltage Vin is applied as shown in Fig 3.

2. Vary the input voltage above and below the Vref and note down the output at pin 6

of 741 IC.

3. Observe that,

when Vin is less than Vref, the output voltage is -Vsat ( - VEE)

when Vin is greater than Vref, the output voltage is +Vsat (+VCC)

Observations:

Adder:

V1(V) V2(V) Vo(V)

2.5

3.8

2.5

4.0

-5.06

-8.04

Subtractor:

V1(V) V2(V) Vo(V)

2.5

4.1

3.3

5.7

0.8

1.67

Comparator:

Vin(V) Vref(V) Vo(V)

2

5

0.5

7.2

+14

-14



Model Calculations:

a) Adder

Vo = - (V1 + V2)

If V1 = 2.5V and V2 = 2.5V, then

Vo = - (2.5+2.5) = -5V.

b) Subtractor

Vo = V2 – V1

If V1=2.5 and V2 = 3.3, then

Vo = 3.3 – 2.5 = 0.8V

c) Comparator

If Vin < Vref, Vo = -Vsat - VEE

Vin > Vref, Vo = +Vsat = +VCC

Precautions:

Check the connections before giving the power supply.

Readings should be taken carefully.

Result:

For adder, subtractor and comparator circuits, the practical values are

compared with the theoretical values and they are nearly equal.

Inference:

Different applications of opamp are observed.

Questions & Answers:

1. What is the saturation voltage of 741 in terms of VCC?

Ans: 90% of VCC

2. What is the maximum voltage that can be given at the inputs?

Ans: The inputs must be given in such a way that the output should be less

than Vsat.



3. Integrator and Differentiator Circuits using IC 741

Aim: To design and verify the operation of an integrator and differentiator for a

given input.

Apparatus required:

S.No Equipment/Component

name

Specifications/Value Quantity

1 741 IC Refer page no 2 1

2 Capacitors 0.1μf, 0.01μf Each one

3 Resistors 159Ω, 1.5kΩ Each one

4 Regulated Power supply (0 – 30)V,1A 1

5 Function generator (1Hz – 1MHz) 1


Theory

Integrator: In an integrator circuit, the output voltage is integral of the input signal.

The output voltage of an integrator is given by Vo = -1/R1Cf

At low frequencies the gain becomes infinite, so the capacitor is fully charged and

behaves like an open circuit. The gain of an integrator at low frequency can be

limited by connecting a resistor in shunt with capacitor.

Differentiator: In the differentiator circuit the output voltage is the differentiation

of the input voltage. The output voltage of a differentiator is given by

Vo = -RfC1 .The input impedance of this circuit decreases with increase in

frequency, thereby making the circuit sensitive to high frequency noise. At high

frequencies circuit may become unstable.



Circuit Diagrams:

Fig 1: Integrator

Fig 2: Differentiator



Design equations:

Integrator:

Choose T = 2πRfCf

Where T= Time period of the input signal

Assume Cf and find Rf

Select Rf = 10R1

Vo (p-p) =

Differentiator

Select given frequency fa = 1/(2πRfC1), Assume C1 and find Rf

Select fb = 10 fa = 1/2πR1C1 and find R1

From R1C1 = RfCf, find Cf

Procedures:

Integrator

1. Connect the circuit as per the diagram shown in Fig 1

2. Apply a square wave/sine input of 4V(p-p) at 1KHz

3. Observe the output at pin 6.

4. Draw input and output waveforms as shown in Fig 3.

Differentiator

1. Connect the circuit as per the diagram shown in Fig 2

2. Apply a square wave/sine input of 4V(p-p) at 1KHz

3. Observe the output at pin 6

4. Draw the input and output waveforms as shown in Fig 4



Wave Forms:

Integrator

Fig 3: Input and output waves forms of integrator



Differentiator

Fig 4 :Input and output waveforms of Differentiator



Sample readings:

Integrator

Input –Square wave Output - Triangular

Amplitude(VP-P)

(V)

Time period

(ms)

Amplitude (VP-P)

(V)

Time period

(ms)

8 1 10 1

Input –sine wave Output - cosine

Amplitude(VP-P)

(V)

Time period

(ms)

Amplitude (VP-P)

(V)

Time period

(ms)

8 1 6 1

Differentiator

Input –square wave Output - Spikes

Amplitude (VP-P)

(V)

Time period

(ms)

Amplitude (VP-P)

(V)

Time period

(ms)

8 1 28 1

Input –sine wave Output - cosine

Amplitude (VP-P)

(V)

Time period

(ms)

Amplitude (VP-P)

(V)

Time period

(ms)

8 1 1.8 1

Model Calculations:

Integrator:

For T= 1 msec

fa= 1/T = 1 KHz

fa = 1 KHz = 1/(2πRfCf)

Assuming Cf= 0.1μf, Rf is found from Rf=1/(2πfaCf)

Rf=1.59 KΩ

Rf = 10 R1

R1= 159Ω



Differentiator

For T = 1 msec

f= 1/T = 1 KHz

fa = 1 KHz = 1/(2πRfC1)

Assuming C1= 0.1μf, Rf is found from Rf=1/(2πfaC1)

Rf=1.59 KΩ

fb = 10 fa = 1/2πR1C1

for C1= 0.1μf;

R1 =159Ω

Precautions: Check the connections before giving the power supply.


Result: For a given square wave and sine wave, output waveforms for integrator

and differentiator are observed.

Inferences: Spikes and triangular waveforms can be obtained from a given

square waveform by using differentiator and integrator respectively.


1. What are the problems of ideal differentiator?

Ans: At high frequencies the differentiator becomes unstable and breaks into

oscillation. The differentiator is sensitive to high frequency noise.

2. What are the problems of ideal integrator?

Ans: The gain of the integrator is infinite at low frequencies.

3. What are the applications of differentiator and integrator?

Ans: The differentiator used in waveshaping circuits to detect high frequency

components in an input signal and also as a rate-of –change detector in FM

demodulators.

The integrator is used in analog computers and analog to digital converters

and signal-wave shaping circuits.

4. What is the need for Rf in the circuit of integrator?

Ans: The gain of an integrator at low frequencies can be limited to avoid the

saturation problem if the feedback capacitor is shunted by a resistance Rf

5. What is the effect of C1 on the output of a differentiator?

Ans: It is used to eliminate the high frequency noise problem.



4. Active Filter Applications – LPF, HPF (first order)

Aim: To design and obtain the frequency response of

i) First order Low Pass Filter (LPF)

ii) First order High Pass Filter (HPF)

Apparatus required:



2 Resistors

Variable Resistor

10k ohm

20kΩ pot

3

1

3 capacitors 0.01μf 1



6 Function Generator (1Hz – 1MHz) 1

Theory:

a) LPF:

A LPF allows frequencies from 0 to higher cut of frequency, fH. At fH the gain

is 0.707 Amax, and after fH gain decreases at a constant rate with an increase in

frequency. The gain decreases 20dB each time the frequency is increased by 10.

Hence the rate at which the gain rolls off after fH is 20dB/decade or 6 dB/ octave,

where octave signifies a two fold increase in frequency. The frequency f=fH is called

the cut off frequency because the gain of the filter at this frequency is down by 3 dB

from 0 Hz. Other equivalent terms for cut-off frequency are -3dB frequency, break

frequency, or corner frequency.

b) HPF:

The frequency at which the magnitude of the gain is 0.707 times the maximum

value of gain is called low cut off frequency. Obviously, all frequencies higher than fL

are pass band frequencies with the highest frequency determined by the closed –

loop band width all of the op-amp.



Circuit diagrams:

Fig 1: Low pass filter

Fig 2: High pass filter

Design:

First Order LPF: To design a Low Pass Filter for higher cut off frequency fH = 4 KHz

and pass band gain of 2

fH = 1/( 2πRC )

Assuming C=0.01 µF, the value of R is found from

R= 1/(2πfHC) Ω =3.97KΩ

The pass band gain of LPF is given by AF = 1+ (RF/R1)= 2

Assuming R1=10 KΩ, the value of RF is found from

RF=( AF-1) R1=10KΩ



First Order HPF: To design a High Pass Filter for lower cut off frequency

fL = 4 KHz and pass band gain of 2

fL = 1/( 2πRC )

Assuming C=0.01 µF,the value of R is found from

R= 1/(2πfLC) Ω =3.97KΩ

The pass band gain of HPF is given by AF = 1+ (RF/R1)= 2

Assuming R1=10 KΩ, the value of RF is found from

RF=( AF-1) R1=10KΩ

Procedure:

First Order LPF

1. Connections are made as per the circuit diagram shown in Fig 1.

2. Apply sinusoidal wave of constant amplitude as the input such that op-amp does

not go into saturation.

3. Vary the input frequency and note down the output amplitude at each step as

shown in Table (a).

4. Plot the frequency response as shown in Fig 3 .

First Order HPF

1. Connections are made as per the circuit diagrams shown in Fig 2.

2. Apply sinusoidal wave of constant amplitude as the input such that op-amp does

not go into saturation.

3. Vary the input frequency and note down the output amplitude at each step as

shown in Table (b).

4. Plot the frequency response as shown in Fig 4.



Tabular Form and Sampled Values:

a)LPF b) HPF

Input voltage Vin = 0.5V

Model graphs :

LINEAR IC APPLICATIONS LABORATORY

Frequenc

y

O/P

Voltage(V)

Voltage

Gain

Vo/Vi

Gain

indB

100Hz 0.9 1.8 5.105

200Hz 0.9 1.8 5.105

300Hz 0.9 1.8 5.105

500Hz 0.9 1.8 5.105

750Hz 0.9 1.8 5.105

900Hz 0.9 1.8 5.105

1KHz 0.9 1.8 5.105

2KHz 0.8 1.6 4.08

3KHz 0.75 1.5 3.52

4KHz 0.7 1.4 2.92

5KHz 0.65 1.3 2.27

6KHz 0.55 1.1 0.82

7KHz 0.5 1.0 0

8KHz 0.45 0.9 -0.91

9KHz 0.4 0.8 -1.94

10KHz 0.35 0.7 -3.09

Frequency O/P

Voltage(V)

Voltage

Gain

Vo/Vi

Gain

indB

500Hz 0.12 0.24 -12.39

700Hz 0.16 0.32 -9.89

800Hz 0.2 0.4 -7.95

1KHz 0.24 0.48 -6.38

2KHz 0.4 0.8 -1.938

3KHz 0.55 1.1 0.83

4KHz 0.7 1.4 2.92

5KHz 0.75 1.5 3.52

6KHz 0.8 1.6 4.08

7KHz 0.85 1.7 4.60

8KHz 0.85 1.7 4.60

9KHz 0.85 1.7 4.60

10KHz 0.85 1.7 4.60

27


Fig (3) Fig(4)

Frequency response characteristics Frequency response characteristics

of LPF of HPF

Precautions:



Result: First order low-pass filter and high-pass filter are designed and frequency

response characteristics are obtained.

Inferences: By interchanging R and C in a low-pass filter, a high-pass filter can

be obtained.


1. What is meant by frequency scaling?

Ans: Change of cut off frequency from one value to the other.

2. How do you convert an original frequency (cut off) fH to a new cut off frequency

fH?

Ans: By varying either resistor R or capacitor C values

3. What is the effect of order of the filter on frequency response characteristics?

Ans: Each increase in order will produce -20 dB/decade additional increases in

roll off rate.

4. What modifications in circuit diagrams require to change the order of the filter?

Ans: Order of the filter is changed by RC network.



5. Active Filter Applications – BPF & Band Reject

(Wideband ) and Notch Filters

Aim: To design and obtain the frequency response of

i) Wide Band pass filter

ii) Wide Band reject filter

iii) Notch filter

Apparatus required:



2 Resistors

Resistors

5.6kΩ

39kΩ

9

2

3 Resistors (20kΩ pot) 2

4 Capacitors

Capacitors

Capacitors

0.01μf

0.1μf

0.2μf

2

2

15 Regulated Power supply (0 – 30)V,1A 1

6 Function Generator (1Hz – 1MHZ) 1


Theory:

Band pass filter : A band pass filter has a pass band between two cutoff

frequencies fH and fL such that fH > fL. Any input frequency outside this pass band is

attenuated. There are two types of band-pass filters. Wide band pass and Narrow

band pass filters. We can define a filter as wide band pass if its quality factor Q <10.

If Q>10, then we call the filter a narrow band pass filter. A wide band pass filter can

be formed by simply cascading high-pass and low-pass sections. The order of band

pass filter depends on the order of high pass and low pass sections.



Band Rejection Filter : The band-reject filter is also called a band-stop or

band-elimination filter. In this filter, frequencies are attenuated in the stop band while

they are passed outside this band. Band reject filters are classified as wide band-

reject narrow band-reject. Wide band-reject filter is formed using a low pass filter, a

high-pass filter and summing amplifier. To realize a band-reject response, the low

cut off frequency fL of high pass filter must be larger than high cut off frequency fH of

low pass filter. The pass band gain of both the high pass and low pass sections must

be equal.

Notch Filter :

The narrow band reject filter, often called the notch fitter is commonly used for the

rejection of a single frequency. The most commonly used notch filter is the twin-T

network .This is a passive filter composed of two T-shaped networks. One T network

is made up of two resistors and a capacitor, while the other uses two capacitors and

a resistor. There are several ways to make the notch filter. One way is to subtract

the band pass filter output from its input .The notch-out frequency is the frequency at

which maximum attenuation occurs and is given by

fN = 1/( 2πRC )

Circuit diagrams:

Fig 1: Wideband pass filter



Fig 2: Wideband reject filter

Fig 3: Notch filter

Design:

Band pass filter : To design a band pass filter having fH = 4KHz and fL

= 400Hz and pass band gain of 2.

As shown in Fig 1,the first section consisting of Op Amp,RF,R1,R and C is the high

pass filter and second consisting of low pass filter. The design of low pass and high

pass filters.

Low Pass Filter Design:



Assuming C’=0.01μf, the value of R’ is found from

R’ = 1/(2πfH C’) Ω =3.97KΩ

The pass band gain of LPF is given by ALPF = 1+ (R’ F / R’1 )=2

Assuming R’1=5.6 KΩ, the value of R’F is found from R’F =( AF-1) R’1=5.6KΩ

High Pass Filter Design:

Assuming C=0.01μf, the value of R is found from

R = 1/(2πfLC) Ω =39.7KΩ

The pass band gain of HPF is given by AHPF = 1+ (RF / R1 )=2

Assuming R1=5.6 KΩ, the value of RF is found from

RF = ( AF-1) R1=5.6KΩ

Band reject filter: To design a band reject filter with fH = 4 KHz, fL = 400Hz

and pass band gain of 2

Low Pass Filter Design:

Assuming C’=0.01μf, the value of R’ is found from

R’ = 1/(2πfH C’) Ω =3.97KΩ

The pass band gain of LPF is given by ALPF = 1+ (R’ F / R’1 )=2

Assuming R’1=5.6 KΩ, the value of R’F is found from

R’F =( AF-1) R’1=5.6KΩ

High Pass Filter Design:

Assuming C=0.01μf, the value of R is found from

R = 1/ (2πfLC) Ω =39.7KΩ

The pass band gain of HPF is given by AHPF = 1+ (RF / R1) =2

Assuming R1=5.6 KΩ, the value of RF is found from

RF = (AF-1) R1=5.6KΩ

Adder circuit design: Select all resistors equal value such that gain is unity.

Assume R2=R3=R4=5.6 KΩ

Notch Filter Design: fN = 400Hz

Assuming C=0.1μf,the value of R is found from

R = 1/ (2πfNC)=39 KΩ

Procedure:



Wide Band Pass Filter:

1. Connect the circuit as per the circuit diagram shown in Fig1

2. Apply sinusoidal wave of 0.5V amplitude as input such that opamp does not go

into saturation (depending on gain).

3. Vary the input frequency from 100 Hz to 100 KHz and note down the output

amplitude at each step as shown in Table (a).


Wide Band Reject Filter:

1. Connect the circuit as per the circuit diagram shown in Fig 2

2. Apply sinusoidal wave of 0.5V amplitude as input such that opamp

does not go into saturation (depending on gain).


amplitude at each step as shown in Table( b).


Notch Filter:


2. Apply sinusoidal wave of 2Vp-p amplitude as input such that opamp

does not go into saturation (depending on gain).


amplitude at each step as shown in Table( c).


Observations:



a) Band pass filter: b) Band Reject Filter

Input voltage (Vi) = 0.5V

c) Notch filter


Frequeny O/P

Voltage

Vo(V)

Gain

Vo/Vi

Gain

indB

100Hz 0.5 1 0

200Hz 0.9 1.8 5.105

300Hz 1.15 2.3 7.23

400Hz 1.4 2.8 8.94

500Hz 1.5 3 9.54

750Hz 1.6 3.2 10.10

900Hz 1.7 3.4 10.63

1KHz 1.7 3.4 10.63

1.5KHz 1.7 3.4 10.63

2KHz 1.6 3.2 10.10

2.5KHz 1.55 3.1 9.83

3KHz 1.5 3.0 9.54

4KHz 1.4 2.8 8.94

5KHz 1.2 2.4 7.6

6KHz 1.1 2.2 6.84

7KHz 1.0 2.0 6.02

8KHz 0.9 1.8 5.11

9KHz 0.34 1.7 4.60

10KHz 0.28 1.4 2.92

Frequency O/P

Voltage(V)

Gain

Vo/Vi

Gain indB

50Hz 1 2 6.02

70Hz 1 2 6.02

100Hz 1 2 6.02

200Hz 0.9 1.8 5.10

300Hz 0.8 1.6 4.08

400Hz 0.7 1.4 2.92

500Hz 0.6 1.2 1.58

700Hz 0.5 1 0

900Hz 0.28 0.56 -5.03

1KHz 0.22 0.44 -7.13

2KHz 0.28 0.56 -5.056

3KHz 0.44 0.88 -1.11

4KHz 0.56 1.12 0.98

5KHz 0.70 1.4 2.92

6KHz 0.80 1.6 4.08

7KHz 0.85 1.7 4.61

8KHz 0.90 1.8 5.10

9KHz 0.90 1.8 5.10

10KHz 0.90 1.8 5.10

34


Input voltage=2Vp-p

Model graphs:

Fig 4 : Frequency response of Fig 5 : Frequency response

wide bandpass filter of wide band reject filter


Frequency O/P

Voltage(V)

Vo/Vi Gain in

dB

100Hz 0.8 0.4 -7.95

200Hz 0.7 0.35 -9.11

300Hz 0.3 0.15 -16.47

400Hz 0.08 0.04 -27.95

500Hz 0.28 0.014 -17.05

600Hz 0.48 0.024 -12.39

700Hz 0.7 0.35 -9.11

800Hz 0.8 0.4 -7.95

900Hz 0.8 0.4 -7.95

1 KHz 0.8 0.4 -7.95

2 KHz 0.8 0.4 -7.95

3 KHz 0.8 0.4 -7.95

4 KHz 0.8 0.4 -7.95

35


Fig 6: Frequency response of notch filter

Precautions:



Result:

i) The frequency response of wide band pass filter is plotted as shown in Fig 4.

ii) The frequency response of wide band reject filter is plotted as shown in Fig 5.

iii) The frequency response of notch filter is plotted as shown in Fig 6

Inferences: Cascade connection of HPF and LPF produces wideband pass filter

and parallel connection of the above filters gives wideband reject filter. The notch

filter is used to reject the single frequency.


1. What is the relation between fC & fH, fL?

Ans:

2. How do you increase the gain of the wideband pass filter?

Ans: By increasing the gain of either LPF or HPF

3. What is the application of Notch filter?

Ans: The rejection of single frequency such as the 50-Hz power line frequency

hum



4. What is the order of the filter (each type) ?.What modifications you suggest for the

Ans: circuit diagram to increase the order of the filter?

Order of the BPF & BRF’S are the order of the HPF & LPF..Order of the

BPF& BRF’s are increased by increasing order of HPF&LPF.

5. What is the gain roll off outside the pass band?

Ans: Gain roll off outside the pass band is (20n) db/dec where ’n’ indicates the

order of the filter.

6. What is the difference between active and passive filters?

Ans: Active filters use Op Amp as active element, and resistors and capacitors as

the passive elements.

7. What are the advantages of active filters over passive filters?

Ans: Gain and frequency adjustment.

No loading problem.

Low cost



6. IC 741 Oscillator Circuits

Phase Shift and Wien Bridge Oscillators

Aim: To design (i) phase shift and (ii) Wien Bridge oscillators for the given

frequency of oscillation and verify it practically.

Apparatus required:


name



2 Resistors

Variable Resistor

1.3 KΩ,3.18 KΩ

13KΩ, ,31.8 KΩ

500 KΩ pot

Each Three

Each one

13 Capacitors 0.1 µF

0.01 µF

3

2


5 Cathode Ray Oscilloscope (0 -20MHz) 1

Theory:

The μA741 is a high performance monolithic operational amplifier constructed

using the planar epitaxial process. High common mode voltage range and absence

of latch-up tendencies make the μA741 ideal for use as voltage follower. The high

gain and wide range of operating voltage provides superior performance in integrator,

summing amplifier and general feedback applications.

In the phase shift oscillator, out of 360o phase shift, 180o phase shift is

provided by the op-amp and another 180o is by 3 RC networks. In the Weinbridge

oscillator, the balancing condition of the bridge provides the total 360o phase shift.



Circuit Diagrams:

Fig 1 : RC Phase shift oscillator

Fig 2: Wien Bridge oscillator



Design:

1. Phase shift oscillator

To design a phase shift oscillator with fo =500 Hz

fo = 1/(2πRC )

and gain= RF/R1= 29

Assuming C = 0.1 µF,the value of R is found from

R = 1/ (2π foC ) = 1.3 KΩ

Take R1 = 10R =13 KΩ

RF = 29R1 (use 500K pot)

2. Wien bridge Oscillator

To design a Wien bridge oscillator with fo =5 KHz

fo = 1/2πRC and RF = 2R1

Assuming C = 0.01 µF,the value of R is found from

R= 1/2πfc= 3.18 KΩ

Take R1 = 10 R=31.8 KΩ

RF = 2R1 (use 100K pot)

Procedure:

1. Phase shift oscillator


2. Observe the output waveform on the CRO.

3. Vary the potentiometer to get the undistorted waveform as shown Fig a.

4. Measure the time period and amplitude of the output waveform.

5. Plot the waveforms on a graph sheet.

2. Wien bridge Oscillator


2. Observe the output waveform on the CRO.

3. Vary the potentiometer to get the undistorted waveform as shown in Fig b

4. Measure the time period and amplitude of the output waveform.

5. Plot the waveforms on a graph sheet



Waveforms:

Fig (a): RC Phase Shift Oscillator

Fig (b): Wien Bridge Oscillator

Tabular form:

1. Phase shift oscillator:

S.No Amplitude(VP-P) Time period

(ms)

Practical frequency

(Hz)

Theoretical

frequency (Hz)

1 20V 2.2 454 500

2. Wien bridge Oscillator:

S.No Amplitude(VP-P) Time period

(ms)

Practical frequency

(Hz)

Theoretical frequency

(Hz)

1 20V 0.22ms 4.545KHz 5KHz



Precautions:



Result:

RC phase shift and Wien bridge oscillators are designed and output

waveforms are observed as shown in Fig (a) and (b).

Inferences:

Sinusoidal waveforms can be deigned by using RC phase shift and Wien-

Bridge oscillators.


1 What is an oscillator?

Ans: Oscillator is a circuit that generates a repetitive waveform of fixed

amplitude and frequency without any external input signal.

2 How do you change the frequency of oscillation in RC phase shift and

Ans: Wien bridge oscillators?

By varying either resistor R or capacitor C values

3 What are the applications of oscillators?

Ans: Oscillators are used in radio, television, computers, and communications

4 What is the advantage of using opamp in the oscillator circuit?

Ans: Opamp is used to generate a variety of output wave forms.

5 How do you achieve fine variations in fo ?

Ans: Fine variations in fo can be achieved by changing C value.

6 How do you achieve coarse variations in fo ?

Ans: Coarse variations in fo can be achieved by changing R value



7. Function Generator using OPAMPs

Aim: To generate square wave and triangular wave form by using OPAMPs.

Apparatus required:



2 Capacitors 0.01μf,0.001μf Each one

3 Resistors

Resistors

86kΩ ,68kΩ ,680kΩ

100kΩ

Each one

2


5 Cathode Ray Oscilloscope (0 -20MHz) 1

Theory: Function generator generates waveforms such as sine, triangular, square

waves and so on of different frequencies and amplitudes. The circuit shown in Fig1

is a simple circuit which generates square waves and triangular waves

simultaneously. Here the first section is a square wave generator and second

section is an integrator. When square wave is given as input to integrator it produces

triangular wave.

Circuit Diagram:

Fig1: Function generator



Design:

Square wave Generator:

T= 2RfC ln (2R2 +R1/ R1)

Assume R1 = 1.16 R2

Then T= 2RfC

Assume C and find Rf

Assume R1 and find R2

Integrator:

Take R3 Cf >> T

R3 Cf = 10T

Assume Cf find R3

Take R3Cf = 10T

Assume Cf = 0.01μf

R3 = 10T/C

= 20KΩ

Procedure:

1. Connect the circuit as per the circuit diagram shown above.

2. Obtain square wave at A and Triangular wave at Vo2 as shown in Fig 1.

3. Draw the output waveforms as shown in Fig 2(a) and (b).

Model Calculations:

For T= 2 m sec

T = 2 Rf C

Assuming C= 0.1μf

Rf = 2.10-3/ 2.01.10-6

= 10 KΩ

Assuming R1 = 100 K

R2 = 86 KΩ

Sample readings:

Square Wave:

Vp-p = 26 V(p-p)

T = 1.8 msec

Triangular Wave:

Vp-p = 1.3 V

T= 1.8 msec



Wave Forms:

Fig 2 (a): Output at ‘A’

(b): Output at V02

Precautions:



.

Result: Square wave and triangular wave are generated and the output

waveforms are observed.

Inferences: Various waveforms can be generated.


1. How do you change the frequency of square wave?

Ans: By changing resistor and capacitor values

2. What are the applications of function generator?

Ans: Function generators are used for Transducer linearization and sine

shaping.



8. IC 555 Timer-Monostable Operation Circuit

Aim: To generate a pulse using Monostable Multivibrator by using IC555

Apparatus required:


name




3 Resistor 10kΩ 1


5 Function Generator (1HZ – 1MHz) 1

6 Cathode ray oscilloscope (0 – 20MHz) 1

Theory: A Monostable Multivibrator, often called a one-shot Multivibrator, is a

pulse-generating circuit in which the duration of the pulse is determined by the RC

network connected externally to the 555 timer. In a stable or stand by mode the

output of the circuit is approximately Zero or at logic-low level. When an external

trigger pulse is obtained, the output is forced to go high ( VCC). The time for which

the output remains high is determined by the external RC network connected to the

timer. At the end of the timing interval, the output automatically reverts back to its

logic-low stable state. The output stays low until the trigger pulse is again applied.

Then the cycle repeats. The Monostable circuit has only one stable state (output

low), hence the name monostable. Normally the output of the Monostable

Multivibrator is low.



Circuit Diagram:

Fig1: Monostable Circuit using IC555

Design:

Consider VCC = 5V, for given tp

Output pulse width tp = 1.1 RA C

Assume C in the order of microfarads & Find RA

Typical values:

If C=0.1 µF , RA = 10k then tp = 1.1 mSec

Trigger Voltage =4 V

Procedure:

1. Connect the circuit as shown in the circuit diagram.

2. Apply Negative triggering pulses at pin 2 of frequency 1 KHz.

3. Observe the output waveform and measure the pulse duration.

4. Theoretically calculate the pulse duration as Thigh=1.1. RAC

5. Compare it with experimental values.



Waveforms:

Fig 2 (a): Trigger signal

(b): Output Voltage

(c): Capacitor Voltage

Sample Readings:

Precautions:



Result: The input and output waveforms of 555 timer monostable Multivibrator are

observed as shown in Fig 2(a), (b), (c).


Trigger Output wave Capacitor output

0 to 5V range

1)1V,0.09msec

0 to 5V range

4.6V, 0.5msec

0 to 3.33 V range

3V, 0.88 msec

48


Inferences: Output pulse width depends only on external components RA and C

connected to IC555.


1. Is the triggering given is edge type or level type? If it is edge type, trailing or

raising edge?

Ans: Edge type and it is trailing edge

2. What is the effect of amplitude and frequency of trigger on the output?

Ans: Output varies proportionally.

3. How to achieve variation of output pulse width over fine and course ranges?

Ans: One can achieve variation of output pulse width over fine and course ranges

by varying capacitor and resistor values respectively

4. What is the effect of Vcc on output?

Ans: The amplitude of the output signal is directly proportional to Vcc

5. What are the ideal charging and discharging time constants (in terms of R and C)

of capacitor voltage?

Ans: Charging time constant T=1.1RC Sec

Discharging time constant=0 Sec

6. What is the other name of monostable Multivibrator? Why?

Ans: i) Gating circuit .It generates rectangular waveform at a definite time and

thus could be used in gate parts of the system.

ii) One shot circuit. The circuit will remain in the stable state until a trigger pulse is

received. The circuit then changes states for a specified period, but then it returns

to the original state.

7. What are the applications of monostable Multivibrator?

Ans: Missing Pulse Detector, Frequency Divider, PWM, Linear Ramp Generator



9. IC 555 Timer - Astable Operation Circuit

Aim: To generate unsymmetrical square and symmetrical square waveforms using

IC555.

Apparatus required:



2 Resistors 3.6kΩ,7.2kΩ Each one


4 Diode OA79 1



Theory:

When the power supply VCC is connected, the external timing capacitor ‘C”

charges towards VCC with a time constant (RA+RB) C. During this time, pin 3 is high

(≈VCC) as Reset R=0, Set S=1 and this combination makes =0 which has

unclamped the timing capacitor ‘C’.

When the capacitor voltage equals 2/3 VCC, the upper comparator triggers the

control flip flop on that =1. It makes Q1 ON and capacitor ‘C’ starts discharging

towards ground through RB and transistor Q1 with a time constant RBC. Current also

flows into Q1 through RA. Resistors RA and RB must be large enough to limit this

current and prevent damage to the discharge transistor Q1. The minimum value of

RA is approximately equal to VCC/0.2 where 0.2A is the maximum current through the

ON transistor Q1.

During the discharge of the timing capacitor C, as it reaches VCC/3, the lower

comparator is triggered and at this stage S=1, R=0 which turns =0. Now =0

unclamps the external timing capacitor C. The capacitor C is thus periodically

charged and discharged between 2/3 VCC and 1/3 VCC respectively. The length of

time that the output remains HIGH is the time for the capacitor to charge from 1/3 VCC

to 2/3 VCC.

The capacitor voltage for a low pass RC circuit subjected to a step input of VCC

volts is given by VC = VCC [1- exp (-t/RC)]



Total time period T = 0.69 (RA + 2 RB) C

f= 1/T = 1.44/ (RA + 2RB) C

Circuit Diagram:

Fig.1 555 Astable Circuit

Design:

Formulae: f= 1/T = 1.44/ (RA+2RB) C

Duty cycle (D) = tc/T = RA + RB/(RA+2RB)



Procedure:

I) Unsymmetrical Square wave

1. Connect the circuit as per the circuit diagram shown without connecting the

diode OA 79.

2. Observe and note down the waveform at pin 6 and across timing capacitor.

3. Measure the frequency of oscillations and duty cycle and then compare with

the given values.

4. Sketch both the waveforms to the same time scale.

II) Symmetrical square waveform generator:

1. Connect the diode OA79 as shown in Figure to get D=0.5 or 50%.

2. Choose Ra=Rb = 10KΩ and C=0.1μF

3. Observe the output waveform, measure frequency of oscillations and the duty

cycle and then sketch the o/p waveform.

Model calculations:

Given f=1 KHz. Assuming c=0.1μF and D=0.25

1 KHz = 1.44/ (RA+2RB) x 0.1x10-6 and 0.25 =( RA+RB)/ (RA+2RB)

Solving both the above equations, we obtain RA & RB as

RA = 7.2K Ω

RB = 3.6K Ω



Waveforms:

Fig 2(a): Unsymmetrical square wave output

(b): Capacitor voltage of Unsymmetrical square wave output

(c): Symmetrical square wave output

Sample Readings:

Parameter Unsymmetrical Symmetrical

Voltage VPP 5V 5V

Time period T

Tc=0.8ms

td=0.2ms

1 ms

Tc = 0.5ms

td = 0.5ms

1 ms

Duty cycle 80% 50%

Precautions:





Result: Both unsymmetrical and symmetrical square waveforms are obtained and

time period at the output is calculated.

Inferences: Unsymmetrical square wave of required duty cycle and symmetrical

square waveform can be generated.


1. What is the effect of C on the output?

Ans: Time period of the output depends on C

2. How do you vary the duty cycle?

Ans: By varying R A or RB.

3. What are the applications of 555 in astable mode?

Ans: FSK Generator, Pulse Position Modulator, Square wave generator

4. What is the function of diode in the circuit?

Ans: To get symmetrical square wave.

5. On what parameters Tc and Td designed?

Ans: R A , RB and C

6. What are charging and discharging times

Ans: The time during which the capacitor charges from (1/3) Vcc to (2/3) Vcc

is equal to the time the output is high is known as charging time and is

given by Tc=0.69(RA+RB)C

The time during which the capacitor discharges from (2/3) Vcc to (1/3) Vcc is

equal to the time the output is low is known as discharging time and is given

by Td=0.69(RB) C.

10. Schmitt Trigger Circuits- using IC 741 & IC 555



Aim: To design the Schmitt trigger circuit using IC 741 and IC 555

Apparatus required:


name



2 555IC Refer page no 6 1


4 Multimeter 1

5 Resistors 100 Ω

56 KΩ

2

1

6 Capacitors 0.1 μf, 0.01 μf Each one

7 Regulated power supply (0 -30V),1A 1

Theory:

The circuit shows an inverting comparator with positive feed back. This circuit

converts orbitrary wave forms to a square wave or pulse. The circuit is known as the

Schmitt trigger (or) squaring circuit. The input voltage V in changes the state of the

output Vo every time it exceeds certain voltage levels called the upper threshold

voltage Vut and lower threshold voltage Vlt.

When Vo= - Vsat, the voltage across R1 is referred to as lower threshold

voltage, Vlt. When Vo=+Vsat, the voltage across R1 is referred to as upper threshold

voltage Vut.

The comparator with positive feed back is said to exhibit hysterisis, a dead

band condition.

Circuit Diagrams:



Fig 1: Schmitt trigger circuit using IC 741

Fig 2: Schmitt trigger circuit using IC 555

Design:

Vutp = [R1/(R1+R2 )](+Vsat)

Vltp = [R1/(R1+R2 )](-Vsat)

Vhy = Vutp – Vltp

=[R1/(R1+R2)] [+Vsat – (-Vsat)]

Procedure:

1. Connect the circuit as shown in Fig 1 and Fig2.



2. Apply an orbitrary waveform (sine/triangular) of peak voltage greater than UTP to

the input of a Schmitt trigger.

3. Observe the output at pin6 of the IC 741 and at pin3 of IC 555 Schmitt trigger

circuit by varying the input and note down the readings as shown in Table 1 and

Table 2

4. Find the upper and lower threshold voltages (Vutp, VLtp) from the output wave form.

Wave forms:

Fig 3: (a) Schmitt trigger input wave form

(b) Schmitt trigger output wave form

Sample readings:

Table 1:

Parameter Input Output

741 555 741 555

Voltage( Vp-p) 3.6 4 24.8 4.4

Time period(ms) 0.72 1 0.72 1

Table 2:

Parameter 741 555

Vutp 0.2V 0.4V



Vltp -0.05 -0.4V

Precautions:



Results:

UTP and LTP of the Schmitt trigger are obtained by using IC 741 and IC 555 as

shown in Table 2.

Inferences: Schmitt trigger produces square waveform from a given signal.


1. What is the other name for Schmitt trigger circuit?

Ans: Regenerative comparator

2. In Schmitt trigger which type of feed back is used?

Ans: Positive feedback.

3. What is meant by hysteresis?

Ans: The comparator with positive feedback is said to be exhibit hysteresis, a

deadband condition. When the input of the comparator is exceeds Vutp, its

output switches from + Vsat to - Vsat and reverts back to its original state,+

Vsat ,when the input goes below Vltp

4. What are effects of input signal amplitude and frequency on output?

Ans: The input voltage triggers the output every time it exceeds certain voltage

levels (UTP and LTP). Output signal frequency is same as input signal frequency.

11. IC 565- PLL Applications



Aim: To design a frequency multiplier using IC 565

Apparatus required:


name




3 Resistors 12KΩ,54.5 KΩ Each one

4 Capacitors 0.01μF

0.1 μF

10μF

2

1

15 Regulated power supply (0 -30V),1A 1


Theory:

The frequency divider is inserted between the VCO and the phase

comparator of PLL. Since the output of the divider is locked to the input frequency f IN,

the VCO is actually running at a multiple of the input frequency .The desired amount

of multiplication can be obtained by selecting a proper divide– by – N network ,where

N is an integer. To obtain the output frequency fOUT=2fIN, N = 2 is chosen. One must

determine the input frequency range and then adjust the free running frequency fOUT

of the VCO by means of R1 and C1 so that the output frequency of the divider is

midway within the predetermined input frequency range. The output of the VCO now

should be 2fIN . The output of the VCO should be adjusted by varying potentiometer

R1. A small capacitor is connected between pin7 and pin8 to eliminate possible

oscillations. Also, capacitor C2 should be large enough to stabilize the VCO

frequency.

Circuit diagram



Fig.1 PLL as Frequency Multiplier

Design:

If C= 0.01μF and the frequency of input trigger signal is 2KHz, output pulse

width of 555 in monostable mode is given by

1.1RAC = 1.2T =1.2/f

RA= 1.2/(1.1Cf)=54.5KΩ

fIN=fOUT/N

Under locked conditions,

fOUT = NfIN = 2fIN = 4KHz

Procedure:

1. The circuit is connected as per the circuit diagram.



2. Apply a square wave input to the pin2 of the 565

3. Observe the output at pin4 of 565 under locked condition.

4. Give the output of 565 to the pin2 of 555 IC.

5. Observe the output of 555 at pin3.

6. Now give the output of 555 as feedback to the pin5 of the 565.

7. Observe the frequency of output signal fo at pin4 of 565 IC.

8. Draw the wave forms.

Wave forms:

Fig 2(a): Input

(b): PLL output under locked conditions without 555

(c): Output at pin4 of 565 with 555 connected in the feedback

Sample readings:


Amplitude (Vp-p) 8 8

Frequency (KHz) 2 4



Precautions:



.

Result:

Frequency multiplier using IC 565 is obtained.

Inferences:

Application of IC 555 in monostable mode as a frequency divider is observed

while designing the frequency multiplier.


1. Out of capture and lock ranges, which is smaller?

Ans: Capture range

2. What is the function of VCO in a PLL?

Ans: To get stable oscillations

3. What does happen if frequency divider network -by- 4 is placed in the

feedback?

Ans: Frequency multiplier of 4 is obtained at the output.

12. IC 566 – VCO Applications

Aim: i) To observe the applications of VCO-IC 566



ii) To generate the frequency modulated wave by using IC 566

Apparatus required:

S.No Equipment/Component Name Specifications/Value Quantity


2 Resistors 10KΩ

1.5KΩ

2

1

3 Capacitors 0.1 μF

100 pF

1

1

4 Regulated power supply 0-30 V, 1 A 1

5 Cathode Ray Oscilloscope 0-20 MHz 1

6 Function Generator 0.1-1 MHz 1

Theory: The VCO is a free running Multivibrator and operates at a set frequency fo

called free running frequency. This frequency is determined by an external timing

capacitor and an external resistor. It can also be shifted to either side by applying a

d.c control voltage vc to an appropriate terminal of the IC. The frequency deviation is

directly proportional to the dc control voltage and hence it is called a “voltage

controlled oscillator” or, in short, VCO.

The output frequency of the VCO can be changed either by R1, C1 or the

voltage VC at the modulating input terminal (pin 5). The voltage VC can be varied by

connecting a R1R2 circuit. The components R1 and C1 are first selected so that VCO

output frequency lies in the centre of the operating frequency range. Now the

modulating input voltage is usually varied from 0.75 VCC which can produce a

frequency variation of about 10 to 1.

Circuit Diagram:



Fig1: Voltage Controlled Oscillator

Design:

1. Maximum deviation time period =T.

2. fmin = 1/T.

where fmin can be obtained from the FM wave

3. Maximum deviation, ∆f= fo - fmin

4. Modulation index β = ∆f/fm

5. Band width BW = 2(β+1) fm = 2 (∆f+fm)

6. Free running frequency,fo = 2(VCC -Vc) / R1C1VCC

Procedure:

1. The circuit is connected as per the circuit diagram shown in Fig1.

2. Observe the modulating signal on CRO and measure the amplitude and

frequency of the signal.

3. Without giving modulating signal, take output at pin 4, we get the carrier

wave.

4. Measure the maximum frequency deviation of each step and evaluate the

modulating Index.

mf = β = ∆f/fm



Waveforms:

Fig 2 (a): Input wave of VCO

(b): Output of VCO at pin3

(c): Output of VCO at pin4

Sample readings:

VCC=+12V; R1=R3=10KΩ; R2=1.5KΩ; fm=1KHz

Free running frequency, fo = 26.1KHz

fmin = 8.33KHz

∆f= 17.77 KHz

β = ∆f/fm = 17.77

Band width BW ≈ 36 KHz

Precautions:



Result:



Frequency modulated waveforms are observed and modulation Index, B.W

required for FM is calculated for different amplitudes of the message signal.

Inferences:

During positive half-cycle of the sine wave input, the control voltage will

increase, the frequency of the output waveform will decrease and time period will

increase. Exactly opposite action will take place during the negative half-cycle of the

input as shown in Fig (b).


1. What are the applications of VCO?

Ans: VCO is used in FM, FSK, and tone generators, where the frequency

needs to be controlled by means of an input voltage called control voltage.

2. What is the effect of C1 on the output?

Ans: The frequency of the output decreases for an increase in C1.

13. Voltage Regulator using IC723



Aim: To design a low voltage variable regulator of 2 to 7V using IC 723.

Apparatus required:


1 IC 723 Refer appendix A 1

2 Resistors 3.3KΩ,4.7KΩ,

100 Ω

Each one

3 Variable Resistors 1KΩ, 5.6KΩ Each one

4 Regulated Power supply 0 -30 V,1A 1


Theory:

A voltage regulator is a circuit that supplies a constant voltage regardless of

changes in load current and input voltage variations. Using IC 723, we can design

both low voltage and high voltage regulators with adjustable voltages.

For a low voltage regulator, the output VO can be varied in the range of

voltages Vo < Vref, where as for high voltage regulator, it is VO > Vref. The voltage Vref

is generally about 7.5V. Although voltage regulators can be designed using Op-

amps, it is quicker and easier to use IC voltage Regulators.

IC 723 is a general purpose regulator and is a 14-pin IC with internal short

circuit current limiting, thermal shutdown, current/voltage boosting etc. Furthermore

it is an adjustable voltage regulator which can be varied over both positive and

negative voltage ranges. By simply varying the connections made externally, we can

operate the IC in the required mode of operation. Typical performance parameters

are line and load regulations which determine the precise characteristics of a

regulator. The pin configuration and specifications are shown in the Appendix-A.



Circuit Diagram:

Fig1: Voltage Regulator

Design of Low voltage Regulator :-

Assume Io= 1mA,VR=7.5V

RB = 3.3 KΩ

For given Vo

R1 = ( VR – VO ) / Io

R2 = VO / Io

Procedure:

a) Line Regulation:

1. Connect the circuit as shown in Fig 1.

2. Obtain R1 and R2 for Vo=5V

3. By varying Vn from 2 to 10V, measure the output voltage Vo.

4. Draw the graph between Vn and Vo as shown in model graph (a)

5. Repeat the above steps for Vo=3V

b) Load Regulation: For Vo=5V



1. Set Vi such that VO= 5 V

2. By varying RL, measure IL and Vo

3. Plot the graph between IL and Vo as shown in model graph (b)

4. Repeat above steps 1 to 3 for VO=3V.

Sample Readings:

a) Line Regulation:

Vo set to 5V Vo set to 3V


Vi(V) Vo(V)

0 0

1 0.65

2 0.66

3 1.23

4 2.68

5 3.40

6 4.13

7 4.90

8 5.33

9 5.33

10 5.33

Vi(V) Vo(V)

0 0

1 0.65

2 0.69

3 1.05

4 1.42

5 1.80

6 2.19

7 2.57

8 2.81

9 2.81

10 2.81

69


b) Load Regulation:

Vo set to 5V Vo set to 3V

Model graphs:

a) Line Regulation: b) Load Regulation:

Precautions:


IL (mA) Vo(V)

46 5.33

44 5.33

40 5.33

35 5.33

28 5.33

20 5.33

18 5.33

16 5.33

12 5.33

8 5.33

6 5.33

4 5.33

2 5.33

IL (mA) Vo(V)

24 2.81

22 2.81

20 2.81

18 2.81

16 2.81

14 2.81

12 2.81

10 2.81

8 2.81

6 2.81

4 2.81

2 2.81

70




Results:

Low voltage variable Regulator of 2V to 7V using IC 723 is designed. Load and Line

Regulation characteristics are plotted.

Inferences:

Variable voltage regulators can be designed by using IC 723.


1. What is the effect of R1 on the output voltage?

Ans: R1 decreases for an increase in the output voltage.

2. What are the applications of voltage regulators?

Ans: Voltage regulators are used as control circuits in PWM, series type

switch mode supplies, regulated power supplies, voltage stabilizers.

3. What is the effect of Vi on output?

Ans: Output varies linearly with input voltage up to some value (o/p voltage+

dropout voltage) and remains constant.

.

14. Three Terminal Voltage Regulators- 7805, 7809, 7912



Aim: To obtain the regulation characteristics of three terminal voltage regulators.

Apparatus required:


Name

Specifications/Values Quantity

1 Bread board 1

2 IC7805 Refer appendix A 1




6 Milli ammeter 0-150 mA 1

7 Regulated power supply 0-30 V 1

8 Connecting wires

9 Resistors pot 100Ω ,1k Ω Each one

Theory:

A voltage regulator is a circuit that supplies a constant voltage regardless of

changes in load current and input voltage. IC voltage regulators are versatile,

relatively inexpensive and are available with features such as programmable output,

current/voltage boosting, internal short circuit current limiting, thermal shunt down

and floating operation for high voltage applications.

The 78XX series consists of three-terminal positive voltage regulators with

seven voltage options. These IC’s are designed as fixed voltage regulators and with

adequate heat sinking can deliver output currents in excess of 1A.

The 79XX series of fixed output voltage regulators are complements to the

78XX series devices. These negative regulators are available in same seven voltage

options.

Typical performance parameters for voltage regulators are line regulation,

load regulation, temperature stability and ripple rejection. The pin configurations and

typical parameters at 250C are shown in the Appendix-B.

Circuit Diagrams:



Fig 1: Positive Voltage Regulator

Fig 2: Negative Voltage Regulator

Procedure:



a) Line Regulation:

1. Connect the circuit as shown in Fig 1 by keeping S open for 7805.

2. Vary the dc input voltage from 0 to 10V in suitable stages and note down the

output voltage in each case as shown in Table1 and plot the graph between

input voltage and output voltage.

3. Repeat the above steps for negative voltage regulator as shown in Fig.2 for

7912 for an input of 0 to -15V.

4. Note down the dropout voltage whose typical value = 2V and line regulation

typical value = 4mv for Vin =7V to 25V.

b) Load regulation:

1. Connect the circuit as shown in the Fig 1 by keeping S closed for load

regulation.

2. Now vary R1 and measure current IL and note down the output voltage Vo in

each case as shown in Table 2 and plot the graph between current IL and Vo.

3. Repeat the above steps as shown in Fig 2 by keeping switch S closed for

negative voltage regulator 7912.

c) Output Resistance:

Ro= (VNL – VFL) Ω

IFL

VNL - load voltage with no load current

VFL - load voltage with full load current

IFL - full load current.

Sample readings:



a) Line regulation b) Load Regulation

1) IC 7805 1) IC 7805

2) IC 7809 2) IC 7809

3)7912 3) IC 7912

Graphs:

IC 7805


Input Voltage

Vi,(V)

Output Voltage

Vo(V)

0 0

5 4.05

6 4.86

7 5

10 5

Load Current

IL(mA)

Output Voltage

Vo(V)

44 5

40 5

30 5

20 4.98

16 4.97

8 4.96

Load Current

IL(mA)

Output Voltage

Vo(V)

56 9

48 9

33 9

25 8.96

21 8.82

15 8.60

Input Voltage

Vi,(V)

Output

Voltage Vo(V)

0 0

5 7.4

10 8.7

12 9

14 9

Load Current

IL(mA)

Output Voltage

Vo(V)

56 -12.09

46 -12.09

38 -12.07

28 -12.06

24 -11.98

20 -11.80

Input Voltage

Vi,(V)

Output

Voltage Vo(V)

0 0

-10 -9.59

-12 -11.59

-14 -12

-15 -12

75


IC 7809

IC7912

% load regulation = VNL - VFL x 100

VFL

Precautions:





Result:

Line and load regulation characteristics of 7805, 7809 and 7912 are plotted

Inferences:

Line and load regulation characteristics of fixed positive and negative three

terminal voltages are obtained. These voltage regulators are used in regulated power

supplies.


1. Mention the IC number for a negative fixed three terminal voltage regulator of

12V.

Ans: IC 7912

2. Explain the significance of IC regulators in power supply

Ans: To get constant dc voltages.

3. What is drop-out voltage?

Ans: The difference between input and output voltages is called dropout

voltage

4. What is the role of C1 and C2?

Ans: C1 is used to cancel the inductive effects.

C2 is used to improve the transient response of regulator.

4. What are C1 and C2 called?

Ans: Bypass capacitors

15. 4 bit DAC using OP AMP

Aim: To design 1) weighted resistor DAC

2) R-2R ladder Network DAC



Apparatus required:


name



2 Resistors 1KΩ,2KΩ,4KΩ, 8KΩ Each one

3 Regulated Power supply 0-30 V , 1A 1

4 Multimeter(DMM) 3 ½ digit display 1

5 connecting wires

6 Digital trainer Board 1

Theory: Digital systems are used in ever more applications, because of their

increasingly efficient, reliable, and economical operation with the development of the

microprocessor, data processing has become an integral part of various systems

Data processing involves transfer of data to and from the micro computer via

input/output devices. Since digital systems such as micro computers use a binary

system of ones and zeros, the data to be put into the micro computer must be

converted from analog to digital form. On the other hand, a digital-to-analog

converter is used when a binary output from a digital system must be converted to

some equivalent analog voltage or current. The function of DAC is exactly opposite

to that of an ADC.

A DAC in its simplest form uses an op-amp and either binary weighted

resistors or R-2R ladder resistors. In binary-weighted resistor op-amp is connected

in the inverting mode, it can also be connected in the non inverting mode. Since the

number of inputs used is four, the converter is called a 4-bit binary digital converter.

Circuit Diagrams:



Fig 1: Binary weighted resistor DAC

Fig 2: R – 2R Ladder DAC

Design:



1. Weighted Resistor DAC

Vo = -Rf

For input 1111, Rf = R = 4.7KΩ

Vo = -

Vo = - 9.375 V

2.R-2R Ladder Network:

Vo = -Rf X 5

For input 1111, Rf = R= 1KΩ

Procedure:

1. Connect the circuit as shown in Fig 1.

2. Vary the inputs A, B, C, D from the digital trainer board and note down the output

at pin 6. For logic ‘1’, 5 V is applied and for logic ‘0’, 0 V is applied.

3. Repeat the above two steps for R – 2R ladder DAC shown in Fig 2.

Observations:

Weighted resistor DAC



S.No D C B A Theoretical Voltage(V) Practical Voltage(V)

1 0 0 0 0 0 0

2 0 0 0 1 -0.62 -0.66

3 0 0 1 0 -1.25 -1.02

4 0 0 1 1 -1.87 -1.74

5 0 1 0 0 -2.5 -2.36

6 0 1 0 1 -3.12 -3.08

7 0 1 1 0 -3.75 -3.44

8 0 1 1 1 -4.37 -4.16

9 1 0 0 0 -5 -4.95

10 1 0 0 1 -5.62 -5.66

11 1 0 1 0 -6.25 -6.02

12 1 0 1 1 -6.87 -6.73

13 1 1 0 0 -7.5 -7.35

14 1 1 0 1 -8.12 -8.07

15 1 1 1 0 -8.75 -8.43

16 1 1 1 1 -9.37 -9.15

R-2R Ladder Network:

S.No D C B A Theoretical Voltage(V) Practical Voltage(V)



1 0 0 0 0 -0.31 -0.05

2 0 0 0 1 -0.62 -0.6

3 0 0 1 0 -0.93 -0.7

4 0 0 1 1 -1.25 -1.22

5 0 1 0 0 -1.56 -1.27

6 0 1 0 1 -1.87 -1.91

7 0 1 1 0 -2.18 -1.96

8 0 1 1 1 -2.5 -2.41

9 1 0 0 0 -2.81 -2.52

10 1 0 0 1 -3.12 -3.06

11 1 0 1 0 -3.41 -3.11

12 1 0 1 1 -3.75 -3.63

13 1 1 0 0 -4.06 -3.69

14 1 1 0 1 -4.2 -3.7

15 1 1 1 0 -4.37 -4.32

16 1 1 1 1 -4.68 -4.38

Model Graph:



Decimal Equivalent of Binary inputs

Precautions:



Results:

Outputs of binary weighted resistor DAC and R-2R ladder DAC are observed.

Inferences:

Different types of digital-to-analog converters are designed.


1. How do you obtain a positive staircase waveform?

Ans: By giving negative reference voltage.

2. What are the drawbacks of binary weighted resistor DAC?

Ans: Wide range of resistors is required in binary weighted resistor DAC.

3. What is the effect of number of bits on output ?

Ans: Accuracy degenerates as the number of binary inputs is increased

beyond four.



Other Experiments

1. Voltage- to- Current Converter

Aim:- To design voltage to current converter with floating load and grounded

load using op amp

Apparatus required:-


name



2 Resistors 10 KΩ

1KΩ

5

1

3 Regulated Power supply (0-30V),1A 1


5 Ammeter (0 – 30) μA 1


Theory:-

In many applications we must convert the given voltage into current. The two

types of voltage to current converters are

1. V to I converters with floating load

2. V to I converters with grounded load.

Floating load V – I converters are used as low voltage ac and dc voltmeters, diode

match finders, light emitting diodes and zener diode testers. V to I converters

Grounded load are used in testing such devices as zeners and LEDs forming a

ground load.



Circuit Diagrams:-

Fig 1: V – I converter with floating load

Fig 2: V – I converter with grounded load



Design:

V – I converter with floating load

Vin = Vid + Vf where Vid is input difference voltage and Vf is the feedback voltage

But Vid = 0

Vin = Vf = R1RL

IL = Vin/RL

V – I converter with grounded load

I1+I2=IL

(Vin-V1)/R+(Vo-V1)/R=IL

Vin+Vo-2Vi=ILR

Since op-amp is non inverting

Gain=1+(R/R)=2

Vo=2Vi

Vin=Vo-Vo+ILR

IL=Vin/R

Procedure:-


1. Connect the circuit as per the circuit diagram in Fig 1.

2. Apply input voltage to the non-inverting terminal of 741.

3. Observe the output from CRO and note down the ammeter reading for various

values of input voltage.


1. Connect the circuit as per the circuit diagram shown in Fig 2.

2. Set ac input to any desired value.

3. Switch on the dual trace supply and note down the readings of ammeter

4. Repeat the above procedure for varies values input voltages.



Sample readings:


Vin(V) Current (mA)

RL=1KΩ RL=10KΩ

0 0 0

1 1 0.9

2 2 1

3 2.8 1

4 3.9 1

5 4.7 1

6 5.3 1

7 5.3 1


Vin Current(mA)

1 0.1

2 0.2

3 0.3

4 0.4

5 0.49

6 0.58

Precautions:



Results:



Voltage to current converters with floating load and grounded load are

designed and outputs are observed.

Inferences:

Different types of V-I converters are designed.


1. What is the effect of RL on the output current in V-to-I converter with

floating load?

Ans: Output current decreases for an increase in RL.

2. What is the effect of R on the output current in V-to-I converter with

grounded load?

Ans: Output current decreases for an increase in R

3. For what ranges of currents the circuits are useful?

Ans: Range of current is (0 to 30mA).



2. Precision Rectifier

Aim: To obtain a precision rectifier (half wave rectifier using IC 741).

Apparatus required:


name



2 Resistors 10 KΩ

1KΩ

5

1


5 Cathode Ray Oscilloscope (0-20MHz) 1


Theory:

There are two types of half wave rectifiers. One is inverting half wave rectifier

and second one is non-inverting half wave rectifier. The below circuit show the non-

inverting half wave rectifier with diode (0A79) in the feed back loop of an op-amp.

Circuit diagram:



Procedure:

1. Connect the circuit as per the circuit diagram.

2. Give the sinusoidal input of 100mVp-p, 1 KHz from function generator.

3. Switch on the dual power supply of + 15V.

4. Note down the output from CRO.

Model Graphs:

Fig.a) Input waveform to the half wave rectifier

b ) Output to (a)

Sample readings:


Amplitude (V),Vp-p 2 1

Time period (ms) 1 1



Precautions:



Results:

Half-wave rectifier output is observed.

Inferences:

Precision half-wave rectifier is obtained by using IC 741.


1. What is the output if the diode is reversed?

Ans: The circuit acts as a negative small signal half wave rectifier.

2. What is a super diode?

Ans: The combination of the diode-op amp is referred as super diode. This

combination works as basic half wave rectifier. Placing the diode with in the

feedback loop in effect eliminates any errors due to its forward voltage.

3. What is precision rectifier?

Ans: Precision rectifier is a rectifier which is capable of rectifying milli volt

signals.

4. What modifications you suggest to get negative half cycles at output?

Ans: By reversing the diode in the given circuit.



3. Clipper Circuits using IC 741

Aim: To obtain the clipped waveforms of the input using IC741.

Apparatus required:


name



2 Resistors 10 KΩ 1


4 Function generator (0-1MHz) 1

5 Diode 0A79 1

6 Cathode Ray Oscilloscope (0-20MHz) 1

Theory:

A positive clipper is a circuit that removes positive parts of the input

signal. In this circuit the op-amp is basically used as a voltage follower with a diode in

the feed back path. The clipping level is determined by the reference voltage Vref

which should be less than input voltage range of op-amp. Additionally since Vref is

derived from the positive supply voltage, dc supply voltage is well regulated.

During the positive half cycle of the input, the diode(IN4007) conducts

only until Vin =Vref. This happens because Vin < V ref the voltage Vref at ‘-‘ve input

is higher than that at the ‘+’ve input. Hence the output voltage Vo’ the op-amp

become sufficiently negative to drive D1 into conducting. When D1 conducts it closes

the feed back loop and op-amp operates as a voltage follower i.e. output Vo follows

input Vin until Vin =Vref.



Circuit diagrams:

Fig 1: Positive Clipper

Fig 2: Negative Clipper



Procedure:

Positive clipper


2. Apply the reference voltage of 1V.

3. Apply a 6Vp-p of sine wave as input.

4. Note down the output waveform as shown in Fig 3(a) and 3(b).

Negative clipper


2. Apply the reference voltage of 1V.

3. Apply a 6Vp-p of sine wave as input.

4. Note down the output waveform as shown in Fig 3(c) and 3(d).

Waveforms:

Positive clipper

Fig 3 (a) : Input wave form

(b) : output wave form



Negative clipper

Fig 3 (c): Input

(d): output

Sample readings:

a) Positive clipper

Parameter Input Voltage Output Voltage

Amplitude (V),Vp-p 6 4.6


b) Negative clipper

Parameter Input Voltage Output Voltage

Amplitude (V), Vp-p 6 4..6




Precautions:



Result:

The positive and negative clippers are obtained.

Inferences:

The application of IC 741 as a clipper is observed.


1. What is the effect of Vref on the output?

Ans: Clipping level is determined by the Vref, which should be less than

the input voltage range of the op-amp

2. How do you change a positive clipper into negative clipper?

Ans: A positive clipper is converted into a negative clipper by reversing diode

D1 and changing the polarity of reference voltage Vref .



APPENDIX-A

IC723

Pin Configuration

Specifications of 723:

Power dissipation : 1W

Input Voltage : 9.5 to 40V

Output Voltage : 2 to 37V

Output Current : 150mA for Vin-Vo = 3V

10mA for Vin-Vo = 38V

Load regulation : 0.6% Vo

Line regulation : 0.5% Vo



APPENDIX-B

Pin Configurations:

78XX 79XX

Plastic package

Typical parameters at 25oC:

Parameter LM 7805 LM 7809 LM 7912

Vout,V 5 9 -12

Imax,A 1.5 1.5 1.5

Load Reg,mV 10 12 12

Line Reg,mV 3 6 4

Ripple Rej,dB 80 72 72

Dropout 2 2 2

Rout,mΩ 8 16 18

ISL,A 2.1 0.45 1.5



REFERENCES

1. D.Roy Choudhury and Shail B.Jain, Linear Integrated Circuits, 2nd edition,

New Age International.

2. James M. Fiore, Operational Amplifiers and Linear Integrated Circuits: Theory

and Application, WEST.

3. Malvino, Electronic Principles, 6th edition, TMH

4. Ramakant A. Gayakwad, Operational and Linear Integrated Circuits,4th

edition, PHI.

5. Roy Mancini, OPAMPs for Everyone, 2nd edition, Newnes.

6. S. Franco, Design with Operational Amplifiers and Analog Integrated Circuits,

3rd edition, TMH.

7. William D. Stanley, Operational Amplifiers with Linear Integrated Circuits, 4th

edition, Pearson.

8. www.analog.com


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