Lecture8:MemoryManagementCSE120:PrinciplesofOpera>ngSystems

UCSanDiego:SummerSessionI,2009FrankUyeda

Announcements

•  PeerWiseques>onsduetomorrow.•  Project2isdueonFriday.– MilestoneonTuesdaynight.Tonight.

•  Homework3isduenextMonday.

2

PeerWise

•  Abaseregistercontains:– Thefirstavailablephysicalmemoryaddressforthesystem

– Thebeginningphysicalmemoryaddressofaprocess’saddressspace

– Thebase(i.e.base2forbinary,etc)thatisusedfordeterminingpagesizes

– Theminimumsizeofphysicalmemorythatwillbeassignedtoeachprocess

3

PeerWise

•  Ifthebaseregisterholds640000andthelimitregisteris200000,thenwhatrangeofaddressescantheprogramlegallyaccess?– 440000through640000– 200000through640000– 0through200000– 640000through840000

4

GoalsforToday

•  UnderstandPaging– Addresstransla>on– PageTables

•  UnderstandSegmenta>on– Howitcombinesfeaturesofothertechniques

5

Recap:VirtualMemory

•  MemoryManagementUnit(MMU)–  Hardwareunitthattranslatesavirtualaddresstoaphysicaladdress

–  EachmemoryreferenceispassedthroughtheMMU

–  Translateavirtualaddresstoaphysicaladdress

•  Transla>onLookasideBuffer(TLB)–  Essen>allyacachefortheMMU’svirtual‐to‐physicaltransla>onstable

–  Notneededforcorrectnessbutsourceofsignificantperformancegain

6

CPUTransla>on

TableMMU

Memory

VirtualAddress

PhysicalAddress

TLB

Recap:Paging

•  Pagingsolvestheexternalfragmenta>onproblembyusingfixedsizedunitsinbothphysicalandvirtualmemory

7

Page1

Page2

Page3

Page4

Page5

PhysicalMemory

Page1

Page2

PageN

VirtualMemory

…..

MemoryManagementinNachos

8

Page1

Page2

Page3

PageP

PhysicalMemory

Code

Code

VirtualMemory

…..

0x…..

0x00000000 0x00000000

0x00040000

0x00000400

...

PageN

..

Stack

Data

MemoryManagementinNachos

9

Page1

Page2

Page3

PageP

PhysicalMemory

Code

Code

VirtualMemory

…..

0x…..

0x00000000 0x00000000

0x00040000

0x00000400

...

PageN

..

Stack

Data

•  Whatifcodesec>onisn’tamul>pleofpagesize?•  Whatif0x…..islargerthanphysicalmemory?•  Whatif0x…..issmallerthanphysicalmemory?

MemoryManagementinNachos

•  Howdoweknowhowlargeaprogramis?–  Alotisdoneforyouinuserprog/UserProcess.java

•  Yourapplica>onswillbewrihenin“C”•  Your“C”programscompileinto.cofffiles

•  Coff.javaandCoffSec>on.javaareprovidedtopar>>onthecofffile

–  Ifnotenoughphysicalmemory,exec()returnserror•  Nachosexec()isdifferentfromUnixexec()!!!!!

•  VirtualMemorymapsexactlytoPhysicalMemory?–  Whoneedsapagetable,TLBorMMU?–  Whataretheimplica>onsforthisintermsof

mul>programming?

10

Project2:Mul>programming

•  Needtosupportformul>progamming– Programscoexistonphysicalmemory

– Howdowedothis?

11

P1

P2

P3

P4

P5

PhysicalMemory

BaseRegisterP4’sBase

VirtualAddressOffset +

P1

P2

P3

PhysicalMemoryBaseRegisterP4’sBase

VirtualAddressOffset +

LimitRegisterP3’sBase

< Yes?

No?

Protec>onFaultWouldFixedPar>>onswork?WouldVariablePar>>onswork?

Paging

1212

Page1

Page2

Page3

PageP

PhysicalMemoryPage1

Page2

Process1’sVAS

…..

0x00000000

0x00040000

0x00000400

...

PageN

..

PageM

Page3

…..

Page1

Page2

Process2’sVAS

PageQ

Page3

MMU

TLB

PageTable

MMUandTLB

•  MemoryManagementUnit(MMU)–  Hardwareunitthattranslatesavirtualaddresstoaphysicaladdress

–  EachmemoryreferenceispassedthroughtheMMU

–  Translateavirtualaddresstoaphysicaladdress

•  Transla>onLookasideBuffer(TLB)–  Essen>allyacachefortheMMU’svirtual‐to‐physicaltransla>onstable

–  Notneededforcorrectnessbutsourceofsignificantperformancegain

13

CPUTransla>on

TableMMU

Memory

VirtualAddress

PhysicalAddress

TLB

Paging:Transla>ons

•  Transla>ngaddresses–  Virtualaddresshastwoparts:virtualpagenumberandoffset

–  Virtualpagenumber(VPN)isanindexintoapagetable–  Pagetabledeterminespageframenumber(PFN)

–  PhysicaladdressisPFN::offset

14

0xBAADF00D=offsetvirtualpagenumber

0xBAADF 0x00D

Transla>onTable

pagetable

0xBAADF 0x900DFphysicalpagenumber(pageframenumber)

virtualpagenumber

virtualaddress

PageTableEntries(PTEs)

•  Pagetableentriescontrolmapping–  TheModifybitsayswhetherornotthepagehasbeenwrihen

•  Itissetwhenawritetothepageoccurs–  TheReferencebitsayswhetherthepagehasbeenaccessed

•  Itissetwhenareadorwritetothepageoccurs–  TheValidbitsayswhetherornotthePTEcanbeused

•  Itischeckedeach>methevirtualaddressisused–  TheProtec>onbitssaywhatopera>onsareallowedonpage

•  Read,write,execute–  Thepageframenumber(PFN)determinesphysicalpage

•  Note:whenyoudoexercisesinexamsorhw,we’llopentellyoutoignorecoun>ngM,R,V,Protbitswhencalcula>ngsizeofstructures

15

PageFrameNumberProtVRM

1 1 1 2 20

PagingExampleRevisited

16

Page1

Page2

Page3

PageN

PhysicalMemory…..

Pageframe Offset

PhysicalAddress

Pagenumber Offset

VirtualAddress

Pagetableentry

PageTable

0xBAADF00D

0xBAADF 0xF00D

0xF00D0x900DF

0x900DF00D

0xFFFFFFFF

0x00000000

Pagenumber

PageFrameNumberProtVRM

Paging

1717

Page1

Page2

Page3

PageP

PhysicalMemoryPage1

Page2

Process1’sVAS

…..

0x00000000

0x00040000

0x00000400

...

PageN

..

PageM

Page3

…..

Page1

Page2

Process2’sVAS

PageQ

Page3

MMU

TLB

PageTable

V PageFrame

1 0x04

1 0x01

1 0x05

1 0x07

V PageFrame

1 0x04

1 0x01

1 0x05

1 0x07

Example

•  AssumeweareusingPagingand:– Memoryaccess=5us–  TLBsearch=500ns

•  Whatistheavg.memoryaccess>mewithouttheTLB?•  Whatistheavg.memoryaccess>mewith50%TLBhitrate?•  Whatistheavg.memoryaccess>mewith90%TLBhitrate?

18

CPUTransla>on

TableMMU

Memory

VirtualAddress

PhysicalAddress

TLB

PagingAdvantages

•  Easytoallocatememory– Memorycomesfromafreelistoffixed‐sizechunks–  Alloca>ngapageisjustremovingitfromthelist

–  Externalfragmenta>onisnotaproblem

•  Easytoswapoutchunksofaprogram–  Allchunksarethesamesize–  Pagesareaconvenientmul>pleofthediskblocksize

–  Howdoweknowifapageisinmemoryornot?

19

PagingLimita>ons

•  Cans>llhaveinternalfragmenta>on–  Processmaynotusememoryinmul>plesofpages

•  Memoryreferenceoverhead–  2referencesperaddresslookup(pagetable,thenmemory)

–  Solu>on–useahardwarecacheoflookups(TLB)•  Memoryrequiredtoholdpagetablecanbesignificant

–  NeedonePTEperpage–  32‐bitaddressspacew/4KBpages=upto____PTEs–  4bytes/PTE=_____MBpagetable–  25processes=______MBjustforpagetables!–  Solu>on:pagethepagetables(morelater)

20

Paging:LinearAddressSpace

Stack

Heap

DataSegment

TextSegment

21

0x00…….(Star>ngAddress)

0xFFF…..(EndingAddress)

Segmenta>on:Mul>pleAddressSpaces

22

Heap

Text

Data

Stack

Segmenta>on

23

PhysicalMemorySegmentTable

limit baseVirtualAddress

Segment# Offset

< +Yes?

No?

Protec>onFault

Segmenta>on

•  Segmenta>onisatechniquethatpar>>onsmemoryintologicallyrelateddataunits– Module,procedure,stack,data,file,etc.–  Virtualaddressesbecome<segment#,offset>–  Unitsofmemoryfromuser’sperspec>ve

•  Naturalextensionofvariable‐sizedpar>>ons–  Variable‐sizedpar>>ons=1segment/process–  Segmenta>on=manysegments/process

•  Hardwaresupport– Mul>plebase/limitpairs,onepersegment(segmenttable)–  Segmentsnamedby#,usedtoindexintotable

24

SegmentTable

•  Extensions–  Canhaveonesegmenttableperprocess

•  Segment#sarethenprocess‐rela>ve(whydothis?)–  Caneasilysharememory

•  Putsametransla>onintobase/limitpair•  Cansharewithdifferentprotec>ons(samebase/limit,diffprot)•  Whyisthisdifferentfrompurepaging?

–  Candefineprotec>onbysegment•  Problems

–  Cross‐segmentaddresses•  Segmentsneedtohavesame#sforpointerstothemtobesharedamongprocesses

–  Largesegmenttables•  Keepinmainmemory,usehardwarecacheforspeed

25

Segmenta>onExample

26

ExternalFragmenta>oninSegmenta>onNote:ImagecourtesyofTanenbaum,MOS3/e

PagingvsSegmenta>onConsidera4on Paging Segmenta4on

Needtheprogrammerbeawarethatthistechniqueisbeingused?

Howmanylinearaddressspacesarethere?

Canthetotaladdressspaceexceedthesizeofphysicalmemory?

Canproceduresanddatabedis>nguishedandseparatelyprotected?

Issharingofproceduresbetweenusersfacilitated?

27Note:ImageadaptedfromTanenbaum,MOS3/e

Segmenta>onandPaging

•  Cancombinesegmenta>onandpaging–  Thex86supportssegmentsandpaging

•  Usesegmentstomanagelogicallyrelatedunits– Module,procedure,stack,file,data,etc.–  Segmentsvaryinsize,butusuallylarge(mul>plepages)

•  Usepagestopar>>onsegmentsintofixedsizedchunks– Makessegmentseasiertomanagewithinphysicalmemory

•  Segmentsbecome“pageable”–ratherthanmovingsegmentsintoandoutofmemory,justmovepagepor>onsofsegment

–  Needtoallocatepagetableentriesonlyforthosepiecesofthesegmentsthathavethemselvesbeenallocated

•  Tendstobecomplex…

28

VirtualMemorySummary

•  Virtualmemory–  Processesusevirtualaddresses–  OS+hardwaretranslatesvirtualaddressesintophysicaladdresses

•  Varioustechniques–  Fixedpar>>ons–easytouse,butinternalfragmenta>on–  Variablepar>>ons–moreefficient,butexternalfragmenta>on

–  Paging–usesmall,fixedsizechunks,efficientforOS–  Segmenta>on–manageinchunksfromuser’sperspec>ve–  Combinepagingandsegmenta>ontogetbenefitsofboth

29

ManagingPageTables

•  Wecomputedthesizeofthepagetablefora32‐bitaddressspacewith4Kpagestobe___MB–  Thisisfartoomuchoverheadforeachprocess

•  Howcanwereducethisoverhead?–  Observa>on:Onlyneedtomapthepor>onoftheaddressspaceactuallybeingused(>nyfrac>onofen>readdressspace)

•  Howdoweonlymapwhatisbeingused?–  Candynamicallyextendpagetable…–  Doesnotworkifaddressspaceissparse(internalfragmenta>on)

•  Useanotherlevelofindirec>on:mul>‐levelpagetables

30

ManagingPageTables

•  Wecomputedthesizeofthepagetablefora32‐bitaddressspacewith4Kpagestobe100MB–  Thisisfartoomuchoverheadforeachprocess

•  Howcanwereducethisoverhead?–  Observa>on:Onlyneedtomapthepor>onoftheaddressspaceactuallybeingused(>nyfrac>onofen>readdressspace)

•  Howdoweonlymapwhatisbeingused?–  Candynamicallyextendpagetable…–  Doesnotworkifaddressspaceissparse(internalfragmenta>on)

•  Useanotherlevelofindirec>on:mul>‐levelpagetables

31

One‐LevelPageTable

32

Page1

Page2

Page3

PageN

PhysicalMemory…..

Pageframe Offset

PhysicalAddress

Pagenumber Offset

VirtualAddress

Pageframe(PTE)

PageTable

0xFFFFFFFF

0x00000000

Two‐LevelPageTable

33

Page1

Page2

Page3

PageN

PhysicalMemory…..

Pageframe Offset

PhysicalAddress

Secondary Offset

VirtualAddress

SecondaryPageTable(s)

0xFFFFFFFF

0x00000000

Master

Pagetableentry

MasterPageTable

Pageframe(PTE)Pageframe(PTE)

Two‐LevelPageTables

•  Originally,virtualaddresses(VAs)hadtwoparts–  Pagenumber(whichmappedtoframe)andanoffset

•  NowVAshavethreeparts:– Masterpagenumber,secondarypagenumber,andoffset

•  MasterpagetablemapsVAstosecondarypagetable– We’dlikeamanageablemasterpagesize

•  Secondarytablemapspagenumbertophysicalpage–  Determineswhichphysicalframetheaddressresidesin

•  Offsetindicateswhichbyteinphysicalpage–  Finalsystempage/framesizeiss>llthesame,sooffsetlengthstaysthesame

34

Two‐LevelPageTableExample

35

Page1

Page2

Page3

PageN

PhysicalMemory…..

Pageframe Offset

PhysicalAddress

Secondary Offset

VirtualAddress

SecondaryPageTable(s)

0xFFFFFFFF

0x00000000

Master

Pagetableentry

MasterPageTable

Pageframe(PTE)Pageframe(PTE)

Example:4KBpages,4BPTEs(32‐bitRAM),andsplitremainingbitsevenlyamongmasterandsecondary

121010

1Kentries 1Kentries

WheredoPageTablesLive?

•  Physicalmemory–  Easytoaddress,notransla>onrequired–  But,allocatedpagetablesconsumememoryforlife>meofVas

•  Virtualmemory(OSvirtualaddressspace)–  Cold(unused)pagetablepagescanbepagedouttodisk–  But,addressingpagetablesrequirestransla>on–  Howdowestoprecursion–  Donotpagetheouterpagetable(aninstanceofpagepinning

orwiring)•  Ifwe’regoingtopagethepagetables,mightaswellpage

theen>reOSaddressspace,too–  Needtowirespecialcodeanddata(fault,interrupthandlers)

36

EfficientTransla>ons

•  Ouroriginalpagetableschemealreadydoubledthecostofdoingmemorylookups–  Onelookupintothepagetable,anothertofetchthedata

•  Nowtwo‐levelpagetablestriplethecost!–  Twolookupsintothepagetables,athirdtofetchthedata–  Andthisassumesthepagetableisinmemory

•  Howcanweusepagingbutalsohavelookupscostaboutthesameasfetchingfrommemory?–  Cachetransla>onsinhardware–  Transla>onLookasideBuffer(TLB)–  TLBmanagedbyMemoryManagementUnit(MMU)

37

TLBs

•  Transla>onLookasideBuffers–  Translatevirtualpage#sintoPTEs(notphysicaladdresses)–  Canbedoneinasinglemachinecycle

•  TLBsimplementedinhardware–  Fullyassocia>vecache(allentrieslookedupinparallel)–  Cachetagsarevirtualpagenumbers–  CachevaluesarePTEs(entriesfrompagetables)–  WithPTE+offset,candirectlycalculatephysicaladdress

•  TLBsexploitlocality–  Processesonlyuseahandfulofpagesata>me

•  16‐48entries/pages(64‐192K)•  Onlyneedthosepagestobe“mapped”

–  Hitratesarethereforeveryimportant

38

LoadingTLBs

•  Mostaddresstransla>onsarehandledusingtheTLB–  >99%oftransla>ons,buttherearemisses(TLBmiss)…

•  Whopacestransla>onsintotheTLB(loadstheTLB)?–  SopwareloadedTLB(OS)

•  TLBfaultstotheOS,OSfindsappropriatePTE,loadsitintoTLB•  Mustbefast(buts>ll20‐200cycles)•  CPUISAhasinstruc>onsformanipula>ngTLB•  TablescanbeinanyformatconvenientforOS(flexible)

–  Hardware(MemoryManagementUnit)•  Mustknowwherepagetablesareinmainmemory•  OSmaintainstables,HWaccessesthemdirectly•  TableshavetobeinHW‐definedformat(inflexible)

39

ManagingTLBs

•  OSensuresthatTLBandpagetablesareconsistent– WhenIchangestheprotec>onbitsofaPTE,itneedstoinvalidatethePTEifitisintheTLBalso

•  ReloadTLBonaprocesscontextswitch–  Invalidateallentries– Why?Whatisonewaytofixit?

•  WhentheTLBmissesandanewPTEhastobeloaded,acachedPTEmustbeevicted–  ChoosingaPTEtoevictiscalledtheTLBreplacementpolicy

–  Implementedinhardware,opensimple(e.g.,Last‐Not‐Used)

40

Summary

•  Segmenta>on–  Observa>on:Userapplica>onsgrouprelateddata–  Idea:Setvirtual‐>physicalmappingtomirrorapplica>onorganiza>on.Assignprivilegespersegment.

•  PageTablemanagement–  Observa>on:Per‐processpagetablescanbeverylarge–  Idea:Pagethepagetables,usemul>‐levelpagetables

•  Efficienttransla>ons–  Observa>on:Mul>‐levelpagetablesandotherpagefaultscanmakememorylookupsslow

–  Idea:CachelookupsinhardwareTLB

41

NextTime

•  ReadChapter9•  Peerwiseques>onsduetomorrowatmidnight.

•  CheckWebsiteforcourseannouncements–  hhp://www.cs.ucsd.edu/classes/su09/cse120

42