ENGL314 Final Report

IOWA STATE UNIVERSITY

TEAM PROJECT:

PROPOSAL/REPORT

BLUEBERRY STRUDEL: THE QUEST FOR A BETTER BOARDAn analysis of the projected effectiveness of the BeagleBoard, PandaBoard, and Raspberry Pi

ENGLISH 314: TECHNICAL WRITING

SECTION ENGL 314 - 6

PROFESSOR MICHAEL SATTERWHITE

BY

SESHAPPA, ABHISHEK

SCHNIEDERS, THOMAS

SHRADER, BRYAN

AMES, IOWA

26 JULY 2012

Blueberry StrudelThe Quest for a Better Board

i

Letter of Transmittal

TO: Mr. Joe Holub, Advisor of LVC at VRACFROM: Mr. Seshappa, Abhishek; Mr. Schnieders, Thomas; Mr. Shrader, BryanDATE: 31 July 2012SUBJECT: Team Project Letter of Transmittal

Enclosed is a report on three different low-power, open source hardware, single-board computers – the BeagleBoard, the PandaBoard, and the Raspberry Pi as well as the team’s recommendation.

The recommendation is based on each respective board’s power consumption, ease of use, functionality, size, price, and processing power in accordance with the specifications for the Department of Defense Project -- Homunculus Camera (HomCam), carried out by the Live, Virtual, and Constructive (LVC) training department within the Virtual Reality Applications Center (VRAC).

Please look over this proposal. The team welcomes any feedback you may have.Thank you for your time. You may contact any of the team members by email.

Mr. Abhishek SeshappaMechanical Engineeringseshappa @ iastate . edu

Mr. Thomas SchniedersMechanical EngineeringResearch Assistant -- VRACtms @ iastate . ed u

Mr. Bryan ShraderComputer ScienceLab Consultant -- COB Labs shrader @ iastate . edu

Enclosed: Proposal for Homunculus Camera

mailto:[email protected]
















ii Blueberry StrudelThe Quest for a Better Board

Table of ContentsLetter of Transmittal........................................................................................................................iAbstract..........................................................................................................................................1I. Problem......................................................................................................................................2II. Device Attributes........................................................................................................................3

A. Preliminary Information..........................................................................................................31. System on a Chip...............................................................................................................32. Single-Board Computer......................................................................................................3

B. Candidate Commonalities.....................................................................................................31. ARM Architecture...............................................................................................................32. PowerVR SGX....................................................................................................................33. Operating Systems.............................................................................................................34. System on a Chip (SoC).....................................................................................................3

C. BeagleBoard..........................................................................................................................5D. PandaBoard...........................................................................................................................7E. Raspberry Pi..........................................................................................................................9

III. Analysis..................................................................................................................................10IV. Conclusion..............................................................................................................................11V. Appendices..............................................................................................................................12

Appendix A: Common Acronyms.............................................................................................12Appendix B: Glossary..............................................................................................................13

1. Processor/CPU (Central Processing Unit).......................................................................132. Accelerator.......................................................................................................................133. GPU (Graphics Processing Unit)......................................................................................134. DSP (Digital Signal Processor)........................................................................................135. Single-board Computer....................................................................................................136. Open Source Hardware....................................................................................................137. SoC (System on Chip)......................................................................................................138. PoP (Package on Package).............................................................................................139. Memory.............................................................................................................................1410. Instruction Set................................................................................................................1411. Clock Cycle.....................................................................................................................1412. Transistors and Binary...................................................................................................1513. Logic Gates....................................................................................................................1514. Pipelining........................................................................................................................1515. SIMD (Single Instruction Multiple Data).........................................................................16

Appendix C. Common Input/Output (I/O) Ports.......................................................................17VI. Works Cited............................................................................................................................18VII. Other References..................................................................................................................19VIII. Image Sources.....................................................................................................................22


1

Abstract

The Homunculus Camera (HomCam) project, funded by the U.S. Department of Defense and developed by the Live, Virtual, and Constructive department of the Virtual Reality Applications Center at Iowa State University, attaches four cameras and a single-board computer to a helmet. The assembled device records a full three-hundred-sixty-degree video stream of the wearer's environment, saves it to an external storage device, and streams it to another location. In upgrading the HomCam, three single-board computers (BeagleBoard, PandaBoard, Raspberry Pi) were chosen for analysis. After analyzing the three computers on power consumption, ease of use, functionality, size, price, and processing power, the BeagleBoard was chosen for the upgrade.

2 Blueberry StrudelThe Quest for a Better Board

I. Problem

The Homunculus Camera (HomCam) project is an environment recording device funded by the United States’ Department of Defense and developed by the Live, Virtual, and Constructive (LVC) department of the Virtual Reality Applications Center (VRAC) at Iowa State University (ISU). Four pinhole cameras are mounted to a helmet, and wired to a backpack containing frame grabbers (not important to the report), a single-boarda computer, and a power source. The cameras collectively capture a 360° video stream of the wearer’s environment and send it to the single-board computer in the backpack. The single-board computer stitches the individual capture streams into one panoramic video, saves it to an external storage device, and streams it to another location. The wiring transfers the data and power between the helmet cameras and the backpack components. The project has been defunct for three years, but the LVC departmentb has recently fixed it. The department is now looking to upgrade the HomCam's single-board computer.

Based on prior research conducted by the LVC department, two new single-board computer models, the PandaBoard and the Raspberry Pi, have been chosen for further analysis. The current single-board computer, the BeagleBoard, will also be analyzed. These three computers will be evaluated on the basis of processing power, A/V capture abilities, data storage and streaming abilities, external connections, physical size and weight, and power consumption.

a. Single-Board Computer: a small computer condensed to a single board (see V.B.5)b. LVC: Live, Virtual, and Constructive


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II. Device Attributes

A. Preliminary Information

1. System on a ChipA System on a Chip (SoC)a consists of several independent components that are connected together and packaged as a single unit. SoC’s will typically contain a CPUb, a GPUc, some RAMd, and perhaps a DSP. Each of these components will have tech specs just like a standalone component of that type. Packaging components together as an SoC instead of separately reduces the cost and physical size of the unit, but prevents users from swapping or replacing the individual components.

2. Single-Board ComputerA single-board computer contains all the common components of a normal computer on a single circuit board. Single-board computers generally use an SoC for processing data; this means that the unit that does the most work also has the smallest physical size. Most of the board space is devoted to ports which allows the single-board computer to communicate with other devices. A single-board computer is meant for specialized projects such as this one rather than general computing and processing; less options are required for a specialized project, and a single-board computer is smaller and cheaper than a general-purpose computer.

B. Candidate Commonalities

1. ARM ArchitectureARM-Cortex is a processorb which implements the ARM instruction set. Processors based on ARM architecture are relatively less complex than that of traditional processors and thus require relatively less power [1]. For this reason, ARM is analogous with “low power consumption.” Since all three candidate devices implement some version of ARM, they all meet the “low power” qualification.

2. PowerVR SGXPowerVR SGX is a type of Graphics Processing Unit [15]. Both the BeagleBoard and PandaBoard implement a version of PowerVR SGX [24][27]. This gives them both enhanced graphics processing capabilities. 3. Operating SystemsAll three devices are capable of running Linux [24][26][28]. Both the BeagleBoard and PandaBoard are able to run Android as well [24][26].

4. System on a Chip (SoC)

a. SoC: System on Chip (see V.B.7)b. Processor/CPU: Central Processing Unit (see V.B.1)c. GPU: Graphics Processing Unit (see V.B.3)d. DSP: Digital Signal Processor (see V.B.4)


Both the BeagleBoard and the PandaBoard use an OMAP SoC, which is a specific series of SoC's developed by Texas Instruments. An OMAP SoC generally contains an ARM-Cortex CPU, which handles general processing, a TMS320 DSP, which processes incoming audio and video signals, and a PowerVR SGX GPU, which processes graphical data. The Raspberry Pi uses a Broadcom BCM2835 SoC, which uses different CPU's, GPU's, and DSP's with lower performance.


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C. BeagleBoard

[P1]

The BeagleBoard is an open source hardwarea single-board computer produced by Texas Instruments (in association with Digi-Key) costing $149. The BeagleBoard processes data using the ARM Cortex –A8, a processor core designed by ARM Holdings implementing the 7th version instruction setb architecturec [1].It is a dual-issue superscalar, achieving roughly twice the instruction executed per clock cycle. The ARM Cortex – A8 is capable of running the Linux operating system[3], which is heavily used during software development in the LVC department at the VRAC. The BeagleBoard also implements the OMAP 3530, a proprietary SoC developed for portable and mobile multimedia applications [30][8]. It is the third generation of OMAP with the OMAP 3530 being a variant of the 34x series intended for catalog distribution channels [30][31][8][10]. Each OMAP SoC contains an image, video, audio accelerator, or IVA2. Most OMAP SoC sporting the IVA2 accelerator support 12 megapixel camera images and some support HD imaging [8]. The OMAP 3530 has semiconductor technology at 65 nm, the ARMv7 CPU instruction setb, CPU running the ARM Cortex –A8 at 720 MHz, and GPU PowerVR SGX530 [30][31][10]. The PowerVR SGX530 graphics processing unit, developed by Imagination Technologies, provides accelerated 2D and 3D rendering that supports OpenGL ES 2.0 [16]. The BeagleBoard also sports the TMS320C64x Digital Signal Processor (DSP) developed by Texas Instruments. The TMS320C64x DSP is currently the fastest DSP on the market [13][12][14]. Its clock speed ranges from 300-1000 MHz [13][12][14]. The BeagleBoard uses this DSP for accelerated video and audio recording.

The BeagleBoard houses four separate USB ports as well as a USB On-The-Go (OTG) port. It also contains more standard I/O ports such as 2 stereo 3.5mm audio ports, composite video, S-video, HDMI, SD card slot, and an Ethernet port. The BeagleBoard’s final I/O port is the RS-232, which is the traditional name for a series of standards for serial binary single-ended data and control signals connecting between a DTE and a DCE [18].

a. Open Source Hardware: The documentation is freely available to the public (see V.B.6) b. Instruction Set: The set of instructions which a hardware device recognizes (see V.B.10)c. See section II.A for additional information on ARM architecture.


This single-board computer measures in at only 75x75 mm and has built in storage and memory via PoPa chip that includes 256 MB of NAND flash memoryb and 256MB of RAM. Package on Package, or PoP, is an integrated circuit packing method that combines “vertically discrete logic and memory ball grid array (BGA) packages” [19]. Packages are installed on top of one another which allows higher component density in devices [20]. The PoP circuit packing leads to space savings on the motherboard which, in turns, allows the BeagleBoard to maintain its small size. Electrically, the PoP minimizes track length between different interoperating parts which leads to better electrical performance of devices, faster signal propagation, and reduced noise [20].

The BeagleBoard offers Joint Test Action Group (JTAG)c standard test access port and boundary-scan architecture. JTAG was initially developed for “testing printed circuit boards using boundary scan” [21] and is still widely used for this application. However, JTAG is now commonly used for IC debug ports [22]. Boundary scan itself is a method for testing interconnects on printed circuit boards and is used as a debugging method [22]. The single-board computer also offers on-board NAND flash memory. NAND flash memoryb implements floating-gate transistors that are connected in a way that resembles a NAND gated, that is, several transistorse are connected in series [23].

a. PoP (Package-on-Package): a technique used to optimize physical space usage (see V.B.8)b. Flash Memory: a type memory used for long-term data storage (see V.B.9.ii)c. JTAG: a tool used for debugging/error detection.d. NAND Gate: a type of logic gate which is the complement of an AND Gate (see V.B.13.vi)e. Transistors: the internal “switches” inside a computer (see V.B.12)


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D. PandaBoard

[P2]

The PandaBoard is a single-board computer (priced at ~$174) with a design layout based on Texas Instruments’ OMAP 4430; therefore, it holds many similarities with respect to data processing [27]. It sports two ARM Cortex-A9 processors at 1 GHz each as well as a TMS320C64x digital signal processor at an additional 430 MHz. It also uses a 304MHz PowerVR SG540X for enhanced 2D and 3D graphics accelerationa [27]. These attributes make the PandaBoard a very capable machine in terms of both audio and video processingb. Audio and video output on the PandaBoard are respectively handled by the means of 3.5 mm audio and DVI ports as well as an HDMI port for high definition (both audio and video) [27]. The PandaBoard also features a memory card-reader slot, which supports SD cards up to 32 Gigabytes for optimal data storage [27]. In addition to Ethernet capabilities, the PandaBoard has a USB On-the-Go port and two additional USB ports, adhering to the project specificationsc [27]. The PandaBoard implements many structural policies and optimization techniques, which further enhance its efficiency and performance. These policies/techniques are: Pipeliningd, Speculative Execution, Out-of-order Execution, and Superscalar architecture design [4][1]. The first three techniques exploit the “assembly line” nature of the chip in effort to optimize hardware usage. Under Superscalar architecture, as stated in Dr. William M. Johnson’s technical report from the Stanford University Computer Systems Laboratory, “multiple, independent” instructions are “executed in parallel,” effectively reducing the overall execution time [29]. The PandaBoard also implements “Jazelle” which allows Java bytecode to be directly executed, increasing its

a. Accelerator: any unit which helps to enhance processing (see V.B.2)b. See section II.A for information regarding OMAP, ARM, TMS320C64x and PowerVR SGX.c. See section V.C for illustrations of the Input/Output ports mentioned.d. See section V.B.14 for a more in-depth explanation of Pipelining.


efficiency yet even further when Java is used [4][1]. These policies/techniques/features help to hasten the operations of the PandaBoard. PandaBoard includes several special features, which assist in its upkeep as well as general testing. It is compatible with both JTAG and DMIPS, which are tools used for debugging and performance assessment [27][4]. It also implements TrustZone security, which, according to the ARM official website, creates a parallel, “secure” operating system in addition to the “normal” one. This “secure world” is theoretically impervious to attack from the “normal world,” so in event that an attacker gains full control of the “normal world,” the “secure world” is still inaccessible [5]. The special features of the PandaBoard serve to preserve the integrity of the machine. PandaBoard uses the instructions sets ARMv7 and Thumb2 [4]. Thumb2 is a compact variant of ARM (using 16 bits instead of 32). Its span of functionality is, accordingly, less than that of ARM, requiring--in some cases--multiple instructions to simulate a single ARM instruction; however, its shrunken nature can prove to significantly reduce the overall length of the instruction code [1]. PandaBoard also uses advanced SIMDa instructions (Single Instruction Multiple Data), which allows for a single operation to be performed simultaneously on multiple data elements [4].These instruction setsb and policies enhance both the compatibility and efficiency of the PandaBoard.

a. SIMD: Single Instruction Multiple Data (see V.B.15)b. See section V.B.10 for supplementary information on instruction sets.


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E. Raspberry Pi

[P3] [P4]

The Raspberry Pi is a credit card-sized, single-board computer manufactured in the UK and sold for $35 [28]. It is intended for general purpose computer processing on a personal scale.

The Raspberry Pi features a Broadcom BCM2835 SoC, which contains a 700 MHz ARM1176JZF-S CPU core and a Broadcom VideoCore IV GPU/DSP. It has 256 MB of SDRAM shared between the CPU and GPU. [17] These processors are not sufficiently powerful on their own, but two processors can be connected to meet the necessary requirementsa.

The Raspberry Pi accepts data through an HDMI port, an Ethernet port, a 3.5mm audio jack, and 2 USB ports. [28] For this project, only the USB ports will be used. Two single-board computers can be connected together to accept data from all four cameras. In addition to the previous I/O portsb, the Raspberry Pi can also output a video feed through an RCA (composite) connector. [28]

With physical dimensions of 85.60 × 53.98 mm (3.370 × 2.125 in) and a weight of 45 g (1.6 oz), [28] the Raspberry Pi is very small and light. Using two computers to stream the video feed also adds some independency, as one computer can still transmit half of the video stream if the other computer fails. Implements pipelining, which is defined in the glossary. Supports ARM11 architecture.

a. See section II.A for additional informationb. See section V.C for an illustration of mentioned Input/Output ports.


III. Analysis

In order to complete the Homunculus Camera project, the team requires a low power, lightweight, single-board computer with approximately 1 GHz of video/audio processing power (for storing and streaming), data storage capability, and multiple USB ports. Since all three candidates are single-board computers that are lightweight and consume little energy [II.A.1,2], the team’s focus is narrowed primarily to the respective processing, data storage, and USB elements. Price is not viewed as an eliminating factor; however, a low price can sometimes make other attributes become all the more appealing. The team’s duty is to analyze the data at hand, having already in their possession (from a previous project) the model of BeagleBoard described above, and determine if a change to either the PandaBoard or Raspberry Pi would prove beneficial (see Table 1 on next page for an illustration of each board’s comparative attributes).

The BeagleBoard is a strong candidate. It has sufficient processing capabilities [II.B.1] as well as four USB ports [II.B.2]. It can store data either by way of SD Card, USB flash drive, or simply using its featured, on-board flash memory (almost like a mini, built-in hard drive). In addition, the memory unit is detachable, so, in the event that it suffers irreparable damage, it can be replaced individually rather than rendering the entire board unusable [II.B.4]. The BeagleBoard would also be the cheapest option, given that one is already in the team’s possession (thus requiring no additional cost). It is clear that the BeagleBoard dutifully fulfills all of the project requirements.

The PandaBoard is another strong candidate. Its processing power rivals that of even the BeagleBoard [II.C.1]. It also comes with additional built-in security features [II.C.4]. Though it may surpass the BeagleBoard in sheer computational power, it lacks the means of on-board data storage; however, this may not be too huge of an issue, since SD cards and USB flash drives can provide effective and sufficient compensation [II.B.1][II.C.1][II.C.2][II.B.4]. In addition, the PandaBoard is the most expensive of the three units, averaging around $174. It also comes packaged with three USB ports (one less than the BeagleBoard) [II.C.2][II.B.2]. All of the above statements and arguments serve as a testimony that the PandaBoard does indeed meet the project requirements.

The Raspberry Pi is an extremely interesting device. It is only the size of a credit card, yet despite its small stature, it manages to retain a decent amount of processing power, though this power is significantly less than that of the BeagleBoard or PandaBoard [II.B.1][II.C.1][II.D.1]. It is also, fittingly, an incredibly cheap unit, ranging from $25-$35. One of the major downfalls of the Raspberry Pi is that it has only two USB ports, already making it a suboptimal choice by comparison [II.D.2]. Though it is a very cool device, it would simply not be feasible--or would be, at least, impractical--to integrate the Raspberry Pi into the HomCom project.


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Table 1: A comparative illustration of each board's attributes

IV. Conclusion

The team recommends staying with the BeagleBoard. It has already proven its effective use fulfilling all of the project’s requirements when applied in the Haptics Lab in the LVC department of VRAC. However, the team also firmly believes that the PandaBoard would also make a fitting upgrade if and when the project moves on to its projected upgraded second phase for the LVC department’s Department of Defense contract.


V. Appendices

Appendix A: Common Acronyms

1. VRAC = Virtual Reality Applications Center

2. LVC = Live, Virtual, and Constructive

3. CPU = Central Processing Unit (i.e. Processor) [B.1]

4. GPU = Graphics Processing Unit [B.3]

5. DSP = Digital Signal Processor [B.4]

6. RAM = Random Access Memory [B.9.i]

7. I/O = Input/Output [C]

8. SoC = System on Chip [B.7]

9. PoP = Package on Package [B.8]

10. SIMD = Single Instruction Multiple Data [B.15]


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Appendix B: Glossary

1. Processor/CPU (Central Processing Unit)The Processor/CPU is the unit of a computer/device responsible for the processing and execution of instructions.

2. AcceleratorAn “accelerator” is typically a specialized unit which effectively relieves some of the burden placed on CPU in terms of processing. The term “accelerator” can refer to, essentially, anything which enhances (or accelerates) a system’s ability to process data (e.g. graphics, video, audio). GPUs and DSPs can both be considered accelerators. [B.3][B.4]

3. GPU (Graphics Processing Unit)A GPU is a unit which specializes in the processing of graphics. It is typically given the task of transforming internal graphics data into a form recognizable by the monitor/display. In essence, it acts as the translator between the computer/device and display unit (or I/O).

4. DSP (Digital Signal Processor)A DSP is a unit which specializes in the processing of digital signals (e.g converting between analog and digital signals). It is typically given the task of transforming raw data (e.g from I/O ports) into a form which the computer/device can more easily manipulate and understand.

5. Single-board ComputerA Single-board computer is just that--a functional computer condensed into a single board/chip. It is a small computer complete with a processor [B.1], RAM [B.9.i], I/O ports [C], and other necessary components.

6. Open Source HardwareThe term open source refers to any program or project, the source of which (i.e its internal structure and means of creation) is freely accessible to the public. Open source hardware takes this concept and applies it to hardware architecture, that is, the design and layout of the device is well documented, and said documentation is easily accessible.

7. SoC (System on Chip)SoC refers to the specific layout requirements of a single-board computer/device [B.5]. It includes the type of processor(s) as well as the additional components (i.e the “system”) on the chip/board.

8. PoP (Package on Package)


PoP is a physical space optimization technique whereby modules are strategically mounted over top one another in effort to better utilize the occupied space on the board/chip (see Figure 1 on next page)


15

Figure 1: A visual illustration of “Package-on-Package” [P5].

9. MemoryMemory comes in many different flavors. Below are illustrated three different types of system memory:

i. RAM (Random Access Memory)RAM is most analogous with “short-term memory.” It is what the system uses to, essentially, run. Due to its nature, RAM is not used for long-term data storage. It can be likened unto “scratch paper” for the computer as it performs its computations.

ii. Flash MemoryThis is the kind of memory which is found in USB flash drives as well as SD cards. The data is rather easily accessible and re-writable, making it optimal for the relatively longer-term (and even not-so-long-term) data storage needs.

iii. Instruction MemoryThis is memory built into a unit for the sake of reference and is not intended to be changed. It contains the means by which the machine is able to decode/interpret given instructions [B.10].

10. Instruction SetEvery machine/unit/chip has a set of “instructions” which it understands. This is, in essence, the “language” that the machine recognizes. Each of the instructions is relatively simple in nature, featuring a primitive calculation/computation of some kind (e.g add/subtract). When the source code for a program is compiled on a given machine, it is essentially translated into a sequence of instructions from the machine’s respective instruction set. Additionally, the term “Driver” refers to software with the purpose of (for all intensive purposes) communicating between machines with different instruction sets. A unit with a more encompassing instruction set typically has, in turn, a greater compatibility threshold (i.e. it is likely to be compatible with a larger variety of devices).

11. Clock Cycle


This is the unit of time measurement used internally by the machine. A computer is essentially a complex collection of “conductive tissue” and glorified “wires”; therefore, it follows that on any given moment in time, only one specific voltage of electricity is capable of being transmitted through each “wire” [B.12]. Each of these moments is referred to as a “clock cycle.” During a single clock cycle, each circuit is mapped to a particular voltage (either ‘higher’ or ‘lower’). On each following clock cycle, this mapping is reconfigured based on the impulses from the previous cycle (including additional inputs). The greater the number of clock cycles per second, the greater the number of instructions which can be executed per second (i.e. the faster the computation).

12. Transistors and BinaryA transistor is a glorified switch and is the lifeblood (well, probably more like lifeblood-vessel) of the computing process. It simulates a basic, binary, decision problem. The binary alphabet (‘0’ and ‘1’) is an abstraction for “computer language,” which is based on two ranges of electric voltage flowing through its circuits (‘lower’ and ‘higher’ (relatively) which correspond respectively to ‘0’ and ‘1’). Different portions of computers are designed to react differently to the higher voltage than they do to the lower. This effectively allows them to, so to speak, “interpret and speak binary.” Transistors are key to the functionality of logic gates [B.13].

13. Logic GatesLogic gates are computational structures, implementing transistors [B.12] which perform a primitive operation on binary inputs. The most common operations are: AND, OR, NOT, XOR, NOR, and NAND. Each of these takes as input two binary values (with the exception of NOT which takes one) and outputs a single binary value. Below is a brief description of each logic gate operation (inputs are labeled as x and y). The output of each operation is ‘0’ unless a condition is otherwise specified.

i. ANDoutputs ‘1’ only if both x and y are ‘1’.

ii. ORoutputs ‘1’ if either x or y are ‘1’

iii. NOToutputs the complement of x (i.e. ‘0’ if x is ‘1’ and ‘1’ if x is ‘0’)

iv. XORoutputs ‘1’ if either x or y are ‘1’, but ‘0’ if both x and y are ‘1’

v. NORoutputs ‘1’ if neither x nor y are ‘1’ (the complement of OR)

vi. NANDoutputs ‘1’ as long as x and y are not both ‘1’ (the complement of AND)

14. PipeliningPipelining is a method of utilizing the “assembly line” nature of a chip to begin the processing of instructions before previous instructions have completely finished execution. A chip is usually comprised of several modules, and the processing/execution of an instruction is divided into several stages (normally these are: instruction fetch, instruction decode, execution, memory query, and writeback). Each stage pertains to


17

certain, independent modules and requires a clock cycle [B.11] for completion. Once an instruction has passed the first stage, the corresponding, independent modules are normally left to dormantly idle for the remainder of the process. Pipelining makes intelligent use of this downtime by calling these idling modules back into action--by preemptively initiating the process for the next instruction. This allows much of the processing between instructions to overlap, giving the potential for drastic a increase in performance. To illustrate this point, three instructions, which would normally require a collective 15 clock cycles (5 clock cycles each), can theoretically be completed in only 7 (see Figure 2 below).

Figure 2: An illustration of three instructions being executed in 7 clock cycles by means of pipelining

15. SIMD (Single Instruction Multiple Data)This refers to the architecture policy in which an instruction is capable of performing a single operation simultaneously on several independent, parallel portions of data.


Appendix C. Common Input/Output (I/O) Ports


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VI. Works Cited[5] "TrustZone". ARM. Accessed 7/23/2012.

<http://www.arm.com/products/processors/technologies/trustzone.php>

[19] "Package-on-Package". Wikipedia. Accessed 7/15/2012 17:00. <http://en.wikipedia.org/wiki/Package_on_package>

[21] "JTAG". Wikipedia. Accessed 7/15/2012 17:20. <http://en.wikipedia.org/wiki/Jtag>

[29] "Super-Scalar Processor Design". William M. Johnson (June 1989). Stanford University Computer Systems Laboratory. Technical Report No. CSL-TR-89-383. Accessed 7/25/2012 <ftp://reports.stanford.edu/pub/cstr/reports/csl/tr/89/383/CSL-TR-89-383.pdf>


VII. Other References[1] "The ARM Processor Architecture". ARM. Accessed 7/25/2012.

<http://www.arm.com/products/processors/technologies/instruction-set-architectures.php>

[2] "Cortex-A Series - ARM". ARM. Accessed 7/15/2012 14:00. <http://www.arm.com/products/processors/cortex-a/index.php>

[3] "Cortex-A8 Processor". ARM. Accessed 7/15/2012 14:20. <http://www.arm.com/products/processors/cortex-a/cortex-a8.php>

[4] "Cortex-A9 Processor Specifications". ARM. Accessed 7/15/2012. <http://arm.com/products/processors/cortex-a/cortex-a9.php?tab=Specifications>

[5] "TrustZone". ARM. Accessed 7/23/2012. <http://www.arm.com/products/processors/technologies/trustzone.php>

[6] "TI OMAP3530 ARM Cortex A8 System on Module". Phytec America, LLC. Accessed7/25/2012. <http://www.phytec.com/products/som/Cortex-A8/phyCARD-L-CortexA8-OMAP3525.html>

[7] "OMAP". Texas Instruments. Accessed 7/25/2012. <http://www.ti.com/general/docs/wtbu/wtbugencontent.tsp?templateId=6123&navigationId=11988&contentId=4638>

[8] "OMAP 3 Processors". Texas Instruments. Accessed 7/15/2012 14:10. <http://www.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=11989&contentId=4682&DCMP=D_OMAP&CMP=KNC-GoogleTI&247SEM>

[9] "OMAP3430". Texas Instruments. Accessed 7/25/2012. <http://www.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12643&contentId=14649>

[10] "OMAP3530/25 Applications Processor". Texas Instruments. Accessed 7/15/2012 15:20. <http://www.ti.com/lit/ds/symlink/omap3530.pdf>

[11] "OMAP44xx series". Texas Instruments. Accessed 7/25/2012. <http://www.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12843&contentId=53243>

[12] "TMS320C64x Specifications". Texas Instruments. Accessed 7/15/2012. 15:30 <http://www.ti.com/lsds/ti/dsp/platform/c6000-high-performance/c64x_device.page>

[13] "TMS320C6410". Texas Instruments. Accessed 7/15/2012 13:50.


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<http://www.ti.com/product/tms320c6410>

[14] "TMS320C64x Technical Overview". Texas Instruments. Accessed 7/15/2012 17:00. <http://www.ti.com/lit/ug/spru395b/spru395b.pdf>

[15] "PowerVR SGX Series5 Graphics IP Core Family". Imagination Technologies. Accessed 7/23/2012. <http://www.imgtec.com/powervr/sgx_series5.asp>

[16] "2-pipe Series5 3D/2D/vector graphics". Accessed 7/15/2012 16:45. <http://www.chipestimate.com/ip.php?id=20770>

[17] "BCM2835". Broadcom. <http://www.broadcom.com/products/BCM2835>

[18] "The RS232 Standard". Christopher E. Strangio. CAMI Research Inc, Acton, Massachusetts 1993-2012. Accessed 7/15/2012. 16:20 <http://www.camiresearch.com/Data_Com_Basics/RS232_standard.html>

[19] "Package-on-Package". Wikipedia. Accessed 7/15/2012 17:00. <http://en.wikipedia.org/wiki/Package_on_package>

[20] "Package-on-Package (PoP) Materials". Indium Corporation. Accessed 7/15/2012 17:10. <http://www.indium.com/products/semiconductorpackagingassembly/packageonpackage.php>

[21] "JTAG". Wikipedia. Accessed 7/15/2012 17:20. <http://en.wikipedia.org/wiki/Jtag>

[22] "IEEE Standard Test Access Port and Boundary-Sacn Architecture". IEEE Standards Association. Accessed 7/15/2012 17:45. <http://standards.ieee.org/findstds/standard/1149.1-1990.html>

[23] "NAND Flash Memory". WhatIS.com. Accessed 7/15/2012. <http://whatis.techtarget.com/definition/NAND-flash-memory>

[24] "BeagleBoard System Reference Manual". BeagleBoard. Accessed 7/25/2012. <http://beagleboard.org/static/BBSRM_latest.pdf>

[25] "BeagleBoard-XM Product Details. BeagleBoard. Accessed 7/23/2012. <http://beagleboard.org/hardware-xM/>

[26] "PandaBoard Software". PandaBoard. Accessed 7/23/2012. <http://pandaboard.org/content/resources/software>

[27] "PandaBoard Technical Specs". PandaBoard. Accessed 7/23/2012. <http://pandaboard.org/content/platform>

[28] "Raspberry Pi FAQs". Raspberry Pi. Accessed 7/23/2012.


<http://www.raspberrypi.org/faqs>

[29] "Super-Scalar Processor Design". William M. Johnson (June 1989). Stanford University Computer Systems Laboratory. Technical Report No. CSL-TR-89-383. Accessed 7/25/2012 <ftp://reports.stanford.edu/pub/cstr/reports/csl/tr/89/383/CSL-TR-89-383.pdf>

[30] “OMAP35x Processors Now Performance Optimized at 720MHz”. Accessed 7/15/2012 14:35 Texas Instruments. <http://www.ti.com/dsp/docs/dspcontent.tsp?contentId=53403&DCMP=OMAP_Feb27_2008&HQS=Other+OT+omap35x>

[31] “OMAP3530 (ACTIVE) Applications Processor”. Texas Instruments. Accessed 7/15/2012 14:40. <http://www.ti.com/product/omap3530>


23

VIII. Image Sources[P1] BeagleBoard Illustration

<http://en.wikipedia.org/wiki/File:BeagleBoard_described.jpg>

[P2] PandaBoard Illustration <http://theallbox.com/wp-content/uploads/2010/10/PandaBoard_Setup1.png>

[P3] Raspberry Pi Blue-and-White Illustration <http://www.raspberrypi.org/wp-content/uploads/2011/07/raspi_blue_white.png>

[P4] Raspberry Pi Illustration<http://i.i.com.com/cnwk.1d/i/tim/2012/06/19/Raspberry_Pi_35332544_05_1.jpg>

[P5] PoP Illustration<http://www.finetechusa.com/uploads/pics/PoP_principle.jpg>

[P6] RCA Composite and S-Video Female Connections<http://img.tomshardware.com/us/2005/11/23/pc_interfaces_101/scart2.jpg>

[P7] RCA Composite and 3.5 mm Audio Male Connections<https://www.mycablemart.com/store/images/products/1806_small.jpg>

[P8] HDMI and DVI Male Connections<http://www.smelectronics.com/images2/S-HDMI-DVI-1.jpg>

[P9] HDMI Female Connection<http://www.optimization-world.com/img/prod/hdmi_hdmi_coupler_small.jpg>

[P10] Composite Video Male Connection<http://www.computergear.co.uk/userfiles/image/Composite.jpg>

[P11] SD Card<http://www.photo-dictionary.com/photofiles/list/1354/1856SD_card.jpg>

[P12] USB and RS-232 Serial<http://www.pacificgeek.com/productimages/xl/USB2RS232-2.jpg>

[P13] Ethernet<http://c-more.automationdirect.com/images/ethernet_port.jpg>


[P14] S-Video Male Connection<http://pcwizkid.co.uk/images/s-video.jpg>

[P15] DVI Female Connection<http://www.showmecables.com/images/catalog/product/DVI-Female-Female-Adapter3.jpg>

[P16] Raspberry Pi DSI Callout<http://i.imgur.com/k0Puu.jpg (DSI raspberry pi)>

Documents

ENGL314 Final Report