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1 [email protected] Fujitsu Laboratories of America Sunnyvale CA Enabling Technologies for Board Enabling Technologies for Board- Level Level Optical Interconnects Optical Interconnects Alexei L. Glebov Advanced Optoelectronics Technology Department Fujitsu Laboratories of America 1240 E. Arques Ave., Sunnyvale, CA presented at joint IEEE CPMT & LEOS SCV chapter meeting January 11, 2006 [email protected] Fujitsu Laboratories of America Sunnyvale CA Fujitsu Laboratories of America Fujitsu Laboratories of America Fujitsu Laboratories of America (FLA) is a wholly owned subsidiary of Fujitsu Laboratories (Japan) FLA was established on April 20, 1993 Location: Sunnyvale, California ~ 100 employees

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Page 1: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Enabling Technologies for BoardEnabling Technologies for Board--LevelLevelOptical InterconnectsOptical Interconnects

Alexei L. Glebov

Advanced Optoelectronics Technology DepartmentFujitsu Laboratories of America

1240 E. Arques Ave., Sunnyvale, CA

presented at joint IEEE CPMT & LEOS SCV chapter meetingJanuary 11, 2006

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Fujitsu Laboratories of AmericaFujitsu Laboratories of America

Fujitsu Laboratories of America (FLA) is a wholly owned subsidiary of Fujitsu Laboratories (Japan)

FLA was established on April 20, 1993Location: Sunnyvale, California~ 100 employees

Page 2: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

The QuestionThe Question

Optical or Electrical?

The goal of the presentation is not“optical or electrical”

---but rather current board-level

optical interconnect (OI) technologies and related challenges

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Optical Interconnects on Roadmaps and ProjectionsOptical Interconnects on Roadmaps and Projections

Sources: JIEP, ITRS, iNEMI, Intel, HP, … and many more out there

Page 3: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

2005 iNEMI Backplane Substrate Implementation Plan 2005 iNEMI Backplane Substrate Implementation Plan

Source iNEMI (International Electronics Manufacturing Initiative)

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

JIEP Optical Packaging RoadmapJIEP Optical Packaging Roadmap

Source: JIEP (Japanese Institute of Electronic Packaging)

Page 4: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

1st Wave of Optical Interconnect Development 1st Wave of Optical Interconnect Development

Success story: 1st optical backplane deployed in a large-scale telecommunication platform or supercomputer was deployed in 1994 by AT&T in DACS Vi-2000 digital access and cross-connect system. From ECTC 1993 by Grimes et al.

155 Mbps

For telecom market was OK

BUT, no broad electronics market was ready to adapt optical boards at that point

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

General Interconnection Hierarchy General Interconnection Hierarchy

Table Source: IBM

Optical interconnect deployment boundary

Optical Interconnect R&D

Page 5: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Why electrical may not solve all needs?Why electrical may not solve all needs?

Source: OIDA (Optoelectronics Industry Development Association)

ITRS projection for signaling speed and number of I/O for a CPU

FR4 losses as a function of frequency(Source: Davidson, Sun Microsystems, OIDA meeting 2004)

Plus:• limited wiring density• X-talk• Impedance control and matching • Connectors cost and reliability• Etc., etc., etc.

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Why electrical may ultimately solve all needs?Why electrical may ultimately solve all needs?

New low-k dielectric Smoother Cu lines Minimizing conductor lengthEqualization and preemphasisMulti-level encodingand other bright ideas …

Source: iNEMI

But all these leads to cost increase ! …..In meantime, optical components become less expensive …Will we witness the crossovercrossover …?

Page 6: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Optical Interconnect TechnologiesOptical Interconnect Technologies

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

What’s good about Photons?What’s good about Photons?

Propagate in optical materials with ~0.6-0.7c

Don’t have RC delays

No impedance matching necessary

Can propagate with low losses (<0.05 dB/cm) in waveguides < 5x5 µm in cross-

section

Have minor interaction and x-talk at ~10 µm line spacing

Photons with different wavelengths (λ) can propagate in one waveguide without

interaction

Thus, wavelength division multiplexing (WDM) is possible.

In telecom, 40 λ-channels per fiber transmission is commercialized and >1 Tb/s

per channel transmission was demonstrated

Page 7: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

What is Optical Waveguide?What is Optical Waveguide?

Light propagation in optical fibers

Waveguide is a planar versionof optical fiber

And can be fabricated with standard microelectronics integration technologies

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

What do we need to make transition to optical backplanes?What do we need to make transition to optical backplanes?

Page 8: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Transition from Electrical to Electro-Optical BackplaneTransition from Electrical to Electro-Optical Backplane

Standard electronic packageOptical Backplane

Fabrication of additional lightguiding layer on PCBAssembly (Integration) of Tx and Rx on linecardsLight coupling to lightguiding layer through optical

jumpers with connectors

Source: “Microelectronic Packaging Handbook”

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Technology Blocks RequiredTechnology Blocks Required

High speed transmitters Tx

High speed receivers Rx

Embedded low-loss waveguides on boards

In-plane optical turns

Out-of-plane optical turns

Optical connectors for light coupling

Optical Jumpers

Page 9: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Transmitters: VCSELs (Vertical Cavity Surface Emitting Lasers)Transmitters: VCSELs (Vertical Cavity Surface Emitting Lasers)

VCSELs - most popular light sources for OI nowGrown epitaxially from III-V materials on wafer levelTypical wavelengths: 850 and 980 nmVCSELs with λ=1.3-1.5 µm are available10 Gb/s are commercial, up to 20 Gb/s in research

Source: Fuji Xerox, Ulm Photonics

VCSEL structure

Source: Fuji Xerox

10 Gb/s, 850nm multi-mode VCSEL

VCSEL arrays

Open Questions:VCSEL reliability (getting better)Max speed maybe 20 Gb/s, for reasonable cost (?)LatencyPower/thermal managementCost

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Alternative Transmitters for OI in ResearchAlternative Transmitters for OI in Research

External ModulationSi PhotonicsElectronic-Photonic IC (EPIC)

External Modulation of CW light source

Intel’s solution for Si-based transceiver.“In 2005, Intel researchers further demonstrated that this silicon modulator is capable of transmitting data up to 10 gigabits per second (Gbps).”

Source: Intel

Page 10: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

High Speed ReceiversHigh Speed Receivers

For 850 nm both Si and InGaAs detectors can be usedSi PIN is less expensive but has lower responsivity and bandwidthFor 1310 and 1550 InGaAs detectors are usedInGaAs PIN can support up to 40 Gb/s transmissionSiGe detectors are in research to replace InGaAs in Si photonics

Bit Error Rate (BER) is strongly dependent on the optical signal intensity at the detector Thus, low total insertion loss of the module is crucial!

Schematic of PIN photodiode

Spectral response of different diodes

1.5 Gb/s optical link BER vs. received optical powerWang et al. JLT v. 22, p. 2158, 2004

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Optical BoardsOptical Boards

Page 11: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Optical BoardOptical Board

Photonic components of optical boards:Polymer waveguidesPlanar light deflection elementsVertical light deflection

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Polymer Optical WaveguidesPolymer Optical Waveguides

Different fabrication techniquesTypical dimensions 30-50 µmThe dimensions can go down to 5 µmExpected propagation losses <0.1 dB/cmHigh thermo-mechanical stabilityIntegration compatible

Can be embedded on boards or fabricated separately and then laminated

Page 12: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Polymer Waveguide Fabrication TechnologiesPolymer Waveguide Fabrication Technologies

Photolithography

Hot embossing

Direct laser writing

Etching

Laser ablation

Injection molding

Diffusion and ion exchange

and some other more exotic processes

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Polymer Materials for OI Waveguide FabricationPolymer Materials for OI Waveguide Fabrication

Low absorption lossRefractive Index stability Refractive Index variabilityPhotopatternable for lithographyAdhesion to various materialsSurface planarizationThermal stabilityLow water uptakeLow stressCTE matchTemperature compatibility with FR4 processingViscosity adjustment for thickness controlAnd so on ….

Source: L. Eldada, Dupont Photonics

Some optical polymers - candidates for waveguide fabrication

Short list of requirements

Page 13: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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From Si to FR4: Surface Roughness PlanarizationFrom Si to FR4: Surface Roughness Planarization

FR4 surface roughnessλ = 0.85-1.55 mm !!!

After polymer planarization at the bottom cladding layer

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Direct Polymer PhotolithographyDirect Polymer Photolithography

Source: Acreo

In general, litho waveguides have the lowest losses

Polymer should be photopatternable

Curing T comparable with PCB processing

Adhesion to substrate and metal is critical

Boards up to 1 m in size are possible

Litho Process flow

Page 14: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Some Results on Photolithographic WaveguidesSome Results on Photolithographic Waveguides

25 cm long board with 50 µm core waveguides

Waveguide propagation loss measurements @ 850 nmwith different polymer materials

with Rohm & Haas

Propagation losses of 0.05 or 0.2 dB/cm have a significant effect on the board performance

For waveguide length 1 m:Propagation loss of 0.05 dB/cm → 5 dB excess lossPropagation loss of 0.2 dB/cm → 20 dB excess loss

This may increase BER by >1010

0

0.05

0.1

0.15

0.2

0.25

PolymerA

PolymerB

PolymerC

PolymerD

PolymerX

Pro

paga

tion

Loss

[dB

/cm

]

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Polymer Wavelength Dependence and AvailabilityPolymer Wavelength Dependence and Availability

Source: Fraunhofer Institut fuer Silicatforschung

Bulk material absorption of different polymersas a function of the light wavelength

0

0.05

0.1

0.15

0.2

0.25

PolymerA

PolymerB

PolymerC

PolymerD

PolymerX

Pro

paga

tion

Loss

[dB

/cm

]

“Almost” commercialized

Vendors don’t sell the materialsSell only test quantities$$$

Fully commercialized

Page 15: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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EmbossingEmbossing

Waveguide propagation losses measured at 850 nm

0.00

0.02

0.04

0.06

0.08

0.10

0.12

0.14

#1 #2 #3 #4 #5 #6 #7 #8 #9 #10 #11 #12Channel

Pro

paga

tion

loss

es [d

B/c

m]

Flexible film with 50x50 µm waveguides with 250 µm pitch fabricated by hot embossing process Embossing process flow

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Routing Complexity for High Density InterconnectsRouting Complexity for High Density Interconnects

To enable flexible dense routing architectures the waveguides should cross

Good news: Lightguides can crossBad news: Crossings cause excess losses

0.000

0.010

0.020

0.030

0.040

0.050

0.060

90 deg 60 deg 45 deg 30 deg

Crossing Angle

Loss

per

Cro

ssin

g [d

B]

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3D routing3D routing

3D routing in waveguiding layer is needed

Good news: Some waveguides still can be crossed

Bad news: Light does not turn around 90º corners, it needs mirrors

3D includes lateral and vertical bends

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

In-plane Light Deflection: Bends and Mirrors In-plane Light Deflection: Bends and Mirrors

0

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

0.18

0.2

40 mm 20 mm 10 mm

Bend Radius

Pro

paga

tion

loss

[dB/

cm]

Channel 1Channel 2Channel 3Channel 4Channel 5Channel 6Average

In-plane waveguide bends with bending radius R

0

10

20

30

40

50

60

70

80

90

100

0 2 4 6 8 10 12

Bending Radius [mm]

Exc

ess

Loss

[dB

]

0.70%

0.80%

0.90%1.00%

45° lateral mirrors allow compact light turning

Come for “free”, i.e. litho definedTypically, have losses >0.5 dB/turnMore advanced mirror shapes are possible for

lower losses

45° lateral mirrors

Page 17: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Vertical Light DeflectionVertical Light Deflection

Basic requirements for vertical mirrors:Symmetric for in and out couplingTurning light up and downPrecise mirror plane positioning control ( ± 2-3 µm) for 20-30 µm WGHigh reflectivity (80-90%)Full integration with waveguides

Possibility of multilayer 3D structures

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

45° Mirror Fabrication Techniques in Polymers45° Mirror Fabrication Techniques in Polymers

Dicing

Laser ablation

Direct grey-scale lithography

Blade cut

RIE

Tilted exposure

Page 18: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Laser Ablation and Grey-scale LithoLaser Ablation and Grey-scale Litho

Laser Ablation

Mirrors with low losses (0.2-0.5 dB) were

demonstrated

Feasible, but not very practical for integration

Especially for multilayer integration

Very narrow processing windowThe process is difficult for manufacturing

Gray scale lithography

0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

0 0.2 0.4 0.6 0.8 1

Normalized Film Thickness

Opt

ical

Den

sity

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Fully Integrated Mirrors by “Wedge dicing”Fully Integrated Mirrors by “Wedge dicing”

Microdiced mirrors:With commercially available programmable

dicing tools; Lateral positioning precision better than 3-5 µm

relative to fiducial marks;Can be made turning up or downReflection losses:

Integrated mirrors: 0.5 dBTIR mirrors: 0.3 dBTIR with metals: 0.4 dB

Roughness can be further reducedWedges (top)

Wedges with waveguides (top)

Page 19: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Optical ConnectorsOptical Connectors

“Fiber coupler”adaptor

“Microlens”adaptor

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Connector AssemblyConnector Assembly

With fine alignment-pins placement tolerances < 10 µmare possible.

However, more relaxed tolerances are always beneficial for they reduce the assembly and connector cost

Fabrication of boards up to 25 cm was demonstrated

For light transmission glass or plasticoptical fiber (POF) ribbons or flexiblewaveguide films can be used.

MTP connectors with up to 72 channels

Source: US Conec

250 mm

Page 20: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

10+ Gb/s Transmission Testing10+ Gb/s Transmission Testing

No significant jitter increase is observed

Open eye is measured up to 12.5 Gb/s (Tx limited)

BER<10-12 was measured on 25 cm boards

Optical jumpers

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Chip-to-Chip Optical InterconnectsChip-to-Chip Optical Interconnects

Light coupling schemes for chip on board surface mountIn chip-to-chip board level OI the board also contains embedded waveguides with integrated mirrors, so the board fabrication is very similar.

However, instead of connector assembly we have to deal with chip assembly and alignments.

Page 21: Enabling Technologies for Board-Level Optical Interconnectsewh.ieee.org/soc/cpmt/presentations/cpmt0601.pdf · Enabling Technologies for Board-Level Optical Interconnects Alexei L

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Future ….Future ….

“The future of optical components technology will be determined by electronic-photonic convergence and short-reach (< 1km) interconnections. Needless to say, this path requires significant technological development.”

“Electronics-photonics must converge”

“The roadmap's conclusion was that III-V materials have typically led in terms of performance; silicon has followed with its trend towards high-volume low-cost manufacturing; and organics have greatest potential for supporting hybrid integration and packaging.”

40 companies and universities concluded

from Optics.org

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

Some Additional LiteratureSome Additional Literature

D. A. B. Miller “Rationale and Challenges for Optical Interconnects to Electronic Chips”, Proc. IEEE, v. 88, p. 728 (2000)M. W. Haney, H. Thienpont, T. Yoshimura, “Introduction to the issue on optical interconnects”, J. Select. Topics Quant. Electron., vol. 9, p. 347-349 (2003); and other papers in the volume.Agarwal et al. “Latency reduction in optical interconnects using short optical pulses”, J. Select. Topics Quant. Electron., vol. 9, p. 410 (2003)Cho et al. “Power consumption between high speed electrical and optical interconnects for interchipcommunication”, J. Lightwave Technology, v. 22, p. 2021 (2004)Huang et al. “Optical Interconnects: Out of the box forever?”, J. Select. Topics Quant. Electron., vol. 9, p. 614 (2003)L. Eldada, “Polymer integrated optics: promise vs. practicality,” Proc. SPIE, vol. 4642, p. 11 (2002)T. Yoshimura et al, “Self-organized lightwave network based on waveguide films for 3D optical wiring within boxes,” J. Lightwave Technol., vol. 22 , p. 209 (2004)“Handbook of Optical Interconnects” edited by S. Kawai, Taylor & Francis (2005)“Selected papers on optical interconnects and packaging”, SPIE milestone series, volume MS 142, editor S. H. Lee (1997)Glebov et al., “Optical Interconnect modules with fully integrated reflector mirrors”, IEEE Phot. Tech. Lett., v. 17, p. 1540 (2005)Glebov et al. “Backplane photonic interconnect modules with optical jumpers”, Proc. SPIE, v. 5731, p. 63 (2005)

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[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

AcknowledgementsAcknowledgements

Thanks to my colleagues(alphabetically)

David KudzumaJames Roman

K.-C. LiuKishio Yokouchi

Lidu HuangMasayuki Kato

Michael LeeMichael PetersShigenori Aoki

[email protected] Fujitsu Laboratories of America ● Sunnyvale ● CA

… and thank you!