EEE1016 Electronics I - Faculty of Engineeringfoe.mmu.edu.my/v3/lab/lab sheet/TRIM1/BETA/EEE1016-BE1... · 2015-08-03 · EEE1016 Electronics I Experiment BE1: ... Another wave shaping

EEE1016 Electronics I: Appendices

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EEE1016 Electronics I

Experiment BE1: Diode Circuits

1.0 Objectives

To observe the operations of a half-wave rectifier and a full-wave bridge rectifier

To observe the effects of shunt capacitance and load resistance on the outputs of

various rectifier circuits

To observe the operations of several diode clipping circuits

To observe the operation of a diode clamping circuit

2.0 Apparatus

“Diode and Transistor Circuits” experiment board

DC Power Supply

Dual-trace Oscilloscope

Function Generator

Digital Multimeter

Connecting wires

3.0 Introduction

The p-n junction diode is the most common type of solid-state device. One side of the

p-n junction is a p-type semiconductor and another side is an n-type semiconductor. The p-

type end is the anode while the n-type end is the cathode. The conceptual structure, the

typical appearance, and the schematic symbol of a diode are shown in Figure 1. When the

potential applied to the cathode is more positive than that at the anode, the diode is said to be

in the reversed bias condition. Ideally, no current can flow through the device. When the

voltage at the anode is more positive than that at the cathode, this condition is called forward

bias. Figure 2 shows the typical I-V characteristic of a diode. If the forward bias voltage is

less than a threshold value, known as the cut-in voltage V, the current flowing through the

diode is very small. As soon as the applied voltage gets above this cut-in voltage, the current

will rise rapidly. This cut-in voltage is approximately 0.2 V for a germanium diode and 0.6 V

for a silicon diode.

Figure 1 Figure 2

cathode anode

typical shape

anode cathode

circuit symbol

p n anode cathode

conceptual structure

V

I(mA)

V

1

2

3

V

mA



Consider a silicon diode that is connected in series with a 1 k resistor, as shown in

Figure 3. When a battery voltage of 3 V is applied, the diode is forward-biased and an electric

current will start to flow in both the diode and the resistor. The voltage across the resistor will

rise to a value VR = IR which is slightly lower than 2.4 V. The current is limited to 2.4 mA

(= 2.4 V/1 k). This voltage will not rise above 2.4 V because otherwise the voltage across

the diode will become lower than 0.6 V, which will then put the diode into a “high

resistance” state that will allow only a very small current to flow in the circuit. Therefore, in

the analysis of a diode circuit, we can usually assume the voltage across a silicon diode to be

0.6 V, provided that the voltage source in the circuit is higher than 0.6 V and the polarity is to

bias the diode in the forward direction (forward biased). The diode acts like a switch that is

turned on. If the polarity is reversed, the diode will be reverse-biased and no current can flow

in the circuit. In this condition, the diode acts like a switch that is turned off. As a result, the

voltage across the resistor will become zero (since I = 0).

3V1 k

+

-

VR

+ -

0.6V

I

Figure 3

Due to the unidirection characteristic of the device, a diode can be configured as a

rectifier that allows current flow for only half a cycle of an AC waveform. A half-wave

rectifier circuit is shown in Figure 4. When the potential at point A is more positive than that

at point B, i.e. the supply voltage VS is positive, the diode is forward-biased. The voltage

across the resistor will have the same waveform as the supply voltage VS (minus away 0.6V,

to be exact). In the second half cycle, the voltage at A becomes negative, so the diode is

reverse-biased. The voltage across the resistor will be zero throughout this half cycle. As a

result, a half-wave waveform is obtained at the resistor. As the current flows only in the X-to-

Y direction, therefore a direct current is obtained from the AC source.

R

+

-

Vo

X

Y

A

B

+

-

VS

AC voltage

Figure 4

Since the above diode circuit operates only for half a cycle, the efficiency is low. A

bridge-rectifier circuit constructed using 4 diodes, as shown in Figure 5, can be used to

double the efficiency. In the first half cycle of an AC waveform, diodes D1 and D2 are turned

on while D3 and D4 are off. Current flows from X to Y. In the second half cycle, when the

potential at point B is more positive than point A, diode D3 and D4 are on while D1 and D3

are turned off. Current flows from X to Y again. Since there is always a current flow during

both the positive cycle and the negative cycle, a rectified full-wave waveform is obtained, as

v

t

V S

V o

2

V m



shown in Figure 5. Note that there is 1.2 V (=2×0.6 V) lost in Vo because 2 diodes conduct in

series.

Figure 5

A rectifier circuit is usually used to convert an AC voltage into a DC voltage. A

transformer can be connected to the 240 V AC mains supply at the wall outlet to step down

the voltage to a desired level. The large ripples in the half-wave and full-wave rectified

waveforms can be suppressed using a capacitor filter connected in parallel with the load

resistor (see Figure 6). This provides a more stable DC voltage, comparable to a battery, for

operating an electronic system. However, the ripple cannot be totally eliminated. The

amplitude of the residual ripple depends on the size of the capacitor and the load resistance.

If the load resistance is small, a large capacitance is required to obtain a DC source with

acceptably small ripples.

Figure 6

Diodes can also be used to change the shape of an AC waveform. The circuits in

Figure 7 are known as the clipping circuits. The diodes are turned on for only the period of

time when the AC voltage is at least 0.6 V higher than the reference voltage, Vref. During this

period, a current flow through the diode and the voltage across the diode is about 0.6 V. As a

result, part of the output AC waveform, Vo, is clipped off.

+-

R

+

-

Vo

Vref t2

Vref

+V

VS

Vo

+

-

VS

+-

R

+

-

Vo

Vref t2

Vm-V

VS

Vo

+

-

VS V

ref

Figure 7(a)

Figure 7(b)

RL

Vo

+

-

VS=nV

msint

n:1

D1

D2

A

B

X

Y

D3

D4

RL

Vo

+

-

CVi

vo

t

Vm

on off

input

on off

T=1/ft1

t2

V1

v o

t

V m

D 1 & D

2

on

D 3 & D

4

on

D 1 & D

2

on

Vm

V1

Vref - Vγ

Vm - Vγ

Vref



Another wave shaping circuit, as shown in Figure 8, is the clamping circuit. The

capacitor is fully charged to the peak voltage of the AC source when the diode is forward-

biased. (For simplicity, we have assumed the forward voltage drop of the diode is negligible.)

As the diode acts like a switch that is turned on, the output voltage taken across the diode is

zero when the AC waveform is at its peak. As soon as the AC voltage falls below the peak

value, the diode becomes reverse-biased by the voltage sum of the transformer and the

capacitor which is a negative value. The resulting waveform is an AC waveform that is

“clamped” down below zero volt. If the 0.6 V forward voltage drop of the diode is

considered, the capacitor is charge to (Vm – 0.6) V and the average value of Vo is – (Vm – 0.6

) V. The Vo peak voltage is 0.6 V above zero volt.

~

C+

-

VoV

S

t

Vm

VS

Vo

-Vm + 0.6

Figure 8

Instructions

The lab is divided into two parts: Part A Theoretical Prediction and Part B Experiment.

Read through both parts carefully, attempt and prepared for all the questions in both parts.

Students must complete the theoretical predictions before attending the corresponding lab

session. During the processes of theoretical predictions, students should attempt to

understand the purposes of the experiments. The Short Report Form for Part A has to be

submitted to the Lab’s technician at least two days before the scheduled lab session. The

instructor will check your predictions and then return it back to you during your lab session.

Use the predicted results to verify your measured data. Students are required to submit the

Short Report Form for Part B, attached with Short Report Form for Part A

immediately after the lab session.

Cautions

Oscilloscope: Make sure the INTENSITY of the displayed waveforms is not too high,

which can burn the screen material of the oscilloscope.

Function generator: Never short-circuit the output (the clip with red sleeve), which may

burn the output stage of the function generator.

Sketching oscilloscope waveforms on graph papers

Refer to Appendix D for efficient waveform sketching.

Factors affecting your experiment progress

Your preparation before coming to the lab (your understanding on the theories, the

procedures and the information in the appendices; your planning to carry out the

experiments and to take data), attempt all questions before the lab.

Your understanding on the functions and the operations of the equipment (Your learning

on using the equipment during the Induction Program Lab Session; your understanding on

checking and presetting the equipment)

The technique you use to sketch waveforms on graph papers



Part A: Theoretical Predictions

For the cases where VS is a sinusoidal voltage source, apply VS = 10 sin (2×10000t) V.

4.1 Half-wave Rectifier 1. Use diode forward voltage drop of 0.6 V, predict the maximum currents flow through the

diode D1 (ID, max) in the circuit of Experiment 4.1, if R3 = 18 k and 10 k. Record the

values in Table T4.1 of the Short Report Form provided.

2. From Appendix E, find the more exact values of the diode forward voltage drops (VF) at

the corresponding maximum currents.

3. Predict the maximum Vo voltages (Vo, max) for both cases.

4. Predict the minimum Vo voltage (Vo,min).

4.2 Full-wave Rectifier

1. Use diode forward voltage drop of 0.6 V, predict the maximum currents flow through the

diodes (ID, max) in the circuit of Experiment 4.2, if R3 = 18 k and 10 k. Note that two

diodes conduct at a time. Record the values in Table T4.2.


the corresponding maximum currents.

3. Predict the maximum Vo voltages (Vo, max) for both cases.

4. Predict the minimum Vo voltage (Vo, min).

4.3 Clipping Circuits

1. Use diode forward voltage drop of 0.7 V when VS = 5 to 10 V, 0.65 V when VS = 2 to 4

V and 0.6 V when VS = 1 V, predict the currents flow through the diode (ID) in Procedure

1 of Experiment 4.3 when VS = 1, 2, 3, 5, 10 V. Record the values in Table T4.3 (a).


the corresponding diode currents. (Note for more precise results, iteration is required.

Iteration: start with a VF to calculate ID and then find new VF. Use this new VF value to

calculate ID and find another new VF. The process is repeated until subsequent VF values

are about the same.)

3. The set of values predicted in the above steps 1 and step 2 can be used to compare with

the sketched waveform in the experimental Procedure 2 of Experiment 4.3. Note in this

case VF = Vo.

4. Predict the minimum Vo voltage (Vo,min).

5. Hence, you have known that the dependence of VF on ID. For simplicity, use fixed VF =

0.7 V to predict Vo, max and Vo¸ min for Procedure 4, Procedure 6 and Procedure 8 of

Experiment 4.3 for VDC = 0, 2, 4, 6 V. Note that the largest ID in Procedure 8 is (16 –

0.7)/1k = 15.3 mA. Record the values in Table T4.3 (b), Table T4.3 (c) and Table T4.3

(d), respectively.

4.4 Clamping Circuit

1. With fixed VF = 0.7 V, predict Vo, max and Vo¸ min for Procedure 1 of Experiment 4.4 for

VDC = 0, 2, 4, 6 V. Record the values in Table T4.4.



Part B: Experiments

4.0 Diode test

Procedures

Referring to the circuit board layout in Appendix A, without any connections, test all the

diodes on the board by using the go/no-go testing method.

1. Set a multimeter in “diode test” mode (note that some multimeters need to push in two

buttons together to set “diode test” mode as indicated on the control panel). The “COM”

terminal is negative “–“ and the “V, , mA” terminal is positive “+”.

2. Test the diode D1 on the board in forward-biased condition, i.e. connect “+” terminal to

anode the and “–“ to the cathode. A good diode will give forward voltage drop of about

0.7 V or 700 mV. Record the reading in Table E4.0.

3. Repeat Procedure 2 for other diodes.

Equipment Setups for Experiments 4.1 to 4.4 (Refer to Appendix C for brief information

or the Induction Program Lab Sheets for more information)

1. Before starting the experiment, check and verify that the equipment (oscilloscope and

function generator) to be used is functioning properly, including voltage probes [see

Appendix B].

2. Set the vertical sensitivities of CH1 and CH2 of the oscilloscope to 5 V/div. Set the

horizontal (time base) sensitivity to 20 s/div. Make sure the variable knobs of Volt/div

and Time/div at the calibrated (CAL’D) positions. Set the input couplings (AC/GND/DC

switches) of CH1 and CH2 to DC. Set the vertical mode to dual waveform display. Set

the trigger source to CH1 and the triggering mode/coupling to AUTO. [For other

presetting, refer to Appendix C]

3. Set the function generator for a 10 kHz sine wave with 10 V amplitude. Check the

waveform using the oscilloscope.

4. Connect the sine wave signal to terminals P1 - P2 (grounded at P2). See the circuit board

layout in Appendix A.

5. Connect a probe from CH1 of the oscilloscope to P1 – P2 (grounded at P2).

6. Connect the second probe from CH2 to T9 - P5 (grounded at P5).

7. Carry out the following experiments with these setups.

4.1 Half-wave Rectifier

Procedures

1. Using the circuit board provided, construct the circuit as shown below by connecting T1

to TA5, T2 to TA6, T7 to TA17, T8 to TA18, and T3 to T4.

signal

in

signal

ground

+

–

VS

R3

+

–

VO

D1

oscilloscope

ground

+

–

VI

1 : 1

2. Align the ground levels of CH1 and CH2 as indicated in Graph E4.1 (a). Finely adjust the

function generator frequency so that CH1 waveform (VI) has period of 5 divisions (5 div

x 20 s/div = 100 s which is approximately equal to 1/fgen, where fgen is the frequency



reading displayed on the function generator). Adjust the oscilloscope trigger level and the

CH1 horizontal position so that CH1 waveform has peaks at the positions as shown in

Graph E4.1 (a). This step is important for Vo waveform to be drawn with respect to VI

waveform. Keep the oscilloscope ON all the time because it needs to be warmed up.

3. Sketch the CH2 waveform (Vo) displayed on the oscilloscope on Graph E4.1 (a). Do not

move the waveform positions during the sketching. Measure the maximum and the

minimum voltages of CH2 waveform (Vo, max and Vo, min) and record them in Table E4.1

(under column header: Procedure 3). Calculate the ripple voltage, Vo,r = Vo, max – Vo,min.

4. Repeat Procedure 3 for the following conditions at the rectifier output. Sketch the

required Vo waveforms on their corresponding graphs and record all the respective Vo, max

and Vo, min in their corresponding columns in Table E4.1.

(i) C3 (10 nF) and R3 (18 k) in parallel (sketch Vo waveform)

(ii) C3 and R2 (10 k) in parallel

(iii) C2 (470 pF) and R3 in parallel (sketch Vo waveform)

(iv) C3 alone

(v) C2 alone (sketch Vo waveform)

Ask the instructor to check your results. Show all the sketched waveforms, Table E4.1

readings and the waveforms of Procedure 4 (v) displayed on the oscilloscope.

4.2 Full-wave Rectifier

Procedures

1. Construct the circuit as shown below.

D3 D4

D5 D6

+

–

VS

R3

+

–

VO

oscillascope

signal

in

signal

ground

ground

+

–

VI

1 : 1

2. Align the channel ground levels. Adjust and align the CH1 waveform as mentioned in

Procedure 2 of Experiment 4.1.

3. Sketch Vo waveform displayed on the oscilloscope on Graph E4.2 (a). Measure Vo, max

and Vo, min and record them in Table E4.2. Calculate Vo,r = Vo, max – Vo,min.

4. Repeat Procedure 3 for the following conditions at the rectifier output. Sketch the

required Vo waveforms on their corresponding graphs and record all the respective Vo, max

and Vo, min in their corresponding columns in Table E4.2.

(i) C3 (10 nF) and R3 (18 k) in parallel (sketch Vo waveform)

(ii) C3 and R2 (10 k) in parallel

(iii) C2 (470 pF) and R3 in parallel (sketch Vo waveform)

(iv) C3 alone

(v) C2 alone (sketch Vo waveform)


readings and the waveforms of Procedure 4 (v) displayed on the oscilloscope.

oscilloscope



4.3 Clipping Circuits

Procedures

1. Construct the circuit as shown below.

+

–

VS

signal

in

signal

ground

1k

D

+

–

VO

oscillascope

+

–

VI

1 : 1


Procedure 2 of Experiment 4.1. Sketch Vo waveform displayed on the oscilloscope on

Graph E4.3 (a) and label the waveform with VDC = 0 V. Record Vo,max and Vo,min in Table

E4.3 (a) under VDC = 0 V column.

3. Set the DC Power Supply to 0 V. Set the current scale switch to LO (if any). Set the

current adjustment knob to about ¼ turn from the min position. Make sure that the

negative terminal of the DC power supply is not connected to the ground.

4. Switch off the DC power supply and connect it to the circuit as shown below.

+

–

VS

signal

in

signal

ground

D

+

–

VO

oscillascope

DC+

–

1k

+

–

VI

1 : 1

VDC

5. Switch on the DC power supply. Set it to VDC = 2 V (measured by a multimeter accurate

to 0.1 V). Sketch Vo waveform on Graph E4.3 (a). Record Vo, max and Vo,min in Table E4.3

(a). Repeat for VDC = 4 V and 6 V (accurate to 0.1 V). Label the waveforms.

6. Switch off the DC power supply. Construct the circuit as shown below.

+

–

VS

signal

in

signal

ground

D

+

–

VO

oscillascope

DC+

–

1k+

–

VI

1 : 1

VDC

7. Switch on the DC power supply. Set it to VDC = 0 V (turn the voltage knob of the power

supply to the minimum position and then short the power supply output with a wire).

Sketch Vo waveform on Graph E4.3 (b). Record Vo, max and Vo,min in Table E4.3 (b).

Repeat for VDC = 2, 4 and 6 V (accurate to 0.1 V). Label the waveforms.

8. Switch off the power supply and reconnect it to the circuit as shown below.

+

–

VS

signal

in

signal

ground

D

+

–

VO

oscillascope

DC–

+

1k+

–

VI

1 : 1

VDC

oscilloscope

oscilloscope

oscilloscope

oscilloscope



9. Switch on the DC power supply. Sketch Vo waveforms on Graph E4.3 (c) for VDC = 0, 2,

4 and 6 V (accurate to 0.1 V). Label the waveforms. Record Vo, max and Vo,min in Table

E4.3 (c).

Ask the instructor to check your results. Show all the sketched waveforms, table

readings and the oscilloscope waveforms of Procedure 9 for VDC = 6 V.


Procedures

1. Make sure that the DC power supply is off. Construct the circuit as shown below.

+

–

VS

signal

in

signal

ground

10nF

+

–

VO

oscillascope

DC+

–

D+

–

VI

1 : 1

VDC


Procedure 2 of Experiment 4.1. Sketch Vo waveforms on Graph E4.4 for VDC = 0 V and 2

V (accurate to 0.1 V). Label the waveforms. Record Vo,max and Vo,min in Table E4.4.

3. Record also Vo, max and Vo, min when VDC = 4 V and 6 V. Calculate the peak-to-peak

voltages of Vo waveforms, Vo, pp = Vo, max – Vo,min.


readings and the oscilloscope waveforms of Procedure 3 for VDC = 6 V.

Report Submission

Students are to submit the report Part A and Part B together, immediately upon completion

of the laboratory session.

End of Lab Sheet

oscilloscope


Faculty of Engineering, Multimedia University Appendix A

APPENDICES

APPENDIX A: Circuit Board Layout

D3

D4

D5

D6

C2

C3

R2

R3

D2

R4

R1

C1

D1

P1

P2

P3

P4

T1

T2

TA

9

T3

T5

T7

T9

T4

T6

T10

TA

11

TA

12

TA

13

TA

14

TA

15

TA

16

TA

17

TA

18

TA

19

TA

20

TA

21

T8

P7

P5

TA

1T

A2

TA

3T

A4

TA

5T

A6

TA

10

TA

7

TA

8P

6

P8

P9

R17

R18

TB

1

TB

2

P10

C5

R16

VA

R2

R15

R13

R11

TB

9

TB

10

TB

6P

12

R12 P11

TB

7

TB

8

R9

R10

TB

11

TB

14

TB

13

P13

P15

TB

12

P16

R14

TB

15

VC

C

VC

C

VC

C

P14

TB

3 GN

D

R5

R6

R8

R7

P17

P18

INP

UT

VC

C

GN

D

Q1

Q2

VA

R1

C6

Voltage S

ourc

e

TB

4

TB

5

R1

=1

k

R2

=1

0k

R3

=1

8k

R4

=1

k

C1

=1

0n

F

C2

=4

70

pF

C3

=1

0n

F

R5

=1

20

k

R6

=2

.7k

R7

=1

k

R8

=3

9k

R9

=3

9k

R1

0=

1k

R1

1=

2.7

k

R1

2=

10

k

R1

3=

11

0k

R1

4=

10

0

R1

5=

15

0k

R1

6=

18

k

R1

7=

1k

R1

8=

10

0

VA

R1

=1

0k

VA

R2

=5

00

k

C4

=0

.1F

C5

=0

.1F

DIO

DE

CIR

CU

IT

TR

AN

SIS

TO

R C

IRC

UIT

Invert

ing A

mplifier

C6

=4

7F

C4

Circuit diagram improved by twhaw Apr 2002

EEN1016 Electronics I: Appendices

Faculty of Engineering, Multimedia University Appendix B

APPENDIX B

EQUIPMENT CHECKS

The go/no-go method of testing is used. Always do these checks before starting your

experiment.

Oscilloscope voltage probe check

Use oscilloscope calibration (CAL) terminal. A good probe will give a waveform of positive

square wave with 2 V peak-to-peak and about 1 kHz.

Oscilloscope channel check

Use oscilloscope calibration (CAL) terminal and a good voltage probe. A good input channel

will give the corresponding waveform of the CAL terminal.

Function generator check

Check the output waveform by oscilloscope. A good function generator will give a stable

waveform on the oscilloscope screen. Caution: Never short-circuit the output to ground,

this can burn the output stage of the function generator.

The Resistor color code chart

ABC

AB x 10C pF

.abc

0.abc F

Capacitance

Potentiometer


Faculty of Engineering, Multimedia University Appendix C

APPENDIX C

OSCILLOSCOPE INFORMATION

Below are the functions of switches/knobs/buttons:

INTENSITY knob: control brightness of displayed waveforms. Make sure the intensity is

not too high. FOCUS knob: adjust for clearest line of displayed waveforms.

TRIG LEVEL knob: adjust for voltage level where triggering occur (push down to be

positive slope trigger and pull up to be negative slope trigger).

Trigger COUPLING switch: Select trigger mode. Use either AUTO or NORM.

Trigger SOURCE switch: Select the trigger source. Use either CH1 or CH2.

HOLDOFF knob: seldom be used. Stabilize trigger. Pull out the knob is CHOP operation.

This operation is used for displaying two low frequency waveforms at the same time.

X-Y button: seldom be used. Make sure this button is not pushed in.

POSITION (Horizontal) knob: control horizontal position of displayed waveforms. Make

sure that it is pushed in (pulled up to be ten times sweep magnification).

POSITION (vertical) knobs: control vertical positions of displayed waveforms. Pulled out

CH1 POSITION knob leads to alternately trigger of CH1 and CH2. Pulled out CH2

POSITION knob leads to inversion of CH2 waveform.

Time base:

TIME DIV: provide step selection of sweep rate in 1-2-5 step.

VARIABLE (for time div) knob: Provides continuously variable sweep rate by a factor of 5.

Make sure that it is in full clockwise (at the CAL’D position, i.e. calibrated sweep rate as

indicated at the time div knob).

Vertical deflection:

VOLTS DIV: provide step selection of deflection in 1-2-5 step.

VARIABLE (for volts div) knob: A smaller knob located at the center of VOLTS DIV knob.

Fine adjustment of sensitivity, with a factor of 1/3 or lower of the panel-indicated value.

Make sure that it is in full clockwise (at the CAL’D position). Pulled out knob leads to

increase the sensitivity of the panel-indicated value by a factor of 5 (x 5 MAG state).

Make sure that it is pushed down.

AC/GND/DC switches: select input coupling options for CH1 and CH2. AC: display AC

component of input signal on oscilloscope screen. DC: display AC + DC components of

input signal on oscilloscope screen. GND: display ground level on screen, incorporate

with AUTO trigger COUPLING selection).

CH1/CH2/DUAL/ADD switch: select the operation mode of the vertical deflection. CH1:

CH1 operates alone. CH2: CH2 operates alone. DUAL: Dual-channel operates with CH1

and CH2 swept alternately. This operation is used for displaying two high frequency

waveforms at the same time.

Note: Keep the oscilloscope ON. The oscilloscope needs an amount of warm up time for

stabilization.

CAUTION: Never allow the INTENSITY of the displayed waveforms too bright. This can

burn the screen material of the oscilloscope.


Faculty of Engineering, Multimedia University Appendix D

CH2 Gnd

CH1 Gnd

5 ms/div, CH1: 10 mV/div, CH2: 2 V/div

Vin

Vout

CH1 Gnd

20 s/div, CH1: 5 V/div, CH2: 5V/div

Vin

CH2 Gnd

Vout

APPENDIX D

Sketching oscilloscope waveforms on graph paper

Sketch is a quick drawing technique without loss of important or interested information of

the waveforms being sketched. Hence, the important or interested points of a waveform as

displayed on the oscilloscope screen will be marked first on a graph paper before the

waveform is sketched.

Procedures

1. Set suitable “time/div” and “V/div” to display the interested waveform portions. Often,

the required “time/div” and “V/div” are estimated first.

2. Mark & label channel ground level, normally at the vertical major grid position.

3. Mark the important/interested points.

4. Sketch the waveform by connecting the points together accordingly.

5. Label waveform labels (if more than one channel involved).

6. Write down “time/div” and “V/div”

Example 1:

A sinusoidal waveform is

amplified through an amplifier

with a delay network.

Interested points: maxima,

minima, points crossing

ground level, etc

Information retained: amplitudes,

peak-to-peak values, period,

phase shift, approximate

shapes of the waveforms

Note: The ground level is

important to indicate the values

of average, positive peak,

negative peak, turning points, etc.

Example 2:

Diode clipping circuit with 2.5 V

DC reference

EEN1016 Electronics I: BE1

Faculty of Engineering, Multimedia University Appendix E

APPENDIX E

Diode and BJT characteristics

Figure AE1: Forward voltage characteristics of diode 1N4148 (from National

Semiconductor data sheets)

Table AE 1: DC current gain hFE of 2N3904 at 25C (from Motolora data sheets)

Conditions (DC) hFE,min hFE,max

IC = 0.1 mA, VCE = 1.0 V 40 -

IC = 1.0 mA, VCE = 1.0 V 70 -

IC = 10 mA, VCE = 1.0 V 100 300

Figure AE 2: PSpice simulated output characteristics of 2N3904

V_Vce

0V 5V 10V 15V

IC(Q1)

0A

2.0mA

4.0mA

6.0mA

5 A

10 A

15 A

20 A

30 A

0.75mA

13V 15V 10.1V

6.5 A

EEN1016 Electronics I: BE1

Faculty of Engineering, Multimedia University Appendix E

Figure AE 3: Input resistance hie of 2N3904 at VCE = 10 V, f = 1 kHz and 25C (from

Motolora data sheets)

Figure AE 4: DC current gain hFE curves of 2N3904 at VCE = 1.0 V and various junction

temperature TJ (from Motolora data sheets)

Reading Log Scale Let the distance in a decade of the log scale in the figure below is measured as x mm. Since log101 = 0, it is take

as the origin (0 mm) in the linear scale. Then, the reading 10 is located x mm and the reading 0.1 is located at –

x mm. For reading y, it is located at [1og10(y)]*x mm.

Examples: Reading 2.5 is loacted at [1og10(2.5)]*x mm = 0.39x mm

Reading 0.25 is located at [1og10(0.25)]*x mm = -0.602x mm

Reversely, a point at z mm location is read as xz /10 .

Examples: 0.6x mm is read as 10(0.6x/x)

= 3.98

-0.3x mm is read as 10(-0.3x/x)

= 0.501

wosiew Mar 2004, wosiew Sep 2005

4.5k

0.75m

0.1 0.2 0.3 0.5 1 2 3 5 10

-x 0 x Linear scale

(mm)

Log scale

(unit) 0.25 2.5

0.39x -0.602x 0.6x

3.98 5.01

-0.3x

EEE1016 Electronics I, Experiment BE1 Student’s ID: _________________

1

EEE1016 Electronics I: Experiment BE1: Diode Circuits Student’s I.D.: _______________________________ Student’s Name: _____________________________ Major: ____________________ Group: ____________ Date: ______________

Marking Scheme:

Item Marks (BE1) Student’s mark

Part A: Theoretical Predictions 20

Part B: Experimental Results 40

Discussions and Conclusion 20

Rubrics Assessment 20

Total: 100

Note: Do take note that Part A is to be completed and submitted to the Supervisor prior to carrying out the experiment


2

Part A: Theoretical Predictions You must complete this part before proceeding to do EB1 Experiment 4.1 Half-wave Rectifier

Table T4.1: Predicted Vo, max of HW rectifier (2 marks)

ID, max (mA) VF (V) Vo, max (V)

18 k

10 k

Predicted Vo,min = __________V 4.2 Full-wave Rectifier

Table T4.2: Predicted Vo, max of FW rectifier (2 marks)

ID, max (mA) VF (V) Vo, max (V)

18 k

10 k

Predicted Vo,min = __________V 4.3 Clipping Circuits Table T4.3 (a): Predicted ID and VF of upper clipping circuit without VDC

(4 marks)

VS (V) 1 2 3 5 10

ID (mA)

VF (V)

Predicted Vo,min = __________V Table T4.3 (b): Predicted Vo, max and Vo, min of upper clipping circuit with VDC

(3 marks)

VDC (V) 0 2 4 6

Vo, max (V)

Vo, min (V)

Table T4.3 (c): Predicted Vo, max and Vo, min of lower clipping circuit with +VDC

(3 marks)

VDC (V) 0 2 4 6

Vo, max (V)

Vo, min (V)


3

Table T4.3 (d): Predicted Vo, max and Vo, min of lower clipping circuit with –VDC

(3 marks)

VDC (V) 0 2 4 6

Vo, max (V)

Vo, min (V)

4.4 Clamping Circuit Table T4.4: Predicted Vo, max and Vo, min of clamping circuit (3 marks)

VDC (V) 0 2 4 6

Vo, max (V)

Vo, min (V)

Note to the Instructor/ Sepervising Lecturer Please sign and stamp below to indicate that the student has completed Part A before the experiment is conducted

Sign & Stamp : ______________________________

Date : ______________________________

Remarks:

ID NO: ………………………………………………………………….…………………..

STUDENT'S NAME: ………………………………………………………………………………………

Criteria 1 (Need Improvement) 2(Satisfactory) 3(Good) 4(Excellent)

1 Understanding the operation of diode

applications; the half-wave and full-

wave rectifiers, the effects of shunt

capacitor, clipping circuits and

clamping circuits, by using the

experiment board.

Unable to understand the

theory behind each diode

application, and asking for

help.

Able to understand the

theory of each diode

application.

Have a good knowledge of

diode applications and their

characteristics.

Fully understand the theory and

operation of halfwave and

fullwave rectifiers, clippers and

clampers as well as explain the

behaviour using the experiment

board.

2 The ability in constructing the circuits of

diode applications.

Unable to construct the

circuits to demonstrate the

understand of diode

applications

Able to construct the

different circuits of diode

applications with minimum

supervision.

Able to construct different

circuits of diode applications

without assistance

Able to constrcut the different

circuits of diode applications

(rectifiers, clippers and clampers)

without assistance and the

expected results of the circuits.

3 The ability in using oscilloscope,

function generator, digital multimeter

and power supply.

Do not fully understand how

to use oscilloscope, function

generator, digital multimeter

and power supply.

Know how to use

oscilloscope, function


& power supply with minimal

guidance.

Know how to use the

oscilloscope, function


and power supply without

assistance.

Know and able to demonstrate to

others how each equipment is

used and set correctly.

4 The ability in collecting the measured

data from multimeter and oscilloscope,

and sketching the correct waveforms

from oscilloscope.

Unable to measure the

correct data and sketch the

correct waveforms.

Able to measure the correct

data and sketch the correct

waveforms with minimal

guidance.

Able to measure the correct

data and sketch the correct

waveforms without

assistance.

Able to measure and sketch the

results correctly and neatly .

5 The ability to answer questions in the

lab sheet with engineering/scientific

explanations.

Not able (or make no

attempt) to asnwer questions

in the lab sheet.

Able to answer questions in

the lab sheet.

Able to answer questions in

the lab sheet with

appropriate supporting data.

Able to answer correctly with

good reasons using appropriate

supporting data obtained from

the experiment.

MARK

Rating Awarded by

Assessor

Experimental Title: Experiment BE1: Diode Circuits

Preparation Before the Lab

Data Analysis

AVERAGE MARK (total/number of criteria)

SUBJECT CODE AND TITLE: EEE1016 & ELECTRONICS 1

Late Submission (penalty)

Data Collection or Setting up the Experiment

EEE1016 Electronics I, Experiment BE1, Short Report Form Student’s ID: _________________

1

EEE1016 Electronics I: Experiment BE1: Diode Circuits

Short Report Form (Part B) (Students must submit the report immediately upon completion of the laboratory session)

Student’s Name: _____________________________ Student’s I.D.: ______________

Date: ______________ Group: ____________ Major: __________

Part B: Experimental Results (Student who is found copying experimental results, discussions and conclusions from other

group will immediately get ZERO marks in this overall experiment evaluation.)

4.0 Diode Test

Table E4.0: Measured VF (1 mark)

Diode D1 D2 D3 D4 D5 D6

Reading (V)

4.1 Half-wave Rectifier

Graph E4.1 (a): VI and VO waveforms of HW rectifier [R3 only, Procedure 3] (2 marks)

Graph E4.1 (b): VI and VO waveforms of HW rectifier [C3//R3, Procedure 4 (i)]

(2 marks)

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

VI

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

VI


2

Graph E4.1 (c): VI and VO waveforms of HW rectifier [C2//R3, Procedure 4 (iii)]

(2 marks)

Graph E4.1 (d): VI and VO waveforms of HW rectifier [C2 alone, Procedure 4 (v)]

(2 marks)

Table E4.1: Measured Vo, max and Vo, min of HW rectifier (3 marks)

Procedure 3 4 (i) 4 (ii) 4 (iii) 4 (iv) 4 (v)

Vo, max (V)

Vo, min (V)

Vo, r (V)

Vo,r = Vo, max – Vo,min

Instructor’s Check (after Table E4.1)

Sign : __________ Time : _________

Remarks:

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

VI

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

VI


3

4.2 Full-wave Rectifier Graph E4.2 (a): VI and VO waveforms of FW rectifier [R3 only, Procedure 3] (2 marks)

Graph E4.2 (b): VI and VO waveforms of FW rectifier [C3//R3, Procedure 4 (i)]

(2 marks)

Graph E4.2 (c): VI and VO waveforms of FW rectifier [C2//R3, Procedure 4 (iii)]

(2 marks)

Graph E4.2 (d): VI and VO waveforms of FW rectifier [C2 alone, Procedure 4 (v)]

(2 marks)

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

VI

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

VI

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

VI


4

Table E4.2: Measured Vo, max and Vo, min of FW rectifier (3 marks)

Procedure 3 4 (i) 4 (ii) 4 (iii) 4 (iv) 4 (v)

Vo, max (V)

Vo, min (V)

Vo, r (V)

Vo,r = Vo, max – Vo,min

4.3 Clipping Circuits Graph E4.3 (a): VI and VO waveforms of upper clipping circuit with +VDC (2 marks)

Table E4.3 (a): Measured Vo, max and Vo, min of upper clipping circuit with +VDC (2 marks)

VDC (V) 0 2 4 6

Vo, max (V)

Vo, min (V)

Graph E4.3 (b): VI and VO waveforms of lower clipping circuit with +VDC (2 marks)

Table E4.3 (b): Measured Vo, max and Vo, min of lower clipping circuit with +VDC (2 marks)

VDC (V) 0 2 4 6

Vo, max (V)

Vo, min (V)


Sign : __________ Time : _________

Remarks:

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

VI

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

VI


5

Graph E4.3 (c): VI and VO waveforms of lower clipping circuit with –VDC (2 marks)

Table E4.3 (c): Measured Vo, max and Vo, min of lower clipping circuit with –VDC (2 marks)

VDC (V) 0 2 4 6

Vo, max (V)

Vo, min (V)


Graph E4.4: VI and VO waveforms of clamping circuit (VDC = 0V and 2 V cases only)

(2 marks)

Table E4.4: Measured Vo, max and Vo, min of clipping circuit (3 marks)

VDC (V) 0 2 4 6

Vo, max (V)

Vo, min (V)

Vo, pp (V)

Vo, pp = Vo, max – Vo,min

Instructor’s Check [after Table E4.3 (c)]

Sign : __________ Time : _________

Remarks:


Sign : ________ Time : _________

Remarks:

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

VI

CH1 & CH2

ground

CH1 & CH2: 5 V/div

Time base: 20 s/div

VI


6

Section 4.1

Discussions

Explain why Vo waveforms of Graph E4.1(b) and (c) are different. (2 marks)

________________________________________________________________________

________________________________________________________________________

________________________________________________________________________

Conclusion (2 marks)

For the half-wave rectifier circuit, the difference between the maximum output voltage

(Vo,max) and the maximum input voltage (Vi,peak) is ___________________________. This is

caused by _________________________________________________________________.

The output ripple voltage (Vo,r) can be reduced by _________________________________

and _____________________________________ at fixed input frequency.

Section 4.2

Discussions

1. Identify the common feature of all the results (besides full-wave feature). Explain why.

(2 marks)

________________________________________________________________________

________________________________________________________________________

________________________________________________________________________

2. Explain the reasons why the Vo,r value in Procedure 4(i) is different from that in Section

4.1. (2 marks)

________________________________________________________________________

________________________________________________________________________

________________________________________________________________________


For the full-wave rectifier circuit, the difference between Vo,max and Vi,peak is ____________.

This is caused by ___________________________________________________________.

At the same input frequency, ________________________ and ______________________,

Vo,r is _______________________ as compared with that of the half-wave rectifier circuit.


7

Section 4.3

Discussions

1. Identify the common feature of each type of the clipping circuit (besides the type of

clipping feature). Explain why. (2marks)

________________________________________________________________________

________________________________________________________________________

________________________________________________________________________

________________________________________________________________________


The upper clipping circuit has Vo,max = _________________ above the DC supply voltage.

This is because _____________________________________________________________.

The lower clipping circuit has Vo,min = ______________________. However, the Vo,max is

_____________________________________________________________which is caused

by _____________________________________________________________.

Section 4.4

Discussions

1. Identify the common feature of the clamping circuit (besides clamping feature). Explain

why. (2 marks)

________________________________________________________________________

________________________________________________________________________

________________________________________________________________________

2. Explain how diode D should be connected in order for the AC waveform to be totally

clamped up so that the negative peak point is above 0V. (2 marks)

________________________________________________________________________

________________________________________________________________________

________________________________________________________________________


The clamping circuit has Vo average voltage of ___________________________________.

This is because the capacitor is charged to _______________________________________.

The Vo peak-to-peak voltage is ________________________________ and Vo amplitude is

________________________________.

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