EE345 – Micro-Controllers Gate-Level Minimization Prof. Ahmad Abu-El-Haija

EE345 – Micro-ControllersGate-Level Minimization

Prof. Ahmad Abu-El-Haija

April 20, 2023Digital System Design 2

Acknowledgement

This presentation is a modified version of lecture notes prepared by Dr. Pradondet Nilagupta, Kasetsart University. The latter is also a modified version based upon presentations by Prof. Maciej Ciesielski and Prof. Tilman Wolf, University of Massachusetts Amherst, and original slides from the publisher.

April 20, 2023EE345 - Micro-Controllers 3

Minimization of Logic Functions

We have chips with millions of gates Why care about minimizing a function? What do a few gates matter?

Basic logic functions replicated thousands of times Saving one gate for a memory cell pays off

What is the criterion for “minimization” Should we minimize• Number of product terms?• Number of logic operations?• Number of variables (literals)?• Number of wires?• …?

For implementation: minimize number of gates


How to Minimize Gate Count?

Example: F=A’BC’+AB’C’+AB’C+ABC’= Σ(2,4,5,6)

How many gates do we need for implementation? If AND gates have 3 inputs and OR gates have 4 inputs? If all gates are binary (2 inputs)?

Are there any tricks we can use? Combine minterms:

A’BC’+ABC’=BC’ AB’C’+AB’C=AB’

F = BC’+AB’ How many gates does F need now?

Simplest expression: Minimum number of terms and literals per term

We need systematic approach to minimize expression Answer: Karnaugh maps (K-maps)


Karnaugh Maps

Karnaugh maps (K-maps) are graphical representations of boolean functions.

One map cell corresponds to a row in the truth table. Also, one map cell corresponds to a minterm or a maxterm

in the boolean expression Multiple-cell areas of the map correspond to standard

terms.


Two-Variable Map

m3m21

m1m00

10x1

x2

0 1

2 3

NOTE: ordering of variables is IMPORTANT for f(x1,x2), x1 is the row, x2 is the column.

Cell 0 represents x1’x2’; Cell 1 represents x1’x2; etc. If a minterm is present in the function, then a 1 is placed in the corresponding cell.

m3m11

m2m00

10x2

x1

0 2

1 3OR


Boolean Function in Karnaugh Map

1s and 0s represent function in Karnaugh map 1 represent On-set (F=1), 0 represents Off-set (F=0) Similar to truth table 0s are typically not shown


Two-Variable Map

Any two adjacent cells in the map differ by ONLY one variable, which appears complemented in one cell and uncomplemented in the other.

Example:m0 (=x1’x2’) is adjacent to m1 (=x1’x2) and m2 (=x1x2’) but NOT m3 (=x1x2)


2-Variable Map -- Example

f(x1,x2) = x1’x2’+ x1’x2 + x1x2’ = m0 + m1 + m2

= x1’ + x2’ 1s placed in K-map for specified

minterms m0, m1, m2

Grouping (ORing) of 1s allows simplification

What (simpler) function is represented by each dashed rectangle? x1’ = m0 + m1

x2’ = m0 + m2

Note m0 covered twice

x1 0 1

0 1 1

1 1 0

x2

0 1

2 3


3-variable Karnaugh Map

Karnaugh map with 3 variables: Two variables on one side, one on the other Note Gray code sequence (single variable change) facilitates grou

ping of 1-entries into logic blocks


Blocks in Karnaugh Maps

Identifying blocks in Karnaugh maps Neighboring minterms can be combined:

x’y’z’ + x’y’z = x’y’(z’+z) = x’y’ Resulting expression uses fewer literals (z no longer present)


3-Variable Map

m6m7m5m41

m2m3m1m00

10110100yz

x

0 1 3 2

4 5 7 6

-Note: variable ordering is (x,y,z); yz specifies column, x specifies row.-Each cell is adjacent to three other cells (left or right or top or bottom or edge wrap)


Example: Blocks in Karnaugh Maps

Example: F(x,y,z) = Σ(2,3,4,5) = x’yz’+x’yz+xy’z’+xy’z Two blocks of size 2:

F = x’y + xy’


Example: Blocks in Karnaugh Maps

What is the Karnaugh map for F(x,y,z) = Σ(3,4,6,7) ?

Block can continue across “borders”, wrap around Left to right Top to bottom

F = yz + xz’


Blocks in Karnaugh Maps

Can we combine more than two minterms?

Yes: x’y’z’+x’y’z+xy’z’+xy’z = (x’+x)y’(z’+z) = y’ Any block that is “power of 2 size” can be reduced

Needs to be filled entirely with 1s

Largest possible block yields simplest expression


Overlapping Blocks

Example:F(A,B,C) = Σ(1,2,3,5,7)

Blocks can overlap Still find the largest possible power-2 blocks


Converting Blocks into Expressions

How to convert blocks into algebraic expressions?

Write down the variables that do not change Example: F(A,B,C) = C + A’B


Simplification

Enter minterms of the Boolean function into the map, then group terms

Example: f(a,b,c) = ac’ + abc + bc’ Result: f(a,b,c) = ac’+ b

1 1 1

1 1

abc

1 1 1

1 1 00 01 10 11

0

1

00 01 10 11

0

1


More Examples

f1(x, y, z) = ∑ m(2,3,5,7)

f1(x, y, z) = x’y + xz

f2(x, y, z) = ∑ m (0,1,2,3,6)

f2(x, y, z) = x’+yz’

yz

X 00 01 11 10

0 1 1

1 1 1

1 1 1 1

1


More Examples



Karnaugh map can be extended to 4 variables: Top cells are adjacent to bottom cells. Left-edge cells are

adjacent to right-edge cells. Note variable ordering (WXYZ).


Four-variable Map Simplification

One square represents a minterm of 4 literals. A rectangle of 2 adjacent squares represents a

product term of 3 literals. A rectangle of 4 squares represents a product

term of 2 literals. A rectangle of 8 squares represents a product

term of 1 literal. A rectangle of 16 squares produces a function that

is equal to logic 1.


Example

Simplify the following Boolean function g(A,B,C,D) = ∑m(0,1,2,4,5,7,8,9,10,12,13).

First put the function g( ) into the map, and then group as many 1s as possible.

g(A,B,C,D) = c’+b’d’+a’bd

111

11

111

111

cdab

1 11

11

1 11

1 11

00 01 11 10

00

01

11

10

00 01 11 10


Example: 4-variable Karnaugh Map

Example: F(w,x,y,z)= Σ(0,1,2,4,5,6,8,9,12,13,14)


Example: Simplify Boolean Function

F(A,B,C,D)= A’B’C’+B’CD’+A’BCD’+AB’C’


Choice of Blocks

We can simplify function by using larger blocks Do we really need all blocks? Can we leave some out to further simplify expression?

Function needs to contain special type of blocks They are called Essential Prime Implicants

Need to define new terms Implicant Prime implicant Essential prime implicant


Terminology

Implicant Any product term in the SOP form A block of 1’s in a K-map

Prime implicant Product term that cannot be further reduced Block of 1’s that cannot be further increased

Essential prime implicant Prime implicant that covers a 1 (minterm) that is not covered by an

y other prime implicant

Quine’s Theorem: Boolean function can be implemented with only essential prime im

plicants (but other solutions exist) The number of such implicants is minimum


Example

F(A,B,C,D)= Σ(0, 2,3,5,7,8,9,10,11,13,15)

F(A,B,C,D) = BD+B’D’+CD+AD= BD+B’D’+CD+AB’= BD+B’D’+B’C+AD= BD+B’D’+B’C+AB’


Example

Consider function f(a,b,c,d) whose K-map is shown at right.

a’b’ is not a prime implicant because it is contained in b’.

acd is not a prime implicant because it is contained in ad.

b’, ad, and a’cd’ are prime implicants.

111

111

111

11

b’

cd abad

a’cd’

a’b’

acd


Essential Prime Implicants (EPIs)

If a minterm of a function F is included in ONLY one prime implicant p, then p is an essential prime implicant of F.

An essential prime implicant MUST appear in all possible SOP expressions of a function

To find essential prime implicants: Generate all prime implicants of a function Select those prime implicants that contain at least

one 1 that is not covered by any other prime implicant.

For the previous example, the PIs are b’, ad, and a’cd’; all of these are essential.

111

111

111

11

b’ad

a’cd’


Another Example

Consider f2(a,b,c,d), whose K-map is shown below.

The only essential PI is b’d.

1

1 1 1

1 1

1 1 1

cdab


0 1

1 1

1 0

1 0D

A

1 0

0 0

1 1

1 1B

C

5 prime implicants:BD, ABC', ACD, A'BC, A'C'D

Examples to illustrate terms

0 0

1 1

1 0

1 0D

A

0 1

0 1

1 1

0 0B

C

6 prime implicants:A'B'D, BC', AC, A'C'D, AB, B'CD

minimum cover: AC + BC' + A'B'D

essential

minimum cover: 4 essential implicants

essential


Systematic Procedure for Simplifying Boolean Functions

1. Generate all PIs of the function.2. Include all essential PIs.3. For remaining minterms not included in the

essential PIs, select a set of other PIs to cover them, with minimal overlap in the set.

4. The resulting simplified function is the logical OR of the product terms selected above.


Example

f(a,b,c,d) = ∑m(0,1,2,3,4,5,7,14,15).

Five grouped terms, not all needed.

3 shaded cells covered by only one term

3 EPIs, since each shaded cell is covered by a different term.

F(a,b,c,d) = a’b’ + a’c’ + a’d + abc

11

111

1111ab

cd


Product of Sums Simplification

Use sum-of-products simplification on the zeros of the function in the K-map to get F’.

Find the complement of F’, i.e. (F’)’ = F Recall that the complement of a boolean

function can be obtained by (1) taking the dual and (2) complementing each literal.

OR, using DeMorgan’s Theorem.


Product of Sums Minimization

How to generate a product of sums from a Karnaugh map? Use duality of Boolean alge

bra (DeMorgan law) Look at 0s in map instead

of 1s Generate blocks around 0’s Gives inverse of function Use duality to generate pro

duct of sums Example:

F = Σ(0,1,2,5,8,9,10) F’ = AB+ CD + BD’ F = (A’+B’)(C’+D’)(B’+D)


Gate Implementation


Example: POS minimization

0000

1100

0111

1111ab

cd

• F’(a,b,c,d) = ab’ + ac’ + a’bcd’• Find dual of F’, dual(F’) = (a+b’)(a+c’)(a’+b+c+d’)

• Complement of literals in dual(F’) to get FF = (a’+b)(a’+c)(a+b’+c’+d) (verify that this is the same as in slide 33)



101198

13 141512

5 674

1 230

BC

DE

26

27

25

24

30

31

29

28

22

23

21

20

18

19

17

16

BC

DE

A=0

A=1

A’BCDE’

ABCDE’


Relationship between #of adjacent squares and # of literals


Example: 5-variable Karnaugh Map

Example:

F(A,B,C,D,E) = Σ(0,2,4,6,9,13,21,23,25,29,31)

F = A’B’E’+BD’E+ACE


Don't Care Conditions

There may be a combination of input values which will never occur if they do occur, the output is of no concern.

The function value for such combinations is called a don't care.

They are usually denoted with x. Each x may be arbitrarily assigned the value 0 or 1 in an implementation.

Don’t cares can be used to further simplify a function


Minimization using Don’t Cares

Treat don't cares as if they are 1s to generate PIs. Delete PI's that cover only don't care minterms. Treat the covering of remaining don't care

minterms as optional in the selection process (i.e. they may be, but need not be, covered).


Minimization example

F(w,x,y,z) = Σ(1,3,7,11,15) and d(w,x,y,z) = Σ(0,2,5) What are possible solutions?


Example

Simplify the function f(a,b,c,d) whose K-map is shown at the right.

f = a’c’d+ab’+cd’+a’b’c

or f = a’c’d+ab’+cd’+a’bd’ The middle two terms are EPIs, while

the first and last terms are selected tocover the minterms m1, m4, and m5.

(There’s a third solution!)xx11

xx00

1011

1010

xx11

xx00

1011

1010

0 1 0 1

1 1 0 1

0 0 x x

1 1 x x

abcd

00

01

11

10

00 01 11 10


Another Example

Simplify the function g(a,b,c,d) whose K-map is shown at right.

g = a’c’+ abor

g = a’c’+bd’

x 1 0 0

1 x 0 x

1 x x 1

0 x x 0

x 1 0 0

1 x 0 x

1 x x 1

0 x x 0

x 1 0 0

1 x 0 x

1 x x 1

0 x x 0

abcd


NAND and NOR Implementations

Digital circuit are frequently constructed with NAND or NOR gates rather than AND and OR gates.

NAND and NOR gates are easier to fabricate with electronic components and are the basic gates used in all IC digital logic families.


Logic Operations with NAND gate

NOT, AND, and OR can be implemented with NAND


Conversion to NAND Implementation

Minimized expressions are AND-OR combinations Two illustrations for NAND gates

AND-invert Invert-OR

Key observation: two “bubbles” eliminate each other Two bubbles equal straight wire How to generate a sum of minterms using NAND?

Use AND-invert for minterms Use invert-OR for sum


Conversion to NAND Implementation

Sum of minterms

Replace AND with AND-invert and OR with invert-OR Still same circuit!

Replace AND-invert and invert-OR with NAND F=((AB)’(CD)’

= AB+CD


NAND Example

Function F = Σ(1,2,3,4,5,7) Minimize and implement with NAND Karnaugh map:

Implementation:


Multilevel NAND circuits

Multilevel circuits conversion rules:1. Convert all AND gates to NAND with AND-invert symbols

2. Convert all OR gates to NAND with invert-OR symbols

3. Check all bubbles in diagram. For every bubble that is not compensated by another bubble, insert inverter

Example:


Example: Multilevel NAND Circuits

F=(AB’+A’B)(C+D’)

With NAND gates:


Logic Operations with NOR gate

NOR can also replace NOT, AND, OR

Two representations of NOR: OR-invert and invert-AND


Converting to NOR Implementations

Same rules as for NAND implementations

Example: F = (A+B)(C+D)E

For multi-level circuits:

F=(AB’+A’B)(C+D’)


Exclusive-OR Function

x exclusive-OR y (x XOR y), written as: = x y’ + x’ y

is equal to 1 if only x is 1 or only y is 1, but not both. Possible implementations:


Exclusive-OR Function

Exclusive-NOR (equivalence) is equal to 1 if both inputs are 1 or if both are 0.

( )’ = (x y’ + x’ y)’ = x y + x’ y’ Exclusive-OR is cummutative and associative, hence:

A B = B A, and (A B) C = A (B C) = A B C

A B C = (AB’ + A’B) C’ + (AB +A’B’) C’ = AB’C’ + A’BC’ + A’B’C + ABC = Σ(1, 2, 4, 7)

Also, it can be shown that:

A B C D = Σ(1, 2, 4, 7, 8, 11, 13, 14)

Hence XOR is an ODD functionSimilarly, the exclusive-NOR is an EVEN function


Exclusive-OR: Odd & Even Functions


Exclusive-OR: Odd & Even Functions


Parity Generation and Checking

Exclusive-OR functions are very useful for error detection. Parity bit is an extra bit transmitted with message to make

number of 1s even (even parity) or odd (odd parity). Message (including parity) is transmitted and checked at

receiver for errors: error is detected if checked parity is different from sent parity.

We need “parity generator” at sender, and “parity checker” at receiver.

Generator: P = x y z Checker: C = x y z P


Parity Generation and Checking

Note:

Sections 3.8 and 3.10 are omitted!


Documents

EE345 – Micro-Controllers Gate-Level Minimization Prof. Ahmad Abu-El-Haija