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EE105 Fall 2007 Lecture 14, Slide 1 Prof. Liu, UC Berkeley
Lecture 14
OUTLINE• Frequency Response (cont’d)
– CE stage (final comments)– CB stage– Emitter follower– Cascode stage
Reading: Chapter 11.4-11.6
ANNOUNCEMENTS• Midterm #1 results (undergrad. scores only):
• N=74; mean=62.8; median=63; std.dev.=8.42
• You may pick up your exam during any TA office hour.• Regrade requests must be made before you leave with your exam.
• The list of misunderstood/forgotten points has been updated.
253810
EE105 Fall 2007 Lecture 14, Slide 2 Prof. Liu, UC Berkeley
CE Stage Pole Frequencies, for VA<∞
Note that p,out > p,in
CrRgCR oCminThev
inp
1
1,
CrRg
CrRoCm
outoC
outp1
1
1,
EE105 Fall 2007 Lecture 14, Slide 3 Prof. Liu, UC Berkeley
I/O Impedances of CE Stage
r
CrRgCjZ
oCmin ||
1
1
oC
CSout rR
CCjZ ||||
1
EE105 Fall 2007 Lecture 14, Slide 4 Prof. Liu, UC Berkeley
• Note that there is no capacitance between input & output nodes No Miller multiplication effect!
CB Stage: Pole Frequencies
T
Xm
S
Xp
Cg
R
1||
1,
CCX
YCYp CR
1,
CSY CCC
or
CB stage with BJT capacitances shown
EE105 Fall 2007 Lecture 14, Slide 5 Prof. Liu, UC Berkeley
Emitter Follower• Recall that the emitter follower provides high input impedance
and low output impedance, and is used as a voltage buffer.
Follower stage with BJT capacitances shown• CL is the load capacitance
Circuit for small-signal analysis (Av)
or
EE105 Fall 2007 Lecture 14, Slide 6 Prof. Liu, UC Berkeley
AC Analysis of Emitter Follower
• KCL at node X:
• KCL at output node:
1)()(
)(1
2
jbja
jgC
v
v m
in
out
m
LS
mS
LLm
S
g
C
r
R
g
CCRb
CCCCCCg
Ra
1
vvv outX
011
Cj
v
r
v
Cj
vv
R
vvv out
S
inout
L
outm
Cj
vvg
Cj
v
r
v
11
EE105 Fall 2007 Lecture 14, Slide 7 Prof. Liu, UC Berkeley
Follower: Zero and Pole Frequencies
• The follower has one zero:
• The follower has two poles at lower frequencies:
1)()(
)(1
2
jbja
jg
C
v
v m
in
out
m
LS
mS
LLm
S
g
C
r
R
g
CCRb
CCCCCCg
Ra
1
Tm
z fC
g
2
21
2 1 11)()(pp
jjjbja
EE105 Fall 2007 Lecture 14, Slide 8 Prof. Liu, UC Berkeley
Emitter Follower: Input Capacitance• Recall that the voltage gain of an emitter follower is
Lmin Rg
CCC
1
or
Follower stage with BJT capacitances shown mL
Lv
gR
RA
1
Lm
vX Rg
CCAC
11
LmvY Rg
CC
AC
11
• CXY can be decomposed into CX and CY at the input and output nodes, respectively:
Lin RrR 1
EE105 Fall 2007 Lecture 14, Slide 9 Prof. Liu, UC Berkeley
Emitter Follower: Output Impedance
Crj
CrRRrj
Rr
jCr
RrjCrR
i
vZ SSSSS
X
Xout
/11
/1
11
Circuit for small-signal analysis (Rout)or
Smxx Rvgivv
Cjrvgiv mX
1
EE105 Fall 2007 Lecture 14, Slide 10 Prof. Liu, UC Berkeley
Emitter Follower as Active Inductor
• A follower is typically used to lower the driving impedance RS > 1/gm so that the “active inductor” characteristic on the
right is usually observed.
CASE 1: RS < 1/gm CASE 2: RS > 1/gm
Crj
CrRRrj
Rr
jCr
RrjCrR
i
vZ SSSSS
X
Xout
/11
/1
11
capacitive behavior inductive behavior
EE105 Fall 2007 Lecture 14, Slide 11 Prof. Liu, UC Berkeley
Cascode Stage• Review:
– A CE stage has large Rin but suffers from the Miller effect.
– A CB stage is free from the Miller effect, but has small Rin.
• A cascode stage provides high Rin with minimal Miller effect.
11
21,
mm
Y
XXYv g
gv
vA
XYX CC 2
or
EE105 Fall 2007 Lecture 14, Slide 12 Prof. Liu, UC Berkeley
Cascode Stage: Pole Frequencies
111, 2||
1
CCrRS
Xp
1212
,
21
1
CCC
g CSm
Yp
22,
1
CCR CSL
outp
Cascode stage with BJT capacitances shown
(Miller approximation applied)
22
2, 2 T
mYp f
C
g
Note that
or
EE105 Fall 2007 Lecture 14, Slide 13 Prof. Liu, UC Berkeley
Cascode Stage: I/O Impedances
111 2
1||
CCjrZ in
22
1||
CSLout CCjRZ
or
EE105 Fall 2007 Lecture 14, Slide 14 Prof. Liu, UC Berkeley
Summary of Cascode Stage Benefits• A cascode stage has high output impedance, which is
advantageous for– achieving high voltage gain– use as a current source
• In a cascode stage, the Miller effect is reduced, for improved performance at high frequencies.
EE105 Fall 2007 Lecture 14, Slide 15 Prof. Liu, UC Berkeley
Impedance of Parallel RC Circuit