DØ Silicon Microstrip Tracker

DDDØ Silicon Microstrip TrackerDØ Silicon Microstrip Tracker

Eric Kajfasz (CPPM/FNAL) - Breese Quinn (FNAL)

Como, October 15, 2001

presented by Alice Bean (Kansas/FNAL)

Design Production Assembly Readout Installation Commissioning Conclusions

DØSMTDØSMT

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Como2001, 10/15/01 E. Kajfasz/B. Quinn 2

SMT Design

4-layer barrel cross-section

Barrels F- Disks H- Disks

Channels 387072 258048 147456

Modules 432 144 96

Si Area 1.3 m2 0.4 m2 1.3 m2

I nner R 2.7 cm 2.6 cm 9.5 cm

Outer R 9.4 cm 10.5 cm 26 cm

SMT StatisticsSMT Statistics

6 Barrels

12 F Disks

4 H Disks

72 ladders12 cm long

6192 R/O chips = 792,576 channels > 1.5 million wire bonds

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SMT Design

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High Density Interconnect

Kapton based flex circuits with0.2 mm pitch for chip mounting

Laminated to Beryllium substrateand glued to Silicon sensor

Connects Sensor to SVXII chips and SVXII chips to flex circuit via wire bonds(Al wedge bonding)

Connects to a Low Mass Cable which carries the signals out of the interaction region Be substrate

SVXIIE chips

9-chip HDI for 20 sensor

Bus control and power traces

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SVXIIe chip

1.2 um CMOS amplifier/analog delay/ADC chip fabricated in the UTMC rad hard process

Designed by LBL/FNAL

Some features:

128 channels

32 cell pipeline/channel

8-bit Wilkinson ADC

Sparsification

53 MHz readout

106 MHz digitization

6.4 x 9.7 mm2

About 85,000 transistors

Pipeline Control Logic

Analog Pipeline

128 channels

32 storage cells/channel

Inte

grat

ors

(128

cha

nnel

s)

AD

C C

ompa

rato

rs

Spa

rsifi

catio

n F

IFO

I/O

ADC ramp and counter

SVXIIFE SVXIIBE

Analog section Digital section

To

Sili

con

Det

ecto

r

To

Rea

dou

t S

yste

m

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SVXIIe chip

Externally programmed to achieve optimal performance for 132 or 396ns beam crossings and detector capacitances from 10 to 35pF (preamp bandwidth adjustment)

Chip noise490e + 50e/pFi.e. ~1200e ENC for C=15pF1 MIP => ~4fC => ~25,000e=> S/N ~ 20

Max dealy in analog pipeline:32 x 132ns = 4.2us

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Production: 3-chip ladders

72 single-sided axial ladders2 sensors/ladderLocated on 1st and 3rd layer of 2 outer barrelsBe substrate, HDI and rohacell foam/carbon fiber rails glued on Silicon sensor

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144 double-sided double-metal axial/90° ladders

1 sensor/ladder Located on 1st and 3rd layer of

4 inner barrels

N-sideN-side P-sideP-side

Be substrate, HDI and rohacell foam/carbon fiber rails glued on Silicon sensor

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216 double-sided axial/2° ladders 2 sensors/ladder Located on 2nd and 4th layer all 6

barrels


Be substrate, HDI and rohacell foam/carbon fiber rails glued on Silicon sensor

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Production: F-wedges

144 double-sided ±15° strips 6 (n) and 8 (p) readout chips 1 sensor/wedge Located on 12 F-disks


Silicon sensor glued on HDI

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Production: H-wedges

96x2 back to back single-sided, ±7.5° strip angles

6-chip readout per side

2 sensors/wedge Be substrate and

HDI glued on Silicon sensor

Located on 4 H-disks

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Production: Sensor problems

Sensor lithography defectsA silicon manufacturing problem produced p-stop isolation defects in the 90° stereo ladders. This resulted in a 30% yield from the manufacturer.

Micro-discharge effect With negative p-side bias on double-sided detectors, we observed micro-

discharges producing large leakage currents and noise above a certain breakdown voltage.

The effect occurs along the edges of the p implants, where large field distortions and charge accumulations result from misalignment of electrodes

with implants.

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Production: Testing

Functional TestDebug bad strips (broken capacitors), bonds, chips, etc.Determine the V-I characteristics of the sensors

Measure V-max p-side breakdown voltage (micro-discharge effect)

Burn-inBias the ladder or wedge and test the readout for 72 hoursMeasure pedestals, noise, gain and check sparse readout

LaserExpose biased detectors to a narrow laser scanMeasure the depletion voltage and leakage currents and identify dead channels

Readout tested again after the detector is mounted on a barrel or disk

V-max

Fail

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Production: Rates

-50

0

50

100

150

200

250

300

11/1/98 2/9/99 5/20/99 8/28/99 12/6/99 3/15/00 6/23/00 10/1/00 1/9/01

L3

L6

L9

FW

HW

Production mainly paced by problems with HDIs and Silicon sensors(yields, delivery delays …)

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Production: Vop

L3 L6

L9 FW

Vop (V) Vop (V)

Vop (V) Vop (V)

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Production: V-max

L6 L9

FW

|V-max| (V) |V-max| (V)

|V-max| (V)

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Production: Detector Quality

Detector classification:Dead channel: < 40 ADC count response to laserNoisy channel: > 6 ADC count pedestal widthGrade A: less than 2.6% dead/noisy channelsGrade B: less than 5.2% dead/noisy channels

Only used mechanically OK Grade A and B detectors

Channel Fractions (%)Channel Fractions (%)

Dead Noisy

Barrel

1 1.5 0.6

2 1.6 0.5

3 1.0 0.3

4 1.3 0.3

5 1.2 0.4

6 2.0 0.2

F Disks 0.5 0.3

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Production: dead channels

L6-p L6-n

L9-p L9-n

FW-p FW-n

L3

% dead strips

% dead strips

% dead strips

% dead strips

% dead strips

% dead strips

% dead strips

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Assembly: Barrel alignment

Ladders placed on barrels using an insertion fixture

Internal alignment done using a CMM(touch probe)

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Barrel2 alignment - rotations

Active BH

Passive BH

In the plane of the ladder Around ladder short axis Around ladder long axis

(mm) (mm) (mm)

10um48um 48um

=10um induces a 3um error=48um induces a 3um error =48um induces

a 2um error

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Assembly: Barrel-Fdisk mating

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Assembly: End Fdisks mating

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Assembly: Hdisk

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Assembly: Radiation monitors

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Assembly: ½-cylinder

HDI connection to low-mass cable

South Half Cylinder

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SMT Readout: Data Flow

PlatformPlatformPlatformPlatform

SEQ

SEQ

SEQ

SEQ

SEQ

SEQ

3/6/8/9 Chip HDI

Sensor

8’ Low Mass Cable

VRB Controller

Optical Link1Gb/s

V

B

D

V

R

B

V

R

B

V

R

B

PwrPC

SDAQL3VRC

VME

1553

HV / LV

Adapter Card

I,V,T Monitoring

KSU

Interface Board

25’ High Mass Cable (3M/50 conductor)

CLKs CLKs

SEQController

Serial Command Link

~19’-30’ High Mass Cable (3M/80 conductor)

Detector volumeDetector volumeDetector volumeDetector volume

Counting HouseCounting HouseCounting HouseCounting House

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SMT Readout: Electronics

Interface Boards8 crates (144 boards) located inside the detector volumeRegenerates signalsSVX monitoring and power managementBias voltage distribution

SEQuencers6 crates (120 boards) located on the detector platformUse SVX control lines to actuate acquisition, digitization and readoutConvert SVX data to optical signals

VRBs (VME Readout Buffers)

12 crates (120 boards) located in counting houseData buffer pending L2 trigger decisionInput @ 5-10 kHz L1 accept rate ~ 50 Mb/s/channelOutput @ 1 kHz L2 accept rate ~ 50 Mb/s

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Installation

Cylinder installation was completed on 12/20/00

A ½ cylinder of 3 barrels and 6 F disks was inserted into each end of the CFT bore

H Disk installation was completed on 2/6/01

The cabling (~15,000 connections) and electronics installation was completed in May 2001

Fiber Tracker

Low Mass Cables

High Mass Cables

SMT

Interface Boards

Calorimeter

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Commissioning: Status

The entire detector has been connected and poweredThe 30% glycol + water coolant is refrigerated at –10 degC (=> detectors run between –5 and 0 degC)~15% of the devices are not in the readout:

10% ladders, 18% F wedges, 20% H wedgesProblems could be with boards, cables, connectors, chips, etc. We will debug each of them during the October/November shutdown, and expect to recover at least half of them.

Currently collecting calibration, alignment and commissioning data

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Commissioning; Event Display

Online SMT event display

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Commissioning: Monitoring

Online event monitoring program

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Commissioning: Charge Collection

A cluster is defined as a contiguous sequence of strips with

Each strip 6 ADC counts

Cluster 12 ADC counts

1 MIP ~ 25 ADC counts

One can play on:Timing settings, i.e. the delay of the integration window w.r.t. the beam crossing

Preamp bandwith (pabw)

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Commissioning: Timing and S/N

Higher preamp bandwith does not significantly reduce noise on n-side

= 4x132ns + 1x18ns + 0x2ns

Highest value smallest bandwith

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Commissioning: Calibrations

SMT pedestal, noise and gain measurements are taken using SDAQ. Pedestal and noise measurements are used to calculate the threshold per chip to be used in sparse read out

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Barrel cluster charge vs eta

MC

data

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6-chip ladder n-side cluster size fraction vs eta

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SMT & CFT Track Matching

Tracks were found separately in the SMT and the Central Fiber Tracker (CFT)

SMT tracks were extrapolated to the CFT at which point the track offsets were measured

Magnet off data

r = -3 36 m

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SMT-CFT primary tracks

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Conclusions

Design/ProductionExperience with double-sided detectors has led to the decision to use single-sided silicon for the upgrade.

Should work towards simpler designs in the future. For example, using 6 different sensor types resulted in extensive logistical complications.

Had to overcome numerous vendor related problems for HDIs, Silicon Sensors, jumpers, low mass cables …

Assembly/InstallationFirst alignment results show that the DØ SMT was assembled and installed very well.

The installation in the D0 detector went rather smoothly. The biggest challenge to overcome was the lack of real estate. The D0 detector, when first designed, was unfortunately not designed with a Silicon detector in mind

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Conclusions

CommissioningThe SMT was the first major DØ Upgrade detector system fully operational for Run 2a. More than 85% of the channels were available for readout on startup, and most of the remaining channels will be debugged and recovered by November.Calibrations and first look at physics show that we understand our detector.The offline software is debugged at the same time as the hardware. Now that they are both reasonably stable, we can start systematic studies.The detector should be commissioned by the end of the year.We are eager to start doing good physics with it.

GeneralConstruction and commissioning of the SMT has been an adventure full of challenges. But thanks to the relentless efforts of many physicists, engineers and technicians, D0 has now a vertex detector to play with.We had so much fun building this detector for run 2a that we are already planning to build a completely new Silicon Microstrip detector for run 2b (see Alice’s talk)

Documents

DØ Silicon Microstrip Tracker