Digitally controlled voltage mode schemes provide ... · Digitally controlled voltage mode schemes provide equivalent performance ... zAdvantages Large ramp ... Intelligent digital

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Digitally controlled voltage mode schemes provide equivalent performance

to current mode control

IBM Power and Cooling Technology Symposium

Analog Devices Inc.

12-13th September, 2006

2

Abstract

Increased demand for system management and the availability of inexpensive submicron CMOS processes have started the inevitable migration to digital power. Implementation of Current mode control adds cost to a digital control loop because requirements on the current sensing ADC Using digital techniques - offering alternative approaches and enhancements to counter problems normally associated with voltage mode control methodAchieving similar performance to current mode control

3

Why use Digital Power?

4

Pressure to improve power densityAchieved through increased efficiency & cooling techniquesConfounded by the slow rate of capacitor size reduction and magnetic material improvements

Improving efficiency through functional integrationDesigning around the slow improvements in passives

Circuit Complexity – Increased Functionality

Ref: M. Jovanovic Delta – APEC 2006

High Power 3-Stage Topology

Logic and Drives required for ~ 9 FETs (incl.PFC)


Ref: M. Jovanovic Delta – APEC 2006

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Circuit Complexity – Efficiency Improvement

ZVS Bridge ExampleStandby modes become

programmableTrimming efficiency on-the-fly Frequency and timing delays

can be changed to optimise efficiencyPWM to PFM in standby mode


Improving EMI – ‘Dithering’ techniques

Frequency is modulated within a narrow bandReduction in emissions

measured

Intelligent Power Supplies

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Component Count Reduction Electronic Trimming

ADM1041 facilitates large component count reduction on a typical server ACDC Power supply

ADM1041 is a digitally managed solution

Reliability – Component Count Reduction Why use Digital Power?

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Circuit Design Flexibility

Adaptive Loop ControlIf ESR of output cap changes due to temperature or aging, control loop pole can be adapted accordinglyLess margins are needed => Higher bandwidth, smaller output capsAdaptive TimingWhen using ZVS (Zero-Voltage-Switching) in a full-bridge topology the ideal timing is dependent on the output currentWith adaptive timing efficiency can be improved


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Digital Management and Interfacing

MonitoringCurrents, voltages and temperatures are available through a digital bus interface

ProgrammabilityOCP, OVP, UVP, OTPSoft-Start, Fault ResponseTrimming Vout, Current-SenseMargining, TestingInventory Control, Software-based CustomizationReduced PCB re-spins

CalibrationReduces test cost

MarginingReduces test cost


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Digital Cost Trends

Ref: Y Borodovsky Intel SPIE Microlithography 2006


10

$0.01

$0.10

$1.00

$10.00

$100.00

1980 1990 2000 2010

Digital($/kgate)Analog($/nF)

The area of digital is cut in half with every new generationThe area of analog is reduced by 20~30% with every new generationThe cost of digital is cut in half every 2~3 yearsThe cost of analog is cut in half every 4~8 yearsRef: Anton Bakker Analog Devices Inc.

Digital and Analog Cost trendsMoore’s Law is different for Analog and Digital

In 90nm CMOS, 8051 core is the size of a bondpad


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Layout comparison in 0.25um CMOS

10pF

Bondpad + ESD

12-bit ADC

Implementations in Digital

12


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Analog Control Loop

filter

power stage

Vref

controller

pwm

Error amplifier has two functions:1. DC accuracy2. AC response

Typical specs1. Low offset: ~1mV2. High bandwidth: ~1MHz


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Digital Control Loop (1)

ADC has two functions:1. DC accuracy2. AC response

Typical specs1. High resolution: ~12 bits2. High bandwidth: ~1Msample/s

power stage

REF

controller

pwm ADCdigitalfilter


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ADC is for AC responseDAC and amplifier are for DC accuracyTypical specs

1. ADC: 6 bits, 1Msample/s2. DAC: 10 bits, 1ksample/s

power stage

controller

pwm ADCdigitalfilter

REF

DAC


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ADC1 is for DC accuracyADC2 is for AC responseTypical specs

1. ADC1: 12 bits, 1ksample/s2. ADC2: 6 bits, 1Msample/s

power stage

controller

PWMADC1

filter ADC2HPF

REF

summer&


Patent Pending

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Current Mode and Voltage Mode

Voltage ModeAdvantages

Large ramp provides noise immunitySingle Feedback loopRelatively easy to design and analyze

DisadvantagesPossibility of imbalance and saturation in symmetrical circuitsNo cycle-cycle current limitInput voltage responseCCM-DCM response changeDouble pole in the control loop

complicates compensation


Current ModeAdvantages

Single pole in the control loop simple compensationGood input line responsePulse by Pulse Limiting –auto flux balancing

DisadvantagesHigh bandwidth loop sensitive to noise - leading edge current ringingUnstable at duty >50% without added slope compensation (VM always requires a slope)

Current Mode would require high B/W, high resolution ADCDigital implementations tend to be voltage mode

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Volt-Second Balance (a)Implementations in Digital – Voltage Mode and Current Mode

ADP1043

V IN

OUTA

OUTD

OUTC

OUTB

CS1INPUT

ADC PWM

COUNTER 1

COUNTER 2

+-

CS1 ERROR

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Volt-Second Balance (b)Implementations in Digital – Voltage Mode and Current Mode

ADP1043

V IN

OUTA

OUTD

OUTC

OUTB

ADC

COUNTER 1

COUNTER 2

+-

CS1INPUT

PWM

CS1 ERROR

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Volt-Second Balance Timing Example

PWM1 (OUTB)

PWM4 (OUTD)

CS1 Input

INITIAL ERROR(eg DUE TO FET

IMBALANCE)

1

PWMS AREADJUSTED

TO BALANCECS1 SIGNALS

2 3

CS1 SIGNALSARE BALANCED

4

CS1 SIGNALSARE BALANCED

5

APPROX50 CYCLES

6

PWM1 (OUTA)

PWM3 (OUTC)

43 37 26 .... 0 0

PWMS AREADJUSTED

TO BALANCECS1 SIGNALS

COMMENTS

CYCLE

CS1 ERROR

Implementations in Digital – Voltage Mode and Current Mode

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Volt Second Balance ResultsImplementations in Digital – Voltage Mode and Current Mode

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Primary Side Over Current Protection (OCP)

ADP1043

V IN

OUTA

OUTD

OUTC

OUTB

CS1 ADC250 S/sec

VREF

FAST OCP COMPARATOR (20 nsec)

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FAST OCP(PEAK)

PWMREF

SLOW OCP(AVERAGE)

+-


Fast OCP performed using analog circuitry

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VM Control Loop Issues (1): Input Line Response


Voltage mode system gain changes with input voltageHigh-end systems work from regulated input voltage from Power Factor StageSlow changing transientsLine response issues become less relevant

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VM Control Loop Issues (2)Loop Compensation


Type 3 Compensation is necessary to resolve control loop stabilization

60

40

20

0

20

40

60

200

150

100

50

0

100 1k 10k 100k 1Mf [Hz]

100 1k 10k 100k 1Mf [Hz]

Courtesy of Richard Redl

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Current mode loop response changes when moving from continuous conduction mode to discontinuous mode

VM Control Loop Issues (3)CCM DCM Transitions

Current Mode CCM

Current Mode DCM

Current Mode CCM

Current Mode DCM

Mag

nitu

de [d

B]

Phas

e [d

egre

es]

Frequency [Hz]

Frequency [Hz]Courtesy of Richard Redl

CMC DCM the peak current does not change when the input voltage changes, therefore the input-voltage rejection remains essentially the same as in CCM.

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Voltage mode loop response changes when moving from continuous conduction mode to discontinuous mode

VM Control Loop Issues (3)CCM DCM Transitions

Voltage Mode CCM

Voltage Mode DCM

Voltage Mode CCM

Voltage Mode DCM

Mag

nitu

de [d

B]

Phas

e [d

egre

es]

Frequency [Hz]

Frequency [Hz]

Courtesy of Richard Redl

VMC CCM with open regulating loop the output voltage is proportional to the input voltage. VMC DCM the simple proportionality changes into a steeper function because the change in the input voltage leads to a linear change in the peak currentUsing dynamic adjustment of

the digital filter, it is possible to change the loop response for CCM and DCM conditions

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Summary and Conclusions

Complexity of power supplies to meet energy efficiency and power density demands requires higher levels of integration and intelligenceDigital approaches are becoming cost competitive as semiconductor geometries continue to shrinkCurrent mode control implementation in digital can be expensive – high resolution, high speed ADCIntelligent digital design approaches can counter many of the traditional problems associated with voltage mode without adding significant cost to the design

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Digitally controlled voltage mode schemes provide ... · Digitally controlled voltage mode schemes provide equivalent performance ... zAdvantages Large ramp ... Intelligent digital