Digital Inegrated Circuits

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    IC digital logic families

    RTL Resistor-transistor logic

    DTL Diode-transistor logic TTL Transistor -transistor logic ECL Emitter-coupled logic MOS Metal-oxide semiconductor

    CMOS (Complementary MetalOxide Semiconductor)

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    Characteristics of an

    Ideal Logic Family The ideal logic family should have or be:

    Low power

    High speed Easy to use

    Many different logic functions

    Clear voltage levels for 0 (LOW) and 1 (HIGH)

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    Feature fan-out

    The no. of standard loads can be connected

    to the output of the gate without degradingits normal operation

    Sometimes the term loading is used

    Power dissipation

    The power needed by the gate Expressed in mW

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    Computing fan-out

    ),min(IL

    OL

    IH

    OH

    I

    I

    I

    IoutFan !

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    Power dissipation

    CCCCD

    CCLCCHCC

    VavgIavgP

    IIavgI

    v!

    !

    )()(

    2)(

    ?7400)(

    ?)(

    3,1

    TTLstandardFor

    !

    !

    !!

    ICinavgPTotal

    avgP

    mAImAI

    D

    D

    CCLCCH

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    Propagation delay50% VH

    50% VH

    50% VH

    50% VH

    ?)(

    11,7

    !

    !!

    avgt

    nstnst

    P

    PLHPHL

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    Noise margin

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    Noise margin (Contd)

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    The Ideal Switching Action

    of the BJT Consider a bipolar transistor in logic circuits

    It is operated in either two states

    produces the two logic levelsFully conducting state - saturated/turned on

    or

    Fully non-conducting state -cut-off state

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    Typical npn Transistor

    ParametersRegion VBE (V) VCE (V) Current

    Relation

    Cutoff < 0.6 Opencircuit IB=IC=0

    Active 0.6-0.7 > 0.8 IC =hFEIB

    Saturation 0.7-0.8 0.2 IB IC/hFE

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    Transistor-Transistor Logic

    (TTL) TTL was developed in 1965 The original basic TTL gate was a slight improvement over the

    DTL gate. There are several TTL subfamilies or series of the TTL

    technology. For example

    Standard TTL 74 High Speed TTL 74H (twice as fast, twice as much

    power)

    Low Power TTL -74L (1/10 the speed, 1/10 the powerof standard" TTL)

    Schottky TTL 74S(for high-frequency uses ) Low-power Schottky TTL 74LS Advanced Schottky TTL 74ALS

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    Part Numbers Part numbers for 7400 TTL series logic devices

    often use the following naming convention

    SN 74 ALS 245 A

    manufacturer temperature range logic subfamily deviceLS - Low Power Schottky

    AS - Advanced Schottky

    ALS - Advanced Low

    Power Schottky

    SN = Texas Instruments

    DM = Fairchild

    74 - commercial

    54 military (extended)

    hundreds of different

    devices in each family

    package type, quality

    grade, etc. (varies widely

    by manufacturer)

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    Open-collector TTL NAND

    Gate

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    Open Collector Outputs

    (Cont.) An open-collector output can present a logic LO

    output Since there is no internal path from the output Y

    to the supply voltage VCC , the circuit cannotpresent a logic HIGH on its own To function properly an external pull-up resistor,

    Rp is being used as shown

    Use this symbolto Indicates opencollector output

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    Advantages of Open

    Collector Outputs Why should we use open-collector

    gates which require the addition of a

    pull-up resistor in order to functionproperly when we could use a gatewith a totem-pole output instead?

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    1. Wired-ANDingOpen-collector outputs can be tieddirectly together which results in the

    logical ANDing of the outputs. Thusthe equivalent of an AND gate can beformed by simply connecting theoutputs

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    Advantages (cont)2. Increased current levels - Standard TTL

    gates with totem-pole outputs can onlyprovide a HIGH current output of 0.4 mA and

    a LOW current of 1.6 mA. Many open-collector gates have increased currentratings

    3. Different voltage levels - variety of outputHIGH voltages can be achieved. This is useful in

    interfacing different logic families that havedifferent voltage and current levelrequirements

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    Disadvantages : The big disadvantage of open-

    collector gates is their slow

    switching speed. This is because thevalue of pull-up resistor is in k;,which results in a relatively long timeconstants