IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 40, NO. 10, OCTOBER 2012 2569

Design of a High-Efficiency 40-kV, 150-A, 3-kHzSolid-State Pulsed Power Modulator

Seung-Bok Ok, Hong-Je Ryoo, Sung-Roc Jang, Suk-Ho Ahn, and Gennadi Goussev

Abstract—This paper deals with the detailed design of a pulsedpower modulator using insulated gate bipolar transistor (IGBT)switches for industrial applications. Output specifications of theproposed modulator are as follows: variable output pulse voltage1 ∼ 40 kV; pulse width 0.5 ∼ 5 μs; maximum pulse repetition rates3 kHz, and average output power of 13 kW. The proposed pulsedpower modulator consists of a high-voltage capacitor chargerbased on a high-efficiency resonant inverter and pulse generatorpart including a series of connected 24 pieces power cells. To verifythe proposed design, PSpice modeling was performed. Finally,experimental results proved the reliability and robustness of theproposed solid-state pulsed power modulator.

Index Terms—Marx generators, pulse generation, series-loadedresonant (SLR) converter, solid-state pulsed power modulator.

I. INTRODUCTION

R ECENTLY, considerable studies have been conducted onthe environmental applications of pulsed power systems

such as water or gas treatment [1]–[6]. Generally, the leachatefrom sewage-filled ground is treated by chemical or biologicalmethods even though the methods are expensive and requirelarge facilities and extensive treatment time. Furthermore, incases of decomposing benzene series, the chemical or biologi-cal methods have their limitations in the treatment of benzeneseries, and additional thermal treatments are required. On theother hand, a pulsed power treatment system shows a favorableperformance from the viewpoint of the cost and treatmenteffects [7]. Therefore, a pulsed power system generating highvoltage and high current with a rapid rising time has attractedattention for improving the treatment effect. For this reason,a pulsed power modulator based on semiconductor switcheshas been developed [8]–[13]. Referring to [11], insulated gatebipolar transistor (IGBT) stacks including resistor capacitordiode snubber circuits have been used to increase the voltagerating. By doing so, there is a limit to the decreasing the risingtime. To overcome this limit, the study on the solid-state pulsedpower modulator based on power cells connected in a series hasbeen conducted [14], [15]. When compared to [11], much morerapid rising time can be achieved. It can be configured with acharging inverter and pulse generator part.

Manuscript received September 30, 2011; revised November 22, 2011;accepted December 9, 2011. Date of publication February 3, 2012; date ofcurrent version October 5, 2012.

S.-B. Ok and S.-H. Ahn are with the Department of Energy Conversion,University of Science & Technology, KERI Campus, Changwon 641-120,Korea (e-mail: osbn2@keri.re.kr; whiteyan@keri.re.kr).

H.-J. Ryoo, S.-R. Jang, and G. Goussev are with the Electric PropulsionResearch Center, KERI, Changwon 641-120, Korea (e-mail: hjryoo@keri.re.kr;scion10@keri.re.kr; gennadi_gusev@mail.ru).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPS.2011.2181426

For the pulse generator part, a novel gate driver has beenproposed to protect the pulsed power modulator from the arcingcondition [14], [15]. By adopting an IGBT which can handle1200 A for a short time, rising time is limited at 300 ns [14].However, a rapid rising time of less than 100 ns, a highrepetition rate, a relatively short pulse width, and high stabilityare required for the environmental application [6]. Therefore,in this study, faster rising times (< 100 ns) can be achievedby selecting optimized IGBT characterized by low reversecapacitance. Furthermore, 300-A maximum current can beallowed to flow for a limited time through the IGBT withoutany harm. Last, a modified gate driver excluding short protec-tion is suggested. Since pulse width is relatively short for theenvironmental application, short protection suggested in [14],[15] is not necessary.

For a charging inverter, a resonant converter has beenadopted for high-efficiency operation [13]–[15]. In particular,a series-loaded resonant (SLR) inverter operating in discontin-uous conduction mode (DCM) has been adopted to generate60 kV of pulsed power [14]. It shows a reliable operation evenat light load condition since a SLR operating in DCM playsthe role of the current source, but it has a higher conductionloss disadvantage due to a relatively large peak current com-pared to the continuous conduction mode (CCM) [16], [17].In this paper, a SLR inverter operating in CCM is proposed tocharge the storage capacitors of each stage since the relativelysmall peak current results in a lower conduction loss and theproposed relay mode operation makes minimum voltage 1 kVcontrollable even at light load condition as well as reducing theswitching loss by restricting maximum switching frequency.Furthermore, each power stage comprised of six power cellsconnected in series can be charged with a distinctive outputtransformer at low voltage. To ensure equally charged powercells, third winding is added to compensate the unbalancedvoltage between each power cell. Through the experimentalresults, reliability and robustness of the proposed pulsed powermodulator are verified.

II. DESIGN OF THE PROPOSED

PULSED POWER MODULATOR

The overall scheme of the proposed solid-state pulsed powermodulator is shown in Fig. 1. It mainly consists of the high-efficiency series resonant-type capacitor charging inverter withfour power stages. Each power stage is comprised of sixpower cells connected in series and charged through a powerloop transformer. In this configuration, each power cell canbe charged in parallel through primary winding at 1.7 kV.

0093-3813/$31.00 © 2012 IEEE

2570 IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 40, NO. 10, OCTOBER 2012

Fig. 1. Overall scheme of the proposed pulsed power modulator.

TABLE ISPECIFICATION OF THE PROPOSED PULSED POWER MODULATOR

Moreover, a third winding is added to compensate the volt-age imbalance of each power cell automatically. Therefore,a total of 24 power cells connected in series can generate40 kV.

Finally, a step-down charging loop isolation transformeris connected between a resonant inverter and a power looptransformer to reduce the effects of the parasitic capacitancesof the power loop. The specifications of the proposed modulatorare summarized in Table I.

A. Design of the Series-Loaded Resonant Inverter

A high frequency SLR current source inverter operating atabove resonance frequency is employed to charge the storagecapacitors in parallel through the power loop transformer. Byconnecting lossless snubber capacitors (C1, C2, C3, C4) inparallel with each switch, it is possible to reduce the turn-off losses. Moreover, a secondary resonance capacitor (Cr2) isadded for a wide range of ZVS at the secondary winding in apower loop transformer since the resonant current can increaserapidly due to an initially uncharged Cr2. Therefore, the in-creased inductive energy stored in a resonance inductor (Lr)enables the snubber capacitors to be fully discharged beforethe switch connected in parallel with the snubber capacitor isturned on.

In this configuration, a secondary resonance frequencychanges the waveform of a resonant current into a trapezoidal-type waveform. From the trapezoidal-type current waveform,minimized crest factor and a reduced conduction loss can bederived. However, the increased switching frequency at lightloads produces increased conduction loss due to the finitevoltage across the snubber capacitor since the reduced inductiveenergy cannot discharge the snubber capacitor. To solve thisproblem, this paper suggests the relay mode operation wherethe supplying resonant current is forced to stop repetitively. Therelay mode is dealt with in Section III-B.

In summary, the proposed resonant inverter is designed to re-duce the turn-off loss and the conduction loss by adding enoughbig snubber capacitor and a secondary resonance capacitor. Thedesign parameters for the proposed SLR inverter are shownin Table II.

OK et al.: DESIGN OF A HIGH-EFFICIENCY 40-kV, 150-A, 3-kHz SOLID-STATE PULSED POWER MODULATOR 2571

TABLE IISUMMARY OF THE DESIGN PARAMETERS

B. Configuration of the Power Loop Transformer

As shown in Fig. 1, parallel charging is allowed for eachpower cell through a distinctive power loop transformer. To ex-ecute the parallel charging of storage capacitors, the four shell-type transformers have been designated so that the power loop,consisting of four-turn primary windings, charges the storagecapacitors through the voltage doubler rectifier. The numberof primary and secondary windings whose turn ratios equal4:33 have been selected in order to match the impedance of theresonant inverter supplying the power loop and to avoid coresaturation under any conditions. In addition, all connectionshave been minimized and twisted to reduce stray inductanceand parasitic capacitance that exists in the power loop.

Furthermore, a third winding acting as an automatic com-pensation winding in the power loop transformer is added toprevent the unbalanced voltage among each power cell. If theunbalanced voltage occurs in the power cell, the potential dif-ferences exist among the compensation winding. Therefore, theautomatic compensation winding detects the voltage unbalanceand sends a fault signal to the main controller.

C. Charging Loop Isolation Transformer

The charging loop isolation transformer is used for reduc-ing the effects of parasitic capacitance between the primarywinding in a power loop transformer and the ground in eachpower module. If the parasitic capacitances are connected inparallel, the high voltage across the parasitic capacitances canbe applied to the resonant inverter as well as giving the effectof transferring energy to the secondary windings. Therefore,additional isolation transformer is needed to isolate the powerloop transformer and the resonant inverter as shown in Fig. 1.

Moreover, it has the advantage of reducing the core loss ina power loop transformer since the proposed charging loopisolation transformer is designed as a step-down transformerwhose turn ratio is equal to 17 : 14, so that the voltage acrossthe magnetizing inductance can be lower than before. On theother hand, it causes other core and copper loss in a chargingloop isolation transformer. From the viewpoint of enhancingefficiency of the proposed pulsed power modulator, it is not nec-essary to add the charging loop isolation transformer. However,it is necessary to add the compensation component for reducingparasitic capacitances. Therefore, the charging loop isolationtransformer is designed as a step-down transformer to compen-sate for the efficiency of the proposed pulsed power modulator.

D. IGBT Stack for a High-Voltage Pulse

In the proposed pulsed power modulator, the 24 power cellsthat are connected in series can generate 40 kV/150 A. Each

power cell can be charged through the voltage doubler rectifier,and each gate signal can be synchronized due to a bypass diodein parallel with the IGBT switch. Suppose that the pulse gatesignals are not synchronized and some IGBT is turned off whilemost IGBT is turned on: the turned-off IGBT can be damagedseverely due to a high voltage across them. By connecting abypass diode, the turned-off IGBT is not damaged since thecurrent will flow through a bypass diode for a short time untilthe IGBT turns on. Considering that a bypass diode shouldhave a favorable characteristic of surge forward current, anSTTH812D—1200 V diode is suitable for preventing excessivevoltage across the IGBT switches. Furthermore, C2D05120-silicon carbide Schottky diode featured as a 1200-volt Schottkyrectifier with zero reverse and forward recovery is suggested fora voltage doubler rectifier since each power cell is designed togenerate a maximum of 1.67 kV so that a total of 24 power cellsconnected in series can generate a maximum of 40 kV. Finally,selecting a suitable capacitance for a storage capacitor is alsoan important design factor because the output pulse voltagedroop decrease when the capacitance of a storage capacitorincrease. If too large capacitance is used, however, the IGBTstack for a high-voltage pulse will be bulky. Therefore, a 15-uF900-V capacitor has been used for the storage capacitor in theproposed pulsed power modulator.

E. Gate Driver Circuit and a Control Loop

For the series stacked solid-state switches, a synchronizedswitching signal and isolated power for driving switches areneeded. As a gate-driving method, a fiber optic is used totransmit the gate signal, and the driving power is supported byeach separated source of the gate drivers [18]. However, thissuggested method increases the system cost and complexityas the number of solid-state switches increases. Therefore,the current loop gate-driving method is suggested [19]. Itprovides many advantages such as unnecessary requirement ofindependent power source for gate driver, simple and reliableprotection, and ease in controlling the pulse width.

By adopting the current loop gate driving method, the on-offpulse signal is applied to a full bridge inverter from the on/offpulse controller as shown in Fig. 1. Based on the reference fre-quency and pulse width command, a pulse repetition rate (PRR)and a pulse width of the proposed pulsed power modulator canbe adjusted. In addition, a high-voltage cable designed as anon/off control loop passes through the toroidal core of a controltransformer, TX1, and a full bridge inverter is designed to giveenough power to transfer the on/off pulse signal to all pulse gatedrivers. In this configuration, the turn-on, turn-on maintenance,and turn off mode have been suggested. Furthermore, themethod of arc protection has been suggested by using Millercapacitance (reverse capacitance) that exists between the gateand the collector of IGBT [14]. However, more time is requiredor the arc protection failure can occur if the arc is generatedat turn-on mode. Therefore, short protection is added to makeM1 reverse biased under conditions when output becomes shortcondition [14]. On the other hand, short protection is removedin this paper because relatively short pulse width as comparedto [14] is needed for the environmental application.

2572 IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 40, NO. 10, OCTOBER 2012

Fig. 2. Scheme of proposed pulse gate driver.

Fig. 2 shows the scheme of the proposed gate driver which isa modified driver circuit suggested in [15]. By disconnecting adiode connected between the IGBT collector and MOSFET M1source, only discharging the input capacitance of IGBT throughthe resistor is enabled for arc protection. The specific explana-tion on operation of the proposed gate driver is discussed inSection III-A.

III. DISTINCTIVE FEATURES OF THE PROPOSED

PULSED POWER MODULATOR

A. Simple and Reliable Gate Circuit of the Arcing Condition

The main concept of the proposed gate driver circuit is thatthe turn-on pulse signal is transferred to charge both the C1designed for turn-on hold mode and the IGBT input capacitance(Cgs, Cgd) simultaneously via transformer TX1. In this case,just one power source can be used for synchronizing gatesignals of a number of series-connected IGBT stack. Hence,two problems concerning the isolated gate driver and the syn-chronized gating signal are solved. Furthermore, the protectioncircuit against the arcing condition is suggested to ensurereliable operation at any condition. By doing so, it contributes toreducing the overall cost of manufacturing as well as to increasethe power density. Based on the operation modes, as shown inFig. 3, the operational principle can be analyzed as follows.

(a) Turn-on pulse mode—When a turn-on pulse signal isapplied to TX1, the C1 is charged with a clamped voltageby a Zener diode. Meanwhile, the C2 is also charged sothat M1 can be conducting at the same time, and Q1 isconducted sequentially. Finally, the voltage across R7 isapplied to Cge through C3 and R12. By placing C3 inparallel with a gate resistor, input capacitance of IGBTcan be charged faster than before. Therefore, the IGBTswitch is conducted.

(b) Turn-on hold mode—Once the M1 is conducted, thedrain-to-source resistance of M1 is low enough to keepthe main switch IGBT conducted due to the energystored in C1. Even though high instantaneous current issupplied during turn-on pulse mode, total power con-sumption in the gate drive is low. For example, totalpower demand is 3.75 mW if the PRR is 1 kHz. There-fore, the capacitance of C1 also can be obtained to keepthe switch turned on during turn-on hold mode.

Fig. 3. Operation modes of the proposed gate driver circuit. (a) Turn-on pulsemode. (b) Turn-on hold mode. (c) Turn-off pulse mode. (d) Turn-off hold mode.

(c) Turn-off pulse mode—During the turn-off pulse mode,the C1 continues to be charged through D1, and D2.On the other hand, the C2 is discharged so that the M1cannot be conducted anymore. By doing so, the Q2, Q3,and Q4 are conducted to discharge the Cge of IGBT.Therefore, the main switch IGBT is turned off.

OK et al.: DESIGN OF A HIGH-EFFICIENCY 40-kV, 150-A, 3-kHz SOLID-STATE PULSED POWER MODULATOR 2573

Fig. 4. Block diagram of a wide-range load voltage controller.

(d) Arc protection—If the collector voltage of the mainswitch IGBT increase rapidly due to the arc current, thecurrent will flow through the Miller capacitance (Cgc)that exists between the drain and the gate. Accordingly,the dv/dt across R12 induced Q4 turn-on and subse-quently the voltage across R16 turns on Q3. Therefore,Cgc and Cge can be discharged through the resistorsR12, R13, R14, R15, and R16, whose values are toosmall to turn off the IGBT rapidly while Q3 and Q4 areconducting.

By adopting the structure of the series stacking of powercells, the IGBT switch can be protected from arc generationdue to internal protection circuit in the gate driver. Simulationand experimental results show the superior performance ofproposed gate driver circuit.

B. Relay Mode for Wide Range Load Operating

The resonant inverter operating at above resonance frequencyhas the advantage of zero current and zero voltage turn-on andrelatively low peak current. Higher switching loss at light loadconditions, however, is a fatal disadvantage of variable fre-quency control. Furthermore, finite voltage applied to a snubbercapacitor causes increased conduction loss since a snubbercapacitor cannot be discharged during freewheeling mode at alight load due to a decreased inductive energy. Therefore, such afrequency control restricts the load in a limited range. To solvethis problem, a relay mode is proposed. As shown in Fig. 4,switching frequency can be regulated by voltage to frequencymodulator for a given reference voltage Vref. The switchingfrequency is increased to compensate output voltage until Vcis less than VLimit at a light load condition. If a VLimit isless than a Vc, the switching frequency is repeatedly forcedto turn off for a while. Therefore, the proposed high-voltagecapacitor charger is able to generate a low voltage with a fixedswitching frequency and has the advantage of relatively highefficiency even at a light load condition. As shown in Fig. 9(c),the relay mode’s operating is verified in light load conditionsby measuring the on and off resonant current waveforms.

C. Unbalance Voltage Detection Using an Auxiliary Winding

In case that one of the power cells is broken, the proposedpulsed power modulator needs to be protected from additionaldamages to the other power cells. To distinguish the properoperation of the each power cell, a method to detect the un-balanced voltage between each power cell is devised. As shown

Fig. 5. Simulation model of the pulse gate driver.

in Fig. 1, the potential difference can be detected by addingauxiliary windings consisting of three turns in each powermodule. The fault signal will be generated after comparingthe reference voltage and the real voltage generated in theauxiliary winding if the voltage unbalance between each powercell is generated. Therefore, a balanced charging is ensured bydevising an innovative detection method.

However, it has the disadvantage of a fault signal occurringif the reference voltage is high at the moment of power-on. Toprevent an incorrect sensed fault signal, each storage capacitorneeds to be charged slowly by initially setting the referencevoltage at low.

D. Compact Size and High-Power Density

The above features of a proposed pulsed power modulatorare summarized as follows:

– Dimensions: 425 × 370 × 530 [mm].– Power density: 156 [Watt/liter].

IV. SIMULATION & EXPERIMENTAL RESULTS

Fig. 5 shows the simulation model of a pulse gate driver.To verify the reliable operation under both normal and arcingconditions, the simulation model was designed. The value ofall parameters in a gate driver was determined from simulationresults. As shown in Fig. 6, the intrinsic capability of arcingprotecting was confirmed. The picture of the developed solid-state pulsed power modulator is shown in Fig. 7. By classifyingthe charger part and the pulse generator part, the tests of theproposed modulator are conducted. Before testing the pulsegenerator part and the charger part, the pulse gate driver shouldbe checked with an on/off pulse control signal. As shown inFig. 8, the proposed gate driver shows reliable normal operationbecause the current tail disappears when the off-pulse signal isapplied and the IGBT switch is turned on as soon as the on-pulse is applied. If a current tail exists, it may cause severedamage to not only the partially broken pulse gate driversbut also the IGBT switch. After confirming each gate-emittervoltage of IGBT, the charger test was conducted with theresistor load. When testing the proposed capacitor charger, eachpower stages excluding gate drivers are connected in parallelbecause not only is 40 kVdc dangerous, but also the proposedcharger is designed for the pulsed power modulator. Therefore,

2574 IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 40, NO. 10, OCTOBER 2012

Fig. 6. Simulation results of arc protection in a gate driver. (a) Normaloperation. (b) Arcing condition.

Fig. 7. Photographs of developed 40-kV, 150-A, 3-kHz pulsed power.

the proposed charger was tested with a 7.5 kΩ resistor. Asshown in Fig. 9(a), resonant current, output voltage, and thegate signal were measured, respectively, at the rated operation.

Fig. 8. On-off pulse voltage (5 V/div) and current (200 V/div), gate-emittervoltage of IGBT (10 V/div).

Fig. 9. Waveforms of experimental results of the proposed capacitor chargermodulator. (a) High-voltage capacitor charger at rated operation [resonantcurrent (50 A/div), output voltage (2 kV/div), gate signal (10 V/div)].(b) Measured efficiency of proposed charger as varying output power.(c) The resonant current (10 A/div) during the relay mode operation.

In particular, enhanced crest factor can be achieved by trans-forming the shape of the resonant current into a trapezoidalwaveform under the influence of a second resonance capacitor.

OK et al.: DESIGN OF A HIGH-EFFICIENCY 40-kV, 150-A, 3-kHz SOLID-STATE PULSED POWER MODULATOR 2575

Fig. 10. Measurement of 40-kV rising time (98.19 ns, ch3) and minimumpulse width (500 ns).

Waveform under the influence of second resonance capacitor.Fig. 9(b) shows measured efficiency of the proposed capacitorcharger. Overall, it shows high efficiency of above 90% andrelatively high efficiency of 73% at light load condition wherethe 7.5 kΩ load resistor was replaced with the ballast resistorsin each power cell. Since the proposed relay mode shownin Fig. 9(c) is operated as a repetitive on and off operatingcycle of resonant current, a wide range of load voltage canbe achieved by restricting switching frequency. Under the lightload conditions, the off-operating cycle will be longer to lowerthe load voltage. Therefore, the proposed modulator can be pro-tected from open load conditions where load is replaced withballast resistors in the power cell. Finally, the test of the pulsegenerator part was conducted with the noninductive resistors.As shown in Fig. 10, the rising time less than 100 ns andminimum pulse width of 500 ns were achieved when theexperiment was carried out with a 40-kV load voltage and300 Ω noninductive resistor load. On the other hand, Fig. 11shows variable output pulse voltage and current (a), the pulsewidth variation (b), and the maximum PRR (c). Moreover,it is confirmed that the IGBT switch can withstand 300 Aduring a very short time without damage or improper operation.Therefore, the superior performance of internal arc protectionis proven as shown in Fig. 11(d). As shown in Figs. 7–11,experimental results prove the reliability and high-power den-sity of the proposed 40-kV, 150-A, 3-kHz pulsed powermodulator.

V. CONCLUSION

In this paper, a 40-kV, 150-A, 3-kHz pulsed power modulatorbased on series stacking of power cells was proposed. The pro-posed scheme consists of four power stages connected in serieswhere there are six series-connected power cells. Each powercell consisting of storage capacitors and IGBTs is designed togenerate up to 1.67 kVdc in order to achieve a maximum of40 kV. To charge the storage capacitor, moreover, an enhancedcapacitor charger operating at above resonance frequency witha distinctive power transformer was proposed.

Fig. 11. Waveforms of experimental results. (a) The variable output pulse volt-age and current (5 kV/div, 50 A/div). (b) The pulse width variation (5 kV/div,50 A/div). (c) Maximum pulse repetition rate 3 kHz (5 kV/div, 50 A/div).(d) Arc protection (5 kV/div, 100 A/div).

2576 IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 40, NO. 10, OCTOBER 2012

In summary, the proposed 40-kV, 150-A, 3-kHz pulsedpower modulator has following features.

1) For a wide range of operation of load voltage, controlmethod that restricts maximum frequency is suggested.

2) Compact size and high-power density can be achievedby adopting distinctive configuration of a power looptransformer.

3) To detect unbalanced voltage between storage capacitors,self-compensated auxiliary winding is added.

4) By adding a second resonance capacitor, crest factor isenhanced at the rated operation.

5) Switching loss is reduced due to a comparatively largesnubber capacitor.

6) A simple method of unbalanced voltage detection issuggested.

7) To isolate the power loop transformer and the charginginverter, a charging loop isolation transformer is added.

8) Superior arc protection is achieved using the pulse gatedriver.

9) Variable pulse width, pulse output voltage, and high PRRare obtained.

The industrial application of 40-kV, 150-A, 3-kHz pulsedpower modulator with a large plasma reactor design will bediscussed in future studies.

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Seung-Bok Ok was born in Daegu, Korea, in 1985.He received the B.S. degree from the KyungpookNational University, Daegu, Korea, in 2010 and iscurrently working toward the M.S. degree in elec-tronic engineering from the University of Scienceand Technology, Deajeon. His research interests in-clude the high-voltage resonant converter, the solid-state pulsed power modulator, and their applications.

Mr. Ok is a member of the Korean Institute ofPower Electronics and the Korean Institute of Elec-trical Engineers.

Hong-Je Ryoo received the B.S., M.S., andPh.D. degrees in electrical engineering fromSungKyunkwan University, Seoul, Korea in 1991,1995, and 2001, respectively.

From 2004 to 2005, he was with WEMPEC atthe University of Wisconsin-Madison, Madison, asa Visiting Scholar for his postdoctoral study. Since1996, he has been with the Korea ElectrotechnologyResearch Institute, Changwon, Korea. He is cur-rently a Principal Research Engineer in the IndustryApplication Research Laboratory and a Leader of

the Pulsed Power World Class Laboratory at that institute. Also, he has beenan Associate Professor in the Department of Energy Conversion Technology,University of Science and Technology, Deajeon, Korea, since 2005. His currentresearch interests include pulsed power systems and their applications, as wellas high-power and high-voltage conversions.

Dr. Ryoo is a member of the Korean Institute of Power Electronics and theKorean Institute of Electrical Engineers.

Sung-Roc Jang was born in Daegu, Korea, in 1983.He received the B.S. degree from Kyungpook Na-tional University, Daegu, Korea, in 2008, and theM.S. and Ph.D. degrees in electronic engineeringfrom the University of Science and Technology,Deajeon, Korea, in 2011.

His current research interests include high-voltageresonant converters and solid-state pulsed powermodulators and their industrial applications.

Dr. Jang is a member of the Korean Institute ofPower Electronics and the Korean Institute of Elec-

trical Engineers.

OK et al.: DESIGN OF A HIGH-EFFICIENCY 40-kV, 150-A, 3-kHz SOLID-STATE PULSED POWER MODULATOR 2577

Suk-Ho Ahn received the B.S. degree in electri-cal engineering from Incheon National University,Incheon, Korea, in 2009, and is currently workingtoward the M.S. and Ph.D. degrees at the Universityof Science and Technology, Deajeon, Korea.

His research interests include the soft switchedresonant converter applications and battery chargersystems.

Mr. Ahn is a member of the Korean Instituteof Power Electronics and the Korean Institute ofElectrical Engineers.

Gennadi Goussev was born in Russia in 1946. Hereceived the M.S. degree from the Military Mechan-ical University.

He worked for NIEFA as research Team Leader,from 1976 to 1987. Since 1998, he has beenwith the Korea Electrotechnology Research Institute,Changwon, Korea. His main research interests in-volve solid-state pulsed power supply and its appli-cations.