DCS Detector Control System Hardware Dirk Gottschalk Volker Kiworra Volker Lindenstruth Vojtech Petracek Marc Stockmeier Heinz Tilsner Chair of Computer

DCS Detector Control System Hardware

Dirk GottschalkVolker KiworraVolker LindenstruthVojtech PetracekMarc StockmeierHeinz Tilsner

Chair of Computer Science and Engineering / Prof. Dr. Volker Lindenstruth / http://www.kip.uni-heidelberg.de/ti/

Project Link http://www.kip.uni-heidelberg.de/ti/DCS-Board/current/

Introduction :

DCS in the ALICE

T ransitionR adiationD etector



One DCS Board controlls eight Read-Out Boards

Monitoring Functions :Temperature Data from MCMsPower Supply Data from MCMs

Switching Functions : Shutdown for Voltage Regulators

Clock and Trigger Distribution


DCS Board Position in the TRD Chamber



Optical Clock Receiver Link (TTCrx) Ethernet Link Autonomous Power Supply JTAG In and JTAG Out 8 analog Inputs 16 Bit / 10Sps 8 Pseudo LVDS Inputs 8 Pseudo LVDS Outputs 24 Switching Lines two 8 Bit Ports ( optionaly ) I²C Bus Two Wire UART optional CMC Connector ( if TTCrx is not used )


DCS Interfaces



Altera FPGA with ARM9 Core and 100k Gates Ethernet Physikal Layer Chip 32 MByte SDRAM 4 MByte Flash EPROM TTCrx Clock Recovery 3.3 Volt and 1.8 Volt Voltage Regulators RS422 Driver and Receiver for JTAG connections LVDS Clock and Trigger Driver Watchdog and Voltage Supervisor 16 (24) Bit ADC with 10Sps


DCS Board System Overview



A JTAG Master is implemented on DCS boards.

This functionality ensures adjacent DCS board programmability in a dedicated JTAG Loop to repair inconsistent program or configuration data.


DCS JTAG revitalisationsystem




Board Layout

Size 100x120mmHeight 10,5mm max.






Project Status : 2003.02.14

Schematic is final now.

Preview :

Board will be routed next two weeks.

Prototypes will be likely available in april.


Last but not least :

Documents

DCS Detector Control System Hardware Dirk Gottschalk Volker Kiworra Volker Lindenstruth Vojtech Petracek Marc Stockmeier Heinz Tilsner Chair of Computer